aixiao/Air
1
0
Fork 0
mirror of https://git.aixiao.me/aixiao/Danger-alarm.git synced 2025-07-29 19:13:39 +08:00
Code Issues Packages Projects Releases Wiki Activity

initial

Browse Source
This commit is contained in:
aixiao
2024-06-03 16:27:41 +08:00
commit b7ab42dd94
625 changed files with 214806 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

347
SOFTWARE-FreeRTOS/Common/ARMv8M/mpu_demo/mpu_demo.c Normal file
View File

@@ -0,0 +1,347 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/**
* @brief Size of the shared memory region.
*/
#define SHARED_MEMORY_SIZE 32
/**
* @brief Memory region shared between two tasks.
*/
static uint8_t ucSharedMemory[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
#if ( configTOTAL_MPU_REGIONS == 16 )
static uint8_t ucSharedMemory1[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
static uint8_t ucSharedMemory2[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
static uint8_t ucSharedMemory3[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
static uint8_t ucSharedMemory4[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
static uint8_t ucSharedMemory5[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
static uint8_t ucSharedMemory6[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
static uint8_t ucSharedMemory7[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
static uint8_t ucSharedMemory8[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) );
#endif /* configTOTAL_MPU_REGIONS == 16 */
/**
* @brief Memory region used to track Memory Fault intentionally caused by the
* RO Access task.
*
* RO Access task sets ucROTaskFaultTracker[ 0 ] to 1 before accessing illegal
* memory. Illegal memory access causes Memory Fault and the fault handler
* checks ucROTaskFaultTracker[ 0 ] to see if this is an expected fault. We
* recover gracefully from an expected fault by jumping to the next instruction.
*
* @note We are declaring a region of 32 bytes even though we need only one. The
* reason is that the size of an MPU region must be a multiple of 32 bytes.
*/
static volatile uint8_t ucROTaskFaultTracker[ SHARED_MEMORY_SIZE ] __attribute__( ( aligned( 32 ) ) ) = { 0 };
/*-----------------------------------------------------------*/
/**
* @brief Implements the task which has Read Only access to the memory region
* ucSharedMemory.
*
* @param pvParameters[in] Parameters as passed during task creation.
*/
static void prvROAccessTask( void * pvParameters );
/**
* @brief Implements the task which has Read Write access to the memory region
* ucSharedMemory.
*
* @param pvParameters[in] Parameters as passed during task creation.
*/
static void prvRWAccessTask( void * pvParameters );
/*-----------------------------------------------------------*/
static void prvROAccessTask( void * pvParameters )
{
uint8_t ucVal;
/* Unused parameters. */
( void ) pvParameters;
for( ; ; )
{
/* This task performs the following sequence for all the shared memory
* regions:
*
* 1. Perfrom a read access to the shared memory. Since this task has
* RO access to the shared memory, the read operation is successful.
*
* 2. Set ucROTaskFaultTracker[ 0 ] to 1 before performing a write to
* the shared memory. Since this task has Read Only access to the
* shared memory, the write operation would result in a Memory Fault.
* Setting ucROTaskFaultTracker[ 0 ] to 1 tells the Memory Fault
* Handler that this is an expected fault. The handler recovers from
* the expected fault gracefully by jumping to the next instruction.
*
* 3. Perfrom a write to the shared memory resulting in a memory fault.
*
* 4. Ensure that the write access did generate MemFault and the fault
* handler did clear the ucROTaskFaultTracker[ 0 ].
*/
/* Perform the above mentioned sequence on ucSharedMemory. */
ucVal = ucSharedMemory[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
#if ( configTOTAL_MPU_REGIONS == 16 )
{
/* Perform the above mentioned sequence on ucSharedMemory1. */
ucVal = ucSharedMemory1[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory1[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
/* Perform the above mentioned sequence on ucSharedMemory2. */
ucVal = ucSharedMemory2[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory2[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
/* Perform the above mentioned sequence on ucSharedMemory3. */
ucVal = ucSharedMemory3[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory3[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
/* Perform the above mentioned sequence on ucSharedMemory4. */
ucVal = ucSharedMemory4[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory4[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
/* Perform the above mentioned sequence on ucSharedMemory5. */
ucVal = ucSharedMemory5[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory5[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
/* Perform the above mentioned sequence on ucSharedMemory6. */
ucVal = ucSharedMemory6[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory6[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
/* Perform the above mentioned sequence on ucSharedMemory7. */
ucVal = ucSharedMemory7[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory7[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
/* Perform the above mentioned sequence on ucSharedMemory8. */
ucVal = ucSharedMemory8[ 0 ];
/* Silent compiler warnings about unused variables. */
( void ) ucVal;
ucROTaskFaultTracker[ 0 ] = 1;
ucSharedMemory8[ 0 ] = 0;
configASSERT( ucROTaskFaultTracker[ 0 ] == 0 );
}
#endif /* configTOTAL_MPU_REGIONS == 16 */
/* Wait for a second. */
vTaskDelay( pdMS_TO_TICKS( 1000 ) );
}
}
/*-----------------------------------------------------------*/
static void prvRWAccessTask( void * pvParameters )
{
/* Unused parameters. */
( void ) pvParameters;
for( ; ; )
{
/* This task has RW access to ucSharedMemory and therefore can write to
* it. */
ucSharedMemory[ 0 ] = 0;
#if ( configTOTAL_MPU_REGIONS == 16 )
{
ucSharedMemory1[ 0 ] = 0;
ucSharedMemory2[ 0 ] = 0;
ucSharedMemory3[ 0 ] = 0;
ucSharedMemory4[ 0 ] = 0;
ucSharedMemory5[ 0 ] = 0;
ucSharedMemory6[ 0 ] = 0;
ucSharedMemory7[ 0 ] = 0;
ucSharedMemory8[ 0 ] = 0;
}
#endif /* configTOTAL_MPU_REGIONS == 16 */
/* Wait for a second. */
vTaskDelay( pdMS_TO_TICKS( 1000 ) );
}
}
/*-----------------------------------------------------------*/
void vStartMPUDemo( void )
{
static StackType_t xROAccessTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
static StackType_t xRWAccessTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
TaskParameters_t xROAccessTaskParameters =
{
.pvTaskCode = prvROAccessTask,
.pcName = "ROAccess",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = NULL,
.uxPriority = tskIDLE_PRIORITY,
.puxStackBuffer = xROAccessTaskStack,
.xRegions =
{
{ ( void * ) ucSharedMemory, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
#if ( configTOTAL_MPU_REGIONS == 16 )
{ ( void * ) ucSharedMemory1, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory2, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory3, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory4, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory5, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory6, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory7, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory8, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER },
#endif /* configTOTAL_MPU_REGIONS == 16 */
{ ( void * ) ucROTaskFaultTracker, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ 0, 0, 0 },
}
};
TaskParameters_t xRWAccessTaskParameters =
{
.pvTaskCode = prvRWAccessTask,
.pcName = "RWAccess",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = NULL,
.uxPriority = tskIDLE_PRIORITY,
.puxStackBuffer = xRWAccessTaskStack,
.xRegions =
{
{ ( void * ) ucSharedMemory, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
#if ( configTOTAL_MPU_REGIONS == 16 )
{ ( void * ) ucSharedMemory1, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory2, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory3, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory4, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory5, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory6, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory7, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ ( void * ) ucSharedMemory8, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
#endif /* configTOTAL_MPU_REGIONS == 16 */
{ 0, 0, 0 },
{ 0, 0, 0 },
}
};
/* Create an unprivileged task with RO access to ucSharedMemory. */
xTaskCreateRestricted( &( xROAccessTaskParameters ), NULL );
/* Create an unprivileged task with RW access to ucSharedMemory. */
xTaskCreateRestricted( &( xRWAccessTaskParameters ), NULL );
}
/*-----------------------------------------------------------*/
portDONT_DISCARD void vHandleMemoryFault( uint32_t * pulFaultStackAddress )
{
uint32_t ulPC;
uint16_t usOffendingInstruction;
/* Is this an expected fault? */
if( ucROTaskFaultTracker[ 0 ] == 1 )
{
/* Read program counter. */
ulPC = pulFaultStackAddress[ 6 ];
/* Read the offending instruction. */
usOffendingInstruction = *( uint16_t * ) ulPC;
/* From ARM docs:
* If the value of bits[15:11] of the halfword being decoded is one of
* the following, the halfword is the first halfword of a 32-bit
* instruction:
* - 0b11101.
* - 0b11110.
* - 0b11111.
* Otherwise, the halfword is a 16-bit instruction.
*/
/* Extract bits[15:11] of the offending instruction. */
usOffendingInstruction = usOffendingInstruction & 0xF800;
usOffendingInstruction = ( usOffendingInstruction >> 11 );
/* Determine if the offending instruction is a 32-bit instruction or
* a 16-bit instruction. */
if( ( usOffendingInstruction == 0x001F ) ||
( usOffendingInstruction == 0x001E ) ||
( usOffendingInstruction == 0x001D ) )
{
/* Since the offending instruction is a 32-bit instruction,
* increment the program counter by 4 to move to the next
* instruction. */
ulPC += 4;
}
else
{
/* Since the offending instruction is a 16-bit instruction,
* increment the program counter by 2 to move to the next
* instruction. */
ulPC += 2;
}
/* Save the new program counter on the stack. */
pulFaultStackAddress[ 6 ] = ulPC;
/* Mark the fault as handled. */
ucROTaskFaultTracker[ 0 ] = 0;
}
else
{
/* This is an unexpected fault - loop forever. */
for( ; ; )
{
}
}
}
/*-----------------------------------------------------------*/

44
SOFTWARE-FreeRTOS/Common/ARMv8M/mpu_demo/mpu_demo.h Normal file
View File

@@ -0,0 +1,44 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef __MPU_DEMO_H__
#define __MPU_DEMO_H__
/**
* @brief Creates all the tasks for MPU demo.
*
* The MPU demo creates 2 unprivileged tasks - One of which has Read Only access
* to a shared memory region while the other has Read Write access. The task
* with Read Only access then tries to write to the shared memory which results
* in a Memory fault. The fault handler examines that it is the fault generated
* by the task with Read Only access and if so, it recovers from the fault
* gracefully by moving the Program Counter to the next instruction to the one
* which generated the fault. If any other memory access violation occurs, the
* fault handler will get stuck in an infinite loop.
*/
void vStartMPUDemo( void );
#endif /* __MPU_DEMO_H__ */

312
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.c Normal file
View File

@@ -0,0 +1,312 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/*
* "Reg tests" - These tests fill the registers with known values, then check
* that each register maintains its expected value for the lifetime of the
* task. Each task uses a different set of values. The reg test tasks execute
* with a very low priority, so get preempted very frequently. A register
* containing an unexpected value is indicative of an error in the context
* switching mechanism.
*/
#include "reg_test_asm.h"
/*-----------------------------------------------------------*/
void vRegTest1Asm_NonSecure( void ) /* __attribute__(( naked )) */
{
__asm volatile
(
".extern ulRegTest1LoopCounter \n"
".syntax unified \n"
" \n"
" /* Fill the core registers with known values. */ \n"
" movs r1, #101 \n"
" movs r2, #102 \n"
" movs r3, #103 \n"
" movs r4, #104 \n"
" movs r5, #105 \n"
" movs r6, #106 \n"
" movs r7, #107 \n"
" movs r0, #108 \n"
" mov r8, r0 \n"
" movs r0, #109 \n"
" mov r9, r0 \n"
" movs r0, #110 \n"
" mov r10, r0 \n"
" movs r0, #111 \n"
" mov r11, r0 \n"
" movs r0, #112 \n"
" mov r12, r0 \n"
" movs r0, #100 \n"
" \n"
"reg1_loop: \n"
" \n"
" /* Verify that core registers contain correct values. */ \n"
" cmp r0, #100 \n"
" bne reg1_error_loop \n"
" cmp r1, #101 \n"
" bne reg1_error_loop \n"
" cmp r2, #102 \n"
" bne reg1_error_loop \n"
" cmp r3, #103 \n"
" bne reg1_error_loop \n"
" cmp r4, #104 \n"
" bne reg1_error_loop \n"
" cmp r5, #105 \n"
" bne reg1_error_loop \n"
" cmp r6, #106 \n"
" bne reg1_error_loop \n"
" cmp r7, #107 \n"
" bne reg1_error_loop \n"
" movs r0, #108 \n"
" cmp r8, r0 \n"
" bne reg1_error_loop \n"
" movs r0, #109 \n"
" cmp r9, r0 \n"
" bne reg1_error_loop \n"
" movs r0, #110 \n"
" cmp r10, r0 \n"
" bne reg1_error_loop \n"
" movs r0, #111 \n"
" cmp r11, r0 \n"
" bne reg1_error_loop \n"
" movs r0, #112 \n"
" cmp r12, r0 \n"
" bne reg1_error_loop \n"
" \n"
" /* Everything passed, inc the loop counter. */ \n"
" push { r1 } \n"
" ldr r0, =ulRegTest1LoopCounter \n"
" ldr r1, [r0] \n"
" adds r1, r1, #1 \n"
" str r1, [r0] \n"
" \n"
" /* Yield to increase test coverage. */ \n"
" movs r0, #0x01 \n"
" ldr r1, =0xe000ed04 \n" /* NVIC_ICSR. */
" lsls r0, #28 \n" /* Shift to PendSV bit. */
" str r0, [r1] \n"
" dsb \n"
" pop { r1 } \n"
" \n"
" /* Start again. */ \n"
" movs r0, #100 \n"
" b reg1_loop \n"
" \n"
"reg1_error_loop: \n"
" /* If this line is hit then there was an error in \n"
" * a core register value. The loop ensures the \n"
" * loop counter stops incrementing. */ \n"
" b reg1_error_loop \n"
" nop \n"
);
}
/*-----------------------------------------------------------*/
void vRegTest2Asm_NonSecure( void ) /* __attribute__(( naked )) */
{
__asm volatile
(
".extern ulRegTest2LoopCounter \n"
".syntax unified \n"
" \n"
" /* Fill the core registers with known values. */ \n"
" movs r1, #1 \n"
" movs r2, #2 \n"
" movs r3, #3 \n"
" movs r4, #4 \n"
" movs r5, #5 \n"
" movs r6, #6 \n"
" movs r7, #7 \n"
" movs r0, #8 \n"
" mov r8, r0 \n"
" movs r0, #9 \n"
" mov r9, r0 \n"
" movs r0, #10 \n"
" mov r10, r0 \n"
" movs r0, #11 \n"
" mov r11, r0 \n"
" movs r0, #12 \n"
" mov r12, r0 \n"
" movs r0, #10 \n"
" \n"
"reg2_loop: \n"
" \n"
" /* Verify that core registers contain correct values. */ \n"
" cmp r0, #10 \n"
" bne reg2_error_loop \n"
" cmp r1, #1 \n"
" bne reg2_error_loop \n"
" cmp r2, #2 \n"
" bne reg2_error_loop \n"
" cmp r3, #3 \n"
" bne reg2_error_loop \n"
" cmp r4, #4 \n"
" bne reg2_error_loop \n"
" cmp r5, #5 \n"
" bne reg2_error_loop \n"
" cmp r6, #6 \n"
" bne reg2_error_loop \n"
" cmp r7, #7 \n"
" bne reg2_error_loop \n"
" movs r0, #8 \n"
" cmp r8, r0 \n"
" bne reg2_error_loop \n"
" movs r0, #9 \n"
" cmp r9, r0 \n"
" bne reg2_error_loop \n"
" movs r0, #10 \n"
" cmp r10, r0 \n"
" bne reg2_error_loop \n"
" movs r0, #11 \n"
" cmp r11, r0 \n"
" bne reg2_error_loop \n"
" movs r0, #12 \n"
" cmp r12, r0 \n"
" bne reg2_error_loop \n"
" \n"
" /* Everything passed, inc the loop counter. */ \n"
" push { r1 } \n"
" ldr r0, =ulRegTest2LoopCounter \n"
" ldr r1, [r0] \n"
" adds r1, r1, #1 \n"
" str r1, [r0] \n"
" pop { r1 } \n"
" \n"
" /* Start again. */ \n"
" movs r0, #10 \n"
" b reg2_loop \n"
" \n"
"reg2_error_loop: \n"
" /* If this line is hit then there was an error in \n"
" * a core register value. The loop ensures the \n"
" * loop counter stops incrementing. */ \n"
" b reg2_error_loop \n"
" nop \n"
);
}
/*-----------------------------------------------------------*/
void vRegTestAsm_NonSecureCallback( void )
{
__asm volatile
(
".syntax unified \n"
" \n"
" /* Store callee saved registers. */ \n"
" push { r4-r7 } \n"
" mov r0, r8 \n"
" mov r1, r9 \n"
" mov r2, r10 \n"
" mov r3, r11 \n"
" mov r4, r12 \n"
" push { r0-r4 } \n"
" \n"
" /* Fill the core registers with known values. */ \n"
" movs r1, #151 \n"
" movs r2, #152 \n"
" movs r3, #153 \n"
" movs r4, #154 \n"
" movs r5, #155 \n"
" movs r6, #156 \n"
" movs r7, #157 \n"
" movs r0, #158 \n"
" mov r8, r0 \n"
" movs r0, #159 \n"
" mov r9, r0 \n"
" movs r0, #160 \n"
" mov r10, r0 \n"
" movs r0, #161 \n"
" mov r11, r0 \n"
" movs r0, #162 \n"
" mov r12, r0 \n"
" movs r0, #150 \n"
" \n"
" /* Force a context switch by pending non-secure sv. */ \n"
" push { r0, r1 } \n"
" movs r0, #0x01 \n"
" ldr r1, =0xe000ed04 \n" /* NVIC_ICSR. */
" lsls r0, #28 \n" /* Shift to PendSV bit. */
" str r0, [r1] \n"
" dsb \n"
" pop { r0, r1 } \n"
" \n"
" /* Verify that core registers contain correct values. */ \n"
" cmp r0, #150 \n"
" bne reg_nscb_error_loop \n"
" cmp r1, #151 \n"
" bne reg_nscb_error_loop \n"
" cmp r2, #152 \n"
" bne reg_nscb_error_loop \n"
" cmp r3, #153 \n"
" bne reg_nscb_error_loop \n"
" cmp r4, #154 \n"
" bne reg_nscb_error_loop \n"
" cmp r5, #155 \n"
" bne reg_nscb_error_loop \n"
" cmp r6, #156 \n"
" bne reg_nscb_error_loop \n"
" cmp r7, #157 \n"
" bne reg_nscb_error_loop \n"
" movs r0, #158 \n"
" cmp r8, r0 \n"
" bne reg_nscb_error_loop \n"
" movs r0, #159 \n"
" cmp r9, r0 \n"
" bne reg_nscb_error_loop \n"
" movs r0, #160 \n"
" cmp r10, r0 \n"
" bne reg_nscb_error_loop \n"
" movs r0, #161 \n"
" cmp r11, r0 \n"
" bne reg_nscb_error_loop \n"
" movs r0, #162 \n"
" cmp r12, r0 \n"
" bne reg_nscb_error_loop \n"
" \n"
" /* Everything passed, finish. */ \n"
" b reg_nscb_success \n"
" \n"
"reg_nscb_error_loop : \n"
" /* If this line is hit then there was an error in \n"
" * a core register value. The loop ensures the \n"
" * loop counter stops incrementing. */ \n"
" b reg_nscb_error_loop \n"
" nop \n"
" \n"
"reg_nscb_success: \n"
" /* Restore callee saved registers. */ \n"
" pop { r0-r4 } \n"
" mov r8, r0 \n"
" mov r9, r1 \n"
" mov r10, r2 \n"
" mov r11, r3 \n"
" mov r12, r4 \n"
" pop { r4-r7 } \n"
);
}
/*-----------------------------------------------------------*/

46
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM23/non_secure/reg_test_asm.h Normal file
View File

@@ -0,0 +1,46 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef REG_TEST_ASM_H
#define REG_TEST_ASM_H
/**
* @brief Functions that implement reg tests in assembly.
*
* These are called from the FreeRTOS tasks on the non-secure side.
*/
void vRegTest1Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest2Asm_NonSecure( void ) __attribute__( ( naked ) );
/**
* @brief Function that implements reg tests in assembly.
*
* This is passed as function pointer to the secure side and called
* from the secure side.
*/
void vRegTestAsm_NonSecureCallback( void );
#endif /* REG_TEST_ASM_H */

151
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.c Normal file
View File

@@ -0,0 +1,151 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* Standard includes. */
#include <stdint.h>
#include <arm_cmse.h>
/* Interface includes. */
#include "secure_reg_test_asm.h"
/* FreeRTOS includes. */
#include "secure_port_macros.h"
/* typedef for non-secure callback function. */
typedef RegTestCallback_t NonSecureRegTestCallback_t __attribute__( ( cmse_nonsecure_call ) );
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTestAsm_Secure( void )
{
__asm volatile
(
".syntax unified \n"
" \n"
" /* Store callee saved registers. */ \n"
" push { r4-r7 } \n"
" mov r0, r8 \n"
" mov r1, r9 \n"
" mov r2, r10 \n"
" mov r3, r11 \n"
" mov r4, r12 \n"
" push { r0-r4 } \n"
" \n"
" /* Fill the core registers with known values. */ \n"
" movs r1, #201 \n"
" movs r2, #202 \n"
" movs r3, #203 \n"
" movs r4, #204 \n"
" movs r5, #205 \n"
" movs r6, #206 \n"
" movs r7, #207 \n"
" movs r0, #208 \n"
" mov r8, r0 \n"
" movs r0, #209 \n"
" mov r9, r0 \n"
" movs r0, #210 \n"
" mov r10, r0 \n"
" movs r0, #211 \n"
" mov r11, r0 \n"
" movs r0, #212 \n"
" mov r12, r0 \n"
" movs r0, #200 \n"
" \n"
" /* Force a context switch by pending non-secure sv. */ \n"
" push { r0, r1 } \n"
" movs r0, #0x01 \n"
" ldr r1, =0xe002ed04 \n" /* NVIC_ICSR_NS. */
" lsls r0, #28 \n" /* Shift to PendSV bit. */
" str r0, [r1] \n"
" dsb \n"
" pop { r0, r1 } \n"
" \n"
" /* Verify that core registers contain correct values. */ \n"
" cmp r0, #200 \n"
" bne secure_reg_test_error_loop \n"
" cmp r1, #201 \n"
" bne secure_reg_test_error_loop \n"
" cmp r2, #202 \n"
" bne secure_reg_test_error_loop \n"
" cmp r3, #203 \n"
" bne secure_reg_test_error_loop \n"
" cmp r4, #204 \n"
" bne secure_reg_test_error_loop \n"
" cmp r5, #205 \n"
" bne secure_reg_test_error_loop \n"
" cmp r6, #206 \n"
" bne secure_reg_test_error_loop \n"
" cmp r7, #207 \n"
" bne secure_reg_test_error_loop \n"
" movs r0, #208 \n"
" cmp r8, r0 \n"
" bne secure_reg_test_error_loop \n"
" movs r0, #209 \n"
" cmp r9, r0 \n"
" bne secure_reg_test_error_loop \n"
" movs r0, #210 \n"
" cmp r10, r0 \n"
" bne secure_reg_test_error_loop \n"
" movs r0, #211 \n"
" cmp r11, r0 \n"
" bne secure_reg_test_error_loop \n"
" movs r0, #212 \n"
" cmp r12, r0 \n"
" bne secure_reg_test_error_loop \n"
" \n"
" /* Everything passed, finish. */ \n"
" b secure_reg_test_success \n"
" \n"
"secure_reg_test_error_loop: \n"
" /* If this line is hit then there was an error in \n"
" * a core register value. The loop ensures the \n"
" * loop counter stops incrementing. */ \n"
" b secure_reg_test_error_loop \n"
" nop \n"
" \n"
"secure_reg_test_success: \n"
" /* Restore callee saved registers. */ \n"
" pop { r0-r4 } \n"
" mov r8, r0 \n"
" mov r9, r1 \n"
" mov r10, r2 \n"
" mov r11, r3 \n"
" mov r12, r4 \n"
" pop { r4-r7 } \n"
);
}
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback )
{
NonSecureRegTestCallback_t pxNonSecureRegTestCallback;
/* Return function pointer with cleared LSB. */
pxNonSecureRegTestCallback = ( NonSecureRegTestCallback_t ) cmse_nsfptr_create( pxRegTestCallback );
/* Invoke the callback which runs reg tests. */
pxNonSecureRegTestCallback();
}
/*-----------------------------------------------------------*/

49
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM23/secure/secure_reg_test_asm.h Normal file
View File

@@ -0,0 +1,49 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef SECURE_REG_TEST_ASM_H
#define SECURE_REG_TEST_ASM_H
/* Callback function pointer definition. */
typedef void ( * RegTestCallback_t )( void );
/**
* @brief Function that implements reg tests for the secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side.
*/
void vRegTestAsm_Secure( void );
/**
* @brief Invokes the supplied reg test callback on the non-secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side..
*/
void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback );
#endif /* SECURE_REG_TEST_ASM_H */

1220
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM33/non_secure/reg_test_asm.c Normal file
View File

File diff suppressed because it is too large Load Diff

48
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM33/non_secure/reg_test_asm.h Normal file
View File

@@ -0,0 +1,48 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef REG_TEST_ASM_H
#define REG_TEST_ASM_H
/**
* @brief Functions that implement reg tests in assembly.
*
* These are called from the FreeRTOS tasks on the non-secure side.
*/
void vRegTest1Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest2Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest3Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest4Asm_NonSecure( void ) __attribute__( ( naked ) );
/**
* @brief Function that implements reg tests in assembly.
*
* This is passed as function pointer to the secure side and called
* from the secure side.
*/
void vRegTestAsm_NonSecureCallback( void );
#endif /* REG_TEST_ASM_H */

289
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM33/secure/secure_reg_test_asm.c Normal file
View File

@@ -0,0 +1,289 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* Standard includes. */
#include <stdint.h>
#include <arm_cmse.h>
/* Interface includes. */
#include "secure_reg_test_asm.h"
/* FreeRTOS includes. */
#include "secure_port_macros.h"
/* typedef for non-secure callback function. */
typedef RegTestCallback_t NonSecureRegTestCallback_t __attribute__( ( cmse_nonsecure_call ) );
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTestAsm_Secure( void )
{
__asm volatile
(
".syntax unified \n"
" \n"
" /* Store callee saved registers. */ \n"
" push { r4-r12 } \n"
" \n"
" /* Fill the core registers with known values. */ \n"
" movs r0, #200 \n"
" movs r1, #201 \n"
" movs r1, #201 \n"
" movs r2, #202 \n"
" movs r3, #203 \n"
" movs r4, #204 \n"
" movs r5, #205 \n"
" movs r6, #206 \n"
" movs r7, #207 \n"
" movs r8, #208 \n"
" movs r9, #209 \n"
" movs r10, #210 \n"
" movs r11, #211 \n"
" movs r12, #212 \n"
" \n"
" /* Fill the FPU registers with known values. */ \n"
" vmov.f32 s0, #1.0 \n"
" vmov.f32 s2, #2.0 \n"
" vmov.f32 s3, #3.5 \n"
" vmov.f32 s4, #4.5 \n"
" vmov.f32 s5, #5.0 \n"
" vmov.f32 s6, #6.0 \n"
" vmov.f32 s7, #7.5 \n"
" vmov.f32 s8, #8.5 \n"
" vmov.f32 s9, #9.0 \n"
" vmov.f32 s10, #10.0 \n"
" vmov.f32 s11, #11.5 \n"
" vmov.f32 s12, #12.5 \n"
" vmov.f32 s13, #13.0 \n"
" vmov.f32 s14, #14.0 \n"
" vmov.f32 s15, #1.5 \n"
" vmov.f32 s16, #2.5 \n"
" vmov.f32 s17, #3.0 \n"
" vmov.f32 s18, #4.0 \n"
" vmov.f32 s19, #5.5 \n"
" vmov.f32 s20, #6.5 \n"
" vmov.f32 s21, #7.0 \n"
" vmov.f32 s22, #8.0 \n"
" vmov.f32 s23, #9.5 \n"
" vmov.f32 s24, #10.5 \n"
" vmov.f32 s25, #11.0 \n"
" vmov.f32 s26, #12.0 \n"
" vmov.f32 s27, #13.5 \n"
" vmov.f32 s28, #14.5 \n"
" vmov.f32 s29, #1.0 \n"
" vmov.f32 s30, #2.0 \n"
" vmov.f32 s31, #3.5 \n"
" \n"
" /* Force a context switch by pending non-secure sv. */ \n"
" push { r0, r1 } \n"
" movs r0, #0x01 \n"
" ldr r1, =0xe002ed04 \n" /* NVIC_ICSR_NS. */
" lsls r0, #28 \n" /* Shift to PendSV bit. */
" str r0, [r1] \n"
" dsb \n"
" pop { r0, r1 } \n"
" \n"
" /* Verify that core registers contain correct values. */ \n"
" cmp r0, #200 \n"
" bne secure_reg_test_error_loop \n"
" cmp r1, #201 \n"
" bne secure_reg_test_error_loop \n"
" cmp r2, #202 \n"
" bne secure_reg_test_error_loop \n"
" cmp r3, #203 \n"
" bne secure_reg_test_error_loop \n"
" cmp r4, #204 \n"
" bne secure_reg_test_error_loop \n"
" cmp r5, #205 \n"
" bne secure_reg_test_error_loop \n"
" cmp r6, #206 \n"
" bne secure_reg_test_error_loop \n"
" cmp r7, #207 \n"
" bne secure_reg_test_error_loop \n"
" cmp r8, #208 \n"
" bne secure_reg_test_error_loop \n"
" cmp r9, #209 \n"
" bne secure_reg_test_error_loop \n"
" cmp r10, #210 \n"
" bne secure_reg_test_error_loop \n"
" cmp r11, #211 \n"
" bne secure_reg_test_error_loop \n"
" cmp r12, #212 \n"
" bne secure_reg_test_error_loop \n"
" \n"
" /* Verify that FPU registers contain correct values. */ \n"
" vmov.f32 s1, #1.0 \n"
" vcmp.f32 s0, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #2.0 \n"
" vcmp.f32 s2, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #3.5 \n"
" vcmp.f32 s3, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #4.5 \n"
" vcmp.f32 s4, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #5.0 \n"
" vcmp.f32 s5, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #6.0 \n"
" vcmp.f32 s6, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #7.5 \n"
" vcmp.f32 s7, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #8.5 \n"
" vcmp.f32 s8, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #9.0 \n"
" vcmp.f32 s9, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #10.0 \n"
" vcmp.f32 s10, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #11.5 \n"
" vcmp.f32 s11, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #12.5 \n"
" vcmp.f32 s12, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #13.0 \n"
" vcmp.f32 s13, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #14.0 \n"
" vcmp.f32 s14, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #1.5 \n"
" vcmp.f32 s15, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #2.5 \n"
" vcmp.f32 s16, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #3.0 \n"
" vcmp.f32 s17, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #4.0 \n"
" vcmp.f32 s18, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #5.5 \n"
" vcmp.f32 s19, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #6.5 \n"
" vcmp.f32 s20, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #7.0 \n"
" vcmp.f32 s21, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #8.0 \n"
" vcmp.f32 s22, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #9.5 \n"
" vcmp.f32 s23, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #10.5 \n"
" vcmp.f32 s24, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #11.0 \n"
" vcmp.f32 s25, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #12.0 \n"
" vcmp.f32 s26, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #13.5 \n"
" vcmp.f32 s27, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #14.5 \n"
" vcmp.f32 s28, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #1.0 \n"
" vcmp.f32 s29, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #2.0 \n"
" vcmp.f32 s30, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" vmov.f32 s1, #3.5 \n"
" vcmp.f32 s31, s1 \n"
" vmrs APSR_nzcv, FPSCR \n"
" bne secure_reg_test_error_loop \n"
" \n"
" /* Everything passed, finish. */ \n"
" b secure_reg_test_success \n"
" \n"
"secure_reg_test_error_loop: \n"
" /* If this line is hit then there was an error in \n"
" * a core register value. The loop ensures the \n"
" * loop counter stops incrementing. */ \n"
" b secure_reg_test_error_loop \n"
" nop \n"
" \n"
"secure_reg_test_success: \n"
" /* Restore callee saved registers. */ \n"
" pop { r4-r12 } \n"
);
}
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback )
{
NonSecureRegTestCallback_t pxNonSecureRegTestCallback;
/* Return function pointer with cleared LSB. */
pxNonSecureRegTestCallback = ( NonSecureRegTestCallback_t ) cmse_nsfptr_create( pxRegTestCallback );
/* Invoke the callback which runs reg tests. */
pxNonSecureRegTestCallback();
}
/*-----------------------------------------------------------*/

49
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/GCC/ARM_CM33/secure/secure_reg_test_asm.h Normal file
View File

@@ -0,0 +1,49 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef SECURE_REG_TEST_ASM_H
#define SECURE_REG_TEST_ASM_H
/* Callback function pointer definition. */
typedef void ( * RegTestCallback_t )( void );
/**
* @brief Function that implements reg tests for the secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side.
*/
void vRegTestAsm_Secure( void );
/**
* @brief Invokes the supplied reg test callback on the non-secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side..
*/
void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback );
#endif /* SECURE_REG_TEST_ASM_H */

46
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.h Normal file
View File

@@ -0,0 +1,46 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef REG_TEST_ASM_H
#define REG_TEST_ASM_H
/**
* @brief Functions that implement reg tests in assembly.
*
* These are called from the FreeRTOS tasks on the non-secure side.
*/
void vRegTest1Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest2Asm_NonSecure( void ) __attribute__( ( naked ) );
/**
* @brief Function that implements reg tests in assembly.
*
* This is passed as function pointer to the secure side and called
* from the secure side.
*/
void vRegTestAsm_NonSecureCallback( void );
#endif /* REG_TEST_ASM_H */

298
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM23/non_secure/reg_test_asm.s Normal file
View File

@@ -0,0 +1,298 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/*
* "Reg tests" - These tests fill the registers with known values, then check
* that each register maintains its expected value for the lifetime of the
* task. Each task uses a different set of values. The reg test tasks execute
* with a very low priority, so get preempted very frequently. A register
* containing an unexpected value is indicative of an error in the context
* switching mechanism.
*/
SECTION .text:CODE:NOROOT(2)
THUMB
EXTERN ulRegTest1LoopCounter
EXTERN ulRegTest2LoopCounter
PUBLIC vRegTest1Asm_NonSecure
PUBLIC vRegTest2Asm_NonSecure
PUBLIC vRegTestAsm_NonSecureCallback
/*-----------------------------------------------------------*/
vRegTest1Asm_NonSecure:
/* Fill the core registers with known values. */
movs r1, #101
movs r2, #102
movs r3, #103
movs r4, #104
movs r5, #105
movs r6, #106
movs r7, #107
movs r0, #108
mov r8, r0
movs r0, #109
mov r9, r0
movs r0, #110
mov r10, r0
movs r0, #111
mov r11, r0
movs r0, #112
mov r12, r0
movs r0, #100
reg1_loop:
/* Verify that core registers contain correct values. */
cmp r0, #100
bne reg1_error_loop
cmp r1, #101
bne reg1_error_loop
cmp r2, #102
bne reg1_error_loop
cmp r3, #103
bne reg1_error_loop
cmp r4, #104
bne reg1_error_loop
cmp r5, #105
bne reg1_error_loop
cmp r6, #106
bne reg1_error_loop
cmp r7, #107
bne reg1_error_loop
movs r0, #108
cmp r8, r0
bne reg1_error_loop
movs r0, #109
cmp r9, r0
bne reg1_error_loop
movs r0, #110
cmp r10, r0
bne reg1_error_loop
movs r0, #111
cmp r11, r0
bne reg1_error_loop
movs r0, #112
cmp r12, r0
bne reg1_error_loop
/* Everything passed, inc the loop counter. */
push { r1 }
ldr r0, =ulRegTest1LoopCounter
ldr r1, [r0]
adds r1, r1, #1
str r1, [r0]
/* Yield to increase test coverage. */
movs r0, #0x01
ldr r1, =0xe000ed04 /* NVIC_ICSR. */
lsls r0, r0, #28 /* Shift to PendSV bit. */
str r0, [r1]
dsb
pop { r1 }
/* Start again. */
movs r0, #100
b reg1_loop
reg1_error_loop:
/* If this line is hit then there was an error in
* a core register value. The loop ensures the
* loop counter stops incrementing. */
b reg1_error_loop
nop
/*-----------------------------------------------------------*/
vRegTest2Asm_NonSecure:
/* Fill the core registers with known values. */
movs r1, #1
movs r2, #2
movs r3, #3
movs r4, #4
movs r5, #5
movs r6, #6
movs r7, #7
movs r0, #8
mov r8, r0
movs r0, #9
mov r9, r0
movs r0, #10
mov r10, r0
movs r0, #11
mov r11, r0
movs r0, #12
mov r12, r0
movs r0, #10
reg2_loop:
/* Verify that core registers contain correct values. */
cmp r0, #10
bne reg2_error_loop
cmp r1, #1
bne reg2_error_loop
cmp r2, #2
bne reg2_error_loop
cmp r3, #3
bne reg2_error_loop
cmp r4, #4
bne reg2_error_loop
cmp r5, #5
bne reg2_error_loop
cmp r6, #6
bne reg2_error_loop
cmp r7, #7
bne reg2_error_loop
movs r0, #8
cmp r8, r0
bne reg2_error_loop
movs r0, #9
cmp r9, r0
bne reg2_error_loop
movs r0, #10
cmp r10, r0
bne reg2_error_loop
movs r0, #11
cmp r11, r0
bne reg2_error_loop
movs r0, #12
cmp r12, r0
bne reg2_error_loop
/* Everything passed, inc the loop counter. */
push { r1 }
ldr r0, =ulRegTest2LoopCounter
ldr r1, [r0]
adds r1, r1, #1
str r1, [r0]
pop { r1 }
/* Start again. */
movs r0, #10
b reg2_loop
reg2_error_loop:
/* If this line is hit then there was an error in
* a core register value. The loop ensures the
* loop counter stops incrementing. */
b reg2_error_loop
nop
/*-----------------------------------------------------------*/
vRegTestAsm_NonSecureCallback:
/* Store callee saved registers. */
push { r4-r7 }
mov r0, r8
mov r1, r9
mov r2, r10
mov r3, r11
mov r4, r12
push { r0-r4 }
/* Fill the core registers with known values. */
movs r1, #151
movs r2, #152
movs r3, #153
movs r4, #154
movs r5, #155
movs r6, #156
movs r7, #157
movs r0, #158
mov r8, r0
movs r0, #159
mov r9, r0
movs r0, #160
mov r10, r0
movs r0, #161
mov r11, r0
movs r0, #162
mov r12, r0
movs r0, #150
/* Force a context switch by pending non-secure sv. */
push { r0, r1 }
movs r0, #0x01
ldr r1, =0xe000ed04 /* NVIC_ICSR. */
lsls r0, r0, #28 /* Shift to PendSV bit. */
str r0, [r1]
dsb
pop { r0, r1 }
/* Verify that core registers contain correct values. */
cmp r0, #150
bne reg_nscb_error_loop
cmp r1, #151
bne reg_nscb_error_loop
cmp r2, #152
bne reg_nscb_error_loop
cmp r3, #153
bne reg_nscb_error_loop
cmp r4, #154
bne reg_nscb_error_loop
cmp r5, #155
bne reg_nscb_error_loop
cmp r6, #156
bne reg_nscb_error_loop
cmp r7, #157
bne reg_nscb_error_loop
movs r0, #158
cmp r8, r0
bne reg_nscb_error_loop
movs r0, #159
cmp r9, r0
bne reg_nscb_error_loop
movs r0, #160
cmp r10, r0
bne reg_nscb_error_loop
movs r0, #161
cmp r11, r0
bne reg_nscb_error_loop
movs r0, #162
cmp r12, r0
bne reg_nscb_error_loop
/* Everything passed, finish. */
b reg_nscb_success
reg_nscb_error_loop:
/* If this line is hit then there was an error in
* a core register value. The loop ensures the
* loop counter stops incrementing. */
b reg_nscb_error_loop
nop
reg_nscb_success:
/* Restore callee saved registers. */
pop { r0-r4 }
mov r8, r0
mov r9, r1
mov r10, r2
mov r11, r3
mov r12, r4
pop { r4-r7 }
bx lr
/*-----------------------------------------------------------*/
END

61
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test.c Normal file
View File

@@ -0,0 +1,61 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* Standard includes. */
#include <stdint.h>
#include <arm_cmse.h>
/* Interface includes. */
#include "secure_reg_test_asm.h"
/* FreeRTOS includes. */
#include "secure_port_macros.h"
/* Implemented in assembly. */
extern void vRegTestAsm_SecureImpl( void );
/* typedef for non-secure callback function. */
typedef __cmse_nonsecure_call void ( * NonSecureRegTestCallback_t ) ( void );
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTestAsm_Secure( void )
{
/* Call the function implemented in assembly. */
vRegTestAsm_SecureImpl();
}
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback )
{
NonSecureRegTestCallback_t pxNonSecureRegTestCallback;
/* Return function pointer with cleared LSB. */
pxNonSecureRegTestCallback = ( NonSecureRegTestCallback_t ) cmse_nsfptr_create( pxRegTestCallback );
/* Invoke the callback which runs reg tests. */
pxNonSecureRegTestCallback();
}
/*-----------------------------------------------------------*/

49
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.h Normal file
View File

@@ -0,0 +1,49 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef SECURE_REG_TEST_ASM_H
#define SECURE_REG_TEST_ASM_H
/* Callback function pointer definition. */
typedef void ( * RegTestCallback_t )( void );
/**
* @brief Function that implements reg tests for the secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side.
*/
void vRegTestAsm_Secure( void );
/**
* @brief Invokes the supplied reg test callback on the non-secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side..
*/
void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback );
#endif /* SECURE_REG_TEST_ASM_H */

127
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM23/secure/secure_reg_test_asm.s Normal file
View File

@@ -0,0 +1,127 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
SECTION .text:CODE:NOROOT(2)
THUMB
PUBLIC vRegTestAsm_SecureImpl
/*-----------------------------------------------------------*/
vRegTestAsm_SecureImpl:
/* Store callee saved registers. */
push { r4-r7 }
mov r0, r8
mov r1, r9
mov r2, r10
mov r3, r11
mov r4, r12
push { r0-r4 }
/* Fill the core registers with known values. */
movs r1, #201
movs r2, #202
movs r3, #203
movs r4, #204
movs r5, #205
movs r6, #206
movs r7, #207
movs r0, #208
mov r8, r0
movs r0, #209
mov r9, r0
movs r0, #210
mov r10, r0
movs r0, #211
mov r11, r0
movs r0, #212
mov r12, r0
movs r0, #200
/* Force a context switch by pending non-secure sv. */
push { r0, r1 }
movs r0, #0x01
ldr r1, =0xe002ed04 /* NVIC_ICSR_NS. */
lsls r0, r0, #28 /* Shift to PendSV bit. */
str r0, [r1]
dsb
pop { r0, r1 }
/* Verify that core registers contain correct values. */
cmp r0, #200
bne secure_reg_test_error_loop
cmp r1, #201
bne secure_reg_test_error_loop
cmp r2, #202
bne secure_reg_test_error_loop
cmp r3, #203
bne secure_reg_test_error_loop
cmp r4, #204
bne secure_reg_test_error_loop
cmp r5, #205
bne secure_reg_test_error_loop
cmp r6, #206
bne secure_reg_test_error_loop
cmp r7, #207
bne secure_reg_test_error_loop
movs r0, #208
cmp r8, r0
bne secure_reg_test_error_loop
movs r0, #209
cmp r9, r0
bne secure_reg_test_error_loop
movs r0, #210
cmp r10, r0
bne secure_reg_test_error_loop
movs r0, #211
cmp r11, r0
bne secure_reg_test_error_loop
movs r0, #212
cmp r12, r0
bne secure_reg_test_error_loop
/* Everything passed, finish. */
b secure_reg_test_success
secure_reg_test_error_loop:
/* If this line is hit then there was an error in
* a core register value. The loop ensures the
* loop counter stops incrementing. */
b secure_reg_test_error_loop
nop
secure_reg_test_success:
/* Restore callee saved registers. */
pop { r0-r4 }
mov r8, r0
mov r9, r1
mov r10, r2
mov r11, r3
mov r12, r4
pop { r4-r7 }
bx lr
/*-----------------------------------------------------------*/
END

48
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM33/non_secure/reg_test_asm.h Normal file
View File

@@ -0,0 +1,48 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef REG_TEST_ASM_H
#define REG_TEST_ASM_H
/**
* @brief Functions that implement reg tests in assembly.
*
* These are called from the FreeRTOS tasks on the non-secure side.
*/
void vRegTest1Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest2Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest3Asm_NonSecure( void ) __attribute__( ( naked ) );
void vRegTest4Asm_NonSecure( void ) __attribute__( ( naked ) );
/**
* @brief Function that implements reg tests in assembly.
*
* This is passed as function pointer to the secure side and called
* from the secure side.
*/
void vRegTestAsm_NonSecureCallback( void );
#endif /* REG_TEST_ASM_H */

1194
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM33/non_secure/reg_test_asm.s Normal file
View File

File diff suppressed because it is too large Load Diff

61
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM33/secure/secure_reg_test.c Normal file
View File

@@ -0,0 +1,61 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* Standard includes. */
#include <stdint.h>
#include <arm_cmse.h>
/* Interface includes. */
#include "secure_reg_test_asm.h"
/* FreeRTOS includes. */
#include "secure_port_macros.h"
/* Implemented in assembly. */
extern void vRegTestAsm_SecureImpl( void );
/* typedef for non-secure callback function. */
typedef __cmse_nonsecure_call void ( * NonSecureRegTestCallback_t ) ( void );
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTestAsm_Secure( void )
{
/* Call the function implemented in assembly. */
vRegTestAsm_SecureImpl();
}
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback )
{
NonSecureRegTestCallback_t pxNonSecureRegTestCallback;
/* Return function pointer with cleared LSB. */
pxNonSecureRegTestCallback = ( NonSecureRegTestCallback_t ) cmse_nsfptr_create( pxRegTestCallback );
/* Invoke the callback which runs reg tests. */
pxNonSecureRegTestCallback();
}
/*-----------------------------------------------------------*/

49
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM33/secure/secure_reg_test_asm.h Normal file
View File

@@ -0,0 +1,49 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef SECURE_REG_TEST_ASM_H
#define SECURE_REG_TEST_ASM_H
/* Callback function pointer definition. */
typedef void ( * RegTestCallback_t )( void );
/**
* @brief Function that implements reg tests for the secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side.
*/
void vRegTestAsm_Secure( void );
/**
* @brief Invokes the supplied reg test callback on the non-secure side.
*
* This function is exported as "non-secure callable" and is called
* from a FreeRTOS task on the non-secure side..
*/
void vRegTest_NonSecureCallback( RegTestCallback_t pxRegTestCallback );
#endif /* SECURE_REG_TEST_ASM_H */

265
SOFTWARE-FreeRTOS/Common/ARMv8M/reg_tests/IAR/ARM_CM33/secure/secure_reg_test_asm.s Normal file
View File

@@ -0,0 +1,265 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
SECTION .text:CODE:NOROOT(2)
THUMB
PUBLIC vRegTestAsm_SecureImpl
/*-----------------------------------------------------------*/
vRegTestAsm_SecureImpl:
/* Store callee saved registers. */
push { r4-r12 }
/* Fill the core registers with known values. */
movs r0, #200
movs r1, #201
movs r1, #201
movs r2, #202
movs r3, #203
movs r4, #204
movs r5, #205
movs r6, #206
movs r7, #207
movs r8, #208
movs r9, #209
movs r10, #210
movs r11, #211
movs r12, #212
/* Fill the FPU registers with known values. */
vmov.f32 s0, #1.0
vmov.f32 s2, #2.0
vmov.f32 s3, #3.5
vmov.f32 s4, #4.5
vmov.f32 s5, #5.0
vmov.f32 s6, #6.0
vmov.f32 s7, #7.5
vmov.f32 s8, #8.5
vmov.f32 s9, #9.0
vmov.f32 s10, #10.0
vmov.f32 s11, #11.5
vmov.f32 s12, #12.5
vmov.f32 s13, #13.0
vmov.f32 s14, #14.0
vmov.f32 s15, #1.5
vmov.f32 s16, #2.5
vmov.f32 s17, #3.0
vmov.f32 s18, #4.0
vmov.f32 s19, #5.5
vmov.f32 s20, #6.5
vmov.f32 s21, #7.0
vmov.f32 s22, #8.0
vmov.f32 s23, #9.5
vmov.f32 s24, #10.5
vmov.f32 s25, #11.0
vmov.f32 s26, #12.0
vmov.f32 s27, #13.5
vmov.f32 s28, #14.5
vmov.f32 s29, #1.0
vmov.f32 s30, #2.0
vmov.f32 s31, #3.5
/* Force a context switch by pending non-secure sv. */
push { r0, r1 }
movs r0, #0x01
ldr r1, =0xe002ed04 /* NVIC_ICSR_NS. */
lsls r0, #28 /* Shift to PendSV bit. */
str r0, [r1]
dsb
pop { r0, r1 }
/* Verify that core registers contain correct values. */
cmp r0, #200
bne secure_reg_test_error_loop
cmp r1, #201
bne secure_reg_test_error_loop
cmp r2, #202
bne secure_reg_test_error_loop
cmp r3, #203
bne secure_reg_test_error_loop
cmp r4, #204
bne secure_reg_test_error_loop
cmp r5, #205
bne secure_reg_test_error_loop
cmp r6, #206
bne secure_reg_test_error_loop
cmp r7, #207
bne secure_reg_test_error_loop
cmp r8, #208
bne secure_reg_test_error_loop
cmp r9, #209
bne secure_reg_test_error_loop
cmp r10, #210
bne secure_reg_test_error_loop
cmp r11, #211
bne secure_reg_test_error_loop
cmp r12, #212
bne secure_reg_test_error_loop
/* Verify that FPU registers contain correct values. */
vmov.f32 s1, #1.0
vcmp.f32 s0, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #2.0
vcmp.f32 s2, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #3.5
vcmp.f32 s3, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #4.5
vcmp.f32 s4, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #5.0
vcmp.f32 s5, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #6.0
vcmp.f32 s6, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #7.5
vcmp.f32 s7, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #8.5
vcmp.f32 s8, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #9.0
vcmp.f32 s9, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #10.0
vcmp.f32 s10, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #11.5
vcmp.f32 s11, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #12.5
vcmp.f32 s12, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #13.0
vcmp.f32 s13, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #14.0
vcmp.f32 s14, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #1.5
vcmp.f32 s15, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #2.5
vcmp.f32 s16, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #3.0
vcmp.f32 s17, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #4.0
vcmp.f32 s18, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #5.5
vcmp.f32 s19, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #6.5
vcmp.f32 s20, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #7.0
vcmp.f32 s21, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #8.0
vcmp.f32 s22, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #9.5
vcmp.f32 s23, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #10.5
vcmp.f32 s24, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #11.0
vcmp.f32 s25, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #12.0
vcmp.f32 s26, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #13.5
vcmp.f32 s27, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #14.5
vcmp.f32 s28, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #1.0
vcmp.f32 s29, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #2.0
vcmp.f32 s30, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
vmov.f32 s1, #3.5
vcmp.f32 s31, s1
vmrs APSR_nzcv, FPSCR
bne secure_reg_test_error_loop
/* Everything passed, finish. */
b secure_reg_test_success
secure_reg_test_error_loop:
/* If this line is hit then there was an error in
* a core register value. The loop ensures the
* loop counter stops incrementing. */
b secure_reg_test_error_loop
nop
secure_reg_test_success:
/* Restore callee saved registers. */
pop { r4-r12 }
bx lr
/*-----------------------------------------------------------*/
END

58
SOFTWARE-FreeRTOS/Common/ARMv8M/tz_demo/nsc_functions.c Normal file
View File

@@ -0,0 +1,58 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#include <arm_cmse.h>
#include "nsc_functions.h"
#include "secure_port_macros.h"
/**
* @brief Counter returned from NSCFunction.
*/
static uint32_t ulSecureCounter = 0;
/**
* @brief typedef for non-secure callback.
*/
typedef void ( *NonSecureCallback_t )( void ) __attribute__( ( cmse_nonsecure_call ) );
/*-----------------------------------------------------------*/
secureportNON_SECURE_CALLABLE uint32_t NSCFunction( Callback_t pxCallback )
{
NonSecureCallback_t pxNonSecureCallback;
/* Return function pointer with cleared LSB. */
pxNonSecureCallback = ( NonSecureCallback_t ) cmse_nsfptr_create( pxCallback );
/* Invoke the supplied callback. */
pxNonSecureCallback();
/* Increment the secure side counter. */
ulSecureCounter += 1;
/* Return the secure side counter. */
return ulSecureCounter;
}
/*-----------------------------------------------------------*/

50
SOFTWARE-FreeRTOS/Common/ARMv8M/tz_demo/nsc_functions.h Normal file
View File

@@ -0,0 +1,50 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef __NSC_FUNCTIONS_H__
#define __NSC_FUNCTIONS_H__
#include <stdint.h>
/**
* @brief Callback function pointer definition.
*/
typedef void ( * Callback_t ) ( void );
/**
* @brief Invokes the supplied callback which is on the non-secure side.
*
* Returns a number which is one more than the value returned in previous
* invocation of this function. Initial invocation returns 1.
*
* @param pxCallback[in] The callback to invoke.
*
* @return A number which is one more than the value returned in previous
* invocation of this function.
*/
uint32_t NSCFunction( Callback_t pxCallback );
#endif /* __NSC_FUNCTIONS_H__ */

133
SOFTWARE-FreeRTOS/Common/ARMv8M/tz_demo/tz_demo.c Normal file
View File

@@ -0,0 +1,133 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Non-Secure callable functions. */
#include "nsc_functions.h"
/**
* @brief Counter incremented in the callback which is called from the secure
* side.
*
* The size of an MPU region must be a multiple of 32 bytes. Therefore we need
* to declare an array of size 8 to ensure that the total size is 32 bytes -
* even though we only need 4 bytes. If we do not do that, anything placed after
* 4 bytes and upto 32 bytes will also fall in the same MPU region and the task
* having access to ulNonSecureCounter will also have access to all those items.
*/
static uint32_t ulNonSecureCounter[ 8 ] __attribute__( ( aligned( 32 ) ) ) = { 0 };
/*-----------------------------------------------------------*/
/**
* @brief Creates all the tasks for TZ demo.
*/
void vStartTZDemo( void );
/**
* @brief Increments the ulNonSecureCounter.
*
* This function is called from the secure side.
*/
static void prvCallback( void );
/**
* @brief Implements the task which calls the functions exported from the secure
* side.
*
* @param pvParameters[in] Parameters as passed during task creation.
*/
static void prvSecureCallingTask( void * pvParameters );
/*-----------------------------------------------------------*/
void vStartTZDemo( void )
{
static StackType_t xSecureCallingTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) );
TaskParameters_t xSecureCallingTaskParameters =
{
.pvTaskCode = prvSecureCallingTask,
.pcName = "SecCalling",
.usStackDepth = configMINIMAL_STACK_SIZE,
.pvParameters = NULL,
.uxPriority = tskIDLE_PRIORITY,
.puxStackBuffer = xSecureCallingTaskStack,
.xRegions =
{
{ ulNonSecureCounter, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER },
{ 0, 0, 0 },
{ 0, 0, 0 },
}
};
/* Create an unprivileged task which calls secure functions. */
xTaskCreateRestricted( &( xSecureCallingTaskParameters ), NULL );
}
/*-----------------------------------------------------------*/
static void prvCallback( void )
{
/* This function is called from the secure side. Just increment the counter
* here. The check that this counter keeps incrementing is performed in the
* prvSecureCallingTask. */
ulNonSecureCounter[ 0 ] += 1;
}
/*-----------------------------------------------------------*/
static void prvSecureCallingTask( void * pvParameters )
{
uint32_t ulLastSecureCounter = 0, ulLastNonSecureCounter = 0;
uint32_t ulCurrentSecureCounter = 0;
/* This task calls secure side functions. So allocate a secure context for
* it. */
portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
for( ; ; )
{
/* Call the secure side function. It does two things:
* - It calls the supplied function (prvCallback) which in turn
* increments the non-secure counter.
* - It increments the secure counter and returns the incremented value.
* Therefore at the end of this function call both the secure and
* non-secure counters must have been incremented.
*/
ulCurrentSecureCounter = NSCFunction( prvCallback );
/* Make sure that both the counters are incremented. */
configASSERT( ulCurrentSecureCounter == ulLastSecureCounter + 1 );
configASSERT( ulNonSecureCounter[ 0 ] == ulLastNonSecureCounter + 1 );
/* Update the last values for both the counters. */
ulLastSecureCounter = ulCurrentSecureCounter;
ulLastNonSecureCounter = ulNonSecureCounter[ 0 ];
/* Wait for a second. */
vTaskDelay( pdMS_TO_TICKS( 1000 ) );
}
}
/*-----------------------------------------------------------*/

44
SOFTWARE-FreeRTOS/Common/ARMv8M/tz_demo/tz_demo.h Normal file
View File

@@ -0,0 +1,44 @@
/*
* FreeRTOS V202212.00
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* https://www.FreeRTOS.org
* https://github.com/FreeRTOS
*
*/
#ifndef __TZ_DEMO_H__
#define __TZ_DEMO_H__
/**
* @brief Creates all the tasks for TZ demo.
*
* The Trust Zone (TZ) demo creates an unprivileged task which calls a secure
* side function and passes a pointer to a callback function. The secure side
* function does two things:
* 1. It calls the provided callback function. The callback function increments
* a counter.
* 2. It increments a counter and returns the incremented value.
* After the secure function call finishes, it verifies that both the counters
* are incremented.
*/
void vStartTZDemo( void );
#endif /* __TZ_DEMO_H__ */