62 lines
2.0 KiB
Plaintext
62 lines
2.0 KiB
Plaintext
;
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; Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
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.program uart_tx
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.side_set 1 opt
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; An 8n1 UART transmit program.
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; OUT pin 0 and side-set pin 0 are both mapped to UART TX pin.
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pull side 1 [7] ; Assert stop bit, or stall with line in idle state
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set x, 7 side 0 [7] ; Preload bit counter, assert start bit for 8 clocks
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bitloop: ; This loop will run 8 times (8n1 UART)
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out pins, 1 ; Shift 1 bit from OSR to the first OUT pin
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jmp x-- bitloop [6] ; Each loop iteration is 8 cycles.
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% c-sdk {
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#include "hardware/clocks.h"
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static inline void uart_tx_program_init(PIO pio, uint sm, uint offset, uint pin_tx, uint baud) {
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// Tell PIO to initially drive output-high on the selected pin, then map PIO
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// onto that pin with the IO muxes.
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pio_sm_set_pins_with_mask(pio, sm, 1u << pin_tx, 1u << pin_tx);
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pio_sm_set_pindirs_with_mask(pio, sm, 1u << pin_tx, 1u << pin_tx);
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pio_gpio_init(pio, pin_tx);
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pio_sm_config c = uart_tx_program_get_default_config(offset);
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// OUT shifts to right, no autopull
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sm_config_set_out_shift(&c, true, false, 32);
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// We are mapping both OUT and side-set to the same pin, because sometimes
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// we need to assert user data onto the pin (with OUT) and sometimes
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// assert constant values (start/stop bit)
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sm_config_set_out_pins(&c, pin_tx, 1);
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sm_config_set_sideset_pins(&c, pin_tx);
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// We only need TX, so get an 8-deep FIFO!
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sm_config_set_fifo_join(&c, PIO_FIFO_JOIN_TX);
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// SM transmits 1 bit per 8 execution cycles.
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float div = (float)clock_get_hz(clk_sys) / (8 * baud);
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sm_config_set_clkdiv(&c, div);
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pio_sm_init(pio, sm, offset, &c);
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pio_sm_set_enabled(pio, sm, true);
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}
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static inline void uart_tx_program_putc(PIO pio, uint sm, char c) {
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pio_sm_put_blocking(pio, sm, (uint32_t)c);
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}
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static inline void uart_tx_program_puts(PIO pio, uint sm, const char *s) {
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while (*s)
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uart_tx_program_putc(pio, sm, *s++);
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}
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%}
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