287 lines
15 KiB
C
287 lines
15 KiB
C
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/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
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* File Name : stm32f10x_i2c.h
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* Author : MCD Application Team
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* Date First Issued : 09/29/2006
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* Description : This file contains all the functions prototypes for the
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* I2C firmware library.
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********************************************************************************
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* History:
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* 04/02/2007: V0.2
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* 02/05/2007: V0.1
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* 09/29/2006: V0.01
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F10x_I2C_H
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#define __STM32F10x_I2C_H
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_map.h"
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/* Exported types ------------------------------------------------------------*/
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/* I2C Init structure definition */
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typedef struct
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{
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u16 I2C_Mode;
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u16 I2C_DutyCycle;
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u16 I2C_OwnAddress1;
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u16 I2C_Ack;
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u16 I2C_AcknowledgedAddress;
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u32 I2C_ClockSpeed;
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}I2C_InitTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/* I2C modes */
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#define I2C_Mode_I2C ((u16)0x0000)
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#define I2C_Mode_SMBusDevice ((u16)0x0002)
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#define I2C_Mode_SMBusHost ((u16)0x000A)
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#define IS_I2C_MODE(MODE) ((MODE == I2C_Mode_I2C) || \
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(MODE == I2C_Mode_SMBusDevice) || \
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(MODE == I2C_Mode_SMBusHost))
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/* I2C duty cycle in fast mode */
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#define I2C_DutyCycle_16_9 ((u16)0x4000)
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#define I2C_DutyCycle_2 ((u16)0xBFFF)
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#define IS_I2C_DUTY_CYCLE(CYCLE) ((CYCLE == I2C_DutyCycle_16_9) || \
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(CYCLE == I2C_DutyCycle_2))
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/* I2C cknowledgementy */
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#define I2C_Ack_Enable ((u16)0x0400)
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#define I2C_Ack_Disable ((u16)0x0000)
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#define IS_I2C_ACK_STATE(STATE) ((STATE == I2C_Ack_Enable) || \
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(STATE == I2C_Ack_Disable))
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/* I2C transfer direction */
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#define I2C_Direction_Transmitter ((u8)0x00)
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#define I2C_Direction_Receiver ((u8)0x01)
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#define IS_I2C_DIRECTION(DIRECTION) ((DIRECTION == I2C_Direction_Transmitter) || \
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(DIRECTION == I2C_Direction_Receiver))
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/* I2C acknowledged address defines */
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#define I2C_AcknowledgedAddress_7bit ((u16)0x4000)
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#define I2C_AcknowledgedAddress_10bit ((u16)0xC000)
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#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) ((ADDRESS == I2C_AcknowledgedAddress_7bit) || \
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(ADDRESS == I2C_AcknowledgedAddress_10bit))
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/* I2C registers */
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#define I2C_Register_CR1 ((u8)0x00)
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#define I2C_Register_CR2 ((u8)0x04)
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#define I2C_Register_OAR1 ((u8)0x08)
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#define I2C_Register_OAR2 ((u8)0x0C)
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#define I2C_Register_DR ((u8)0x10)
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#define I2C_Register_SR1 ((u8)0x14)
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#define I2C_Register_SR2 ((u8)0x18)
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#define I2C_Register_CCR ((u8)0x1C)
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#define I2C_Register_TRISE ((u8)0x20)
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#define IS_I2C_REGISTER(REGISTER) ((REGISTER == I2C_Register_CR1) || \
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(REGISTER == I2C_Register_CR2) || \
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(REGISTER == I2C_Register_OAR1) || \
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(REGISTER == I2C_Register_OAR2) || \
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(REGISTER == I2C_Register_DR) || \
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(REGISTER == I2C_Register_SR1) || \
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(REGISTER == I2C_Register_SR2) || \
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(REGISTER == I2C_Register_CCR) || \
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(REGISTER == I2C_Register_TRISE))
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/* I2C SMBus alert pin level */
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#define I2C_SMBusAlert_Low ((u16)0x2000)
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#define I2C_SMBusAlert_High ((u16)0xCFFF)
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#define IS_I2C_SMBUS_ALERT(ALERT) ((ALERT == I2C_SMBusAlert_Low) || \
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(ALERT == I2C_SMBusAlert_High))
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/* I2C PEC position */
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#define I2C_PECPosition_Next ((u16)0x0800)
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#define I2C_PECPosition_Current ((u16)0xF7FF)
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#define IS_I2C_PEC_POSITION(POSITION) ((POSITION == I2C_PECPosition_Next) || \
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(POSITION == I2C_PECPosition_Current))
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/* I2C interrupts definition */
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#define I2C_IT_BUF ((u16)0x0400)
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#define I2C_IT_EVT ((u16)0x0200)
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#define I2C_IT_ERR ((u16)0x0100)
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#define IS_I2C_CONFIG_IT(IT) (((IT & (u16)0xF8FF) == 0x00) && (IT != 0x00))
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/* I2C interrupts definition */
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#define I2C_IT_SMBALERT ((u32)0x10008000)
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#define I2C_IT_TIMEOUT ((u32)0x10004000)
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#define I2C_IT_PECERR ((u32)0x10001000)
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#define I2C_IT_OVR ((u32)0x10000800)
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#define I2C_IT_AF ((u32)0x10000400)
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#define I2C_IT_ARLO ((u32)0x10000200)
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#define I2C_IT_BERR ((u32)0x10000100)
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#define I2C_IT_TXE ((u32)0x00000080)
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#define I2C_IT_RXNE ((u32)0x00000040)
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#define I2C_IT_STOPF ((u32)0x60000010)
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#define I2C_IT_ADD10 ((u32)0x20000008)
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#define I2C_IT_BTF ((u32)0x60000004)
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#define I2C_IT_ADDR ((u32)0xA0000002)
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#define I2C_IT_SB ((u32)0x20000001)
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#define IS_I2C_CLEAR_IT(IT) ((IT == I2C_IT_SMBALERT) || (IT == I2C_IT_TIMEOUT) || \
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(IT == I2C_IT_PECERR) || (IT == I2C_IT_OVR) || \
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(IT == I2C_IT_AF) || (IT == I2C_IT_ARLO) || \
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(IT == I2C_IT_BERR) || (IT == I2C_IT_STOPF) || \
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(IT == I2C_IT_ADD10) || (IT == I2C_IT_BTF) || \
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(IT == I2C_IT_ADDR) || (IT == I2C_IT_SB))
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#define IS_I2C_GET_IT(IT) ((IT == I2C_IT_SMBALERT) || (IT == I2C_IT_TIMEOUT) || \
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(IT == I2C_IT_PECERR) || (IT == I2C_IT_OVR) || \
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(IT == I2C_IT_AF) || (IT == I2C_IT_ARLO) || \
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(IT == I2C_IT_BERR) || (IT == I2C_IT_TXE) || \
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(IT == I2C_IT_RXNE) || (IT == I2C_IT_STOPF) || \
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(IT == I2C_IT_ADD10) || (IT == I2C_IT_BTF) || \
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(IT == I2C_IT_ADDR) || (IT == I2C_IT_SB))
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/* I2C flags definition */
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#define I2C_FLAG_DUALF ((u32)0x00800000)
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#define I2C_FLAG_SMBHOST ((u32)0x00400000)
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#define I2C_FLAG_SMBDEFAULT ((u32)0x00200000)
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#define I2C_FLAG_GENCALL ((u32)0x00100000)
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#define I2C_FLAG_TRA ((u32)0x00040000)
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#define I2C_FLAG_BUSY ((u32)0x00020000)
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#define I2C_FLAG_MSL ((u32)0x00010000)
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#define I2C_FLAG_SMBALERT ((u32)0x10008000)
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#define I2C_FLAG_TIMEOUT ((u32)0x10004000)
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#define I2C_FLAG_PECERR ((u32)0x10001000)
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#define I2C_FLAG_OVR ((u32)0x10000800)
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#define I2C_FLAG_AF ((u32)0x10000400)
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#define I2C_FLAG_ARLO ((u32)0x10000200)
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#define I2C_FLAG_BERR ((u32)0x10000100)
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#define I2C_FLAG_TXE ((u32)0x00000080)
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#define I2C_FLAG_RXNE ((u32)0x00000040)
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#define I2C_FLAG_STOPF ((u32)0x60000010)
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#define I2C_FLAG_ADD10 ((u32)0x20000008)
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#define I2C_FLAG_BTF ((u32)0x60000004)
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#define I2C_FLAG_ADDR ((u32)0xA0000002)
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#define I2C_FLAG_SB ((u32)0x20000001)
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#define IS_I2C_CLEAR_FLAG(FLAG) ((FLAG == I2C_FLAG_SMBALERT) || (FLAG == I2C_FLAG_TIMEOUT) || \
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(FLAG == I2C_FLAG_PECERR) || (FLAG == I2C_FLAG_OVR) || \
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(FLAG == I2C_FLAG_AF) || (FLAG == I2C_FLAG_ARLO) || \
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(FLAG == I2C_FLAG_BERR) || (FLAG == I2C_FLAG_STOPF) || \
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(FLAG == I2C_FLAG_ADD10) || (FLAG == I2C_FLAG_BTF) || \
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(FLAG == I2C_FLAG_ADDR) || (FLAG == I2C_FLAG_SB))
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#define IS_I2C_GET_FLAG(FLAG) ((FLAG == I2C_FLAG_DUALF) || (FLAG == I2C_FLAG_SMBHOST) || \
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(FLAG == I2C_FLAG_SMBDEFAULT) || (FLAG == I2C_FLAG_GENCALL) || \
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(FLAG == I2C_FLAG_TRA) || (FLAG == I2C_FLAG_BUSY) || \
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(FLAG == I2C_FLAG_MSL) || (FLAG == I2C_FLAG_SMBALERT) || \
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(FLAG == I2C_FLAG_TIMEOUT) || (FLAG == I2C_FLAG_PECERR) || \
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(FLAG == I2C_FLAG_OVR) || (FLAG == I2C_FLAG_AF) || \
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(FLAG == I2C_FLAG_ARLO) || (FLAG == I2C_FLAG_BERR) || \
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(FLAG == I2C_FLAG_TXE) || (FLAG == I2C_FLAG_RXNE) || \
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(FLAG == I2C_FLAG_STOPF) || (FLAG == I2C_FLAG_ADD10) || \
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(FLAG == I2C_FLAG_BTF) || (FLAG == I2C_FLAG_ADDR) || \
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(FLAG == I2C_FLAG_SB))
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/* I2C Events */
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/* EV1 */
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#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((u32)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
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#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((u32)0x00020002) /* BUSY and ADDR flags */
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#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((u32)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
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#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((u32)0x00820000) /* DUALF and BUSY flags */
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#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((u32)0x00120000) /* GENCALL and BUSY flags */
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/* EV2 */
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#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((u32)0x00020040) /* BUSY and RXNE flags */
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/* EV3 */
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#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((u32)0x00060084) /* TRA, BUSY, TXE and BTF flags */
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/* EV4 */
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#define I2C_EVENT_SLAVE_STOP_DETECTED ((u32)0x00000010) /* STOPF flag */
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/* EV5 */
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#define I2C_EVENT_MASTER_MODE_SELECT ((u32)0x00030001) /* BUSY, MSL and SB flag */
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/* EV6 */
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#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((u32)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
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#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((u32)0x00030002) /* BUSY, MSL and ADDR flags */
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/* EV7 */
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#define I2C_EVENT_MASTER_BYTE_RECEIVED ((u32)0x00030040) /* BUSY, MSL and RXNE flags */
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/* EV8 */
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#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((u32)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
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/* EV9 */
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#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((u32)0x00030008) /* BUSY, MSL and ADD10 flags */
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/* EV3_1 */
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#define I2C_EVENT_SLAVE_ACK_FAILURE ((u32)0x00000400) /* AF flag */
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#define IS_I2C_EVENT(EVENT) ((EVENT == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
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(EVENT == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
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(EVENT == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
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(EVENT == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
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(EVENT == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
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(EVENT == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
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(EVENT == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
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(EVENT == I2C_EVENT_SLAVE_STOP_DETECTED) || \
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(EVENT == I2C_EVENT_MASTER_MODE_SELECT) || \
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(EVENT == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
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(EVENT == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
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(EVENT == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
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(EVENT == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
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(EVENT == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
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(EVENT == I2C_EVENT_SLAVE_ACK_FAILURE))
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/* I2C own address1 -----------------------------------------------------------*/
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#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (ADDRESS1 <= 0x3FF)
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/* I2C clock speed ------------------------------------------------------------*/
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#define IS_I2C_CLOCK_SPEED(SPEED) ((SPEED >= 0x1) && (SPEED <= 400000))
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions ------------------------------------------------------- */
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void I2C_DeInit(I2C_TypeDef* I2Cx);
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void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
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void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
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void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, u8 Address);
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void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_ITConfig(I2C_TypeDef* I2Cx, u16 I2C_IT, FunctionalState NewState);
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void I2C_SendData(I2C_TypeDef* I2Cx, u8 Data);
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u8 I2C_ReceiveData(I2C_TypeDef* I2Cx);
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void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, u8 Address, u8 I2C_Direction);
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u16 I2C_ReadRegister(I2C_TypeDef* I2Cx, u8 I2C_Register);
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void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, u16 I2C_SMBusAlert);
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void I2C_TransmitPEC(I2C_TypeDef* I2Cx);
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void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, u16 I2C_PECPosition);
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void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
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u8 I2C_GetPEC(I2C_TypeDef* I2Cx);
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void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
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void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, u16 I2C_DutyCycle);
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u32 I2C_GetLastEvent(I2C_TypeDef* I2Cx);
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ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, u32 I2C_EVENT);
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FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, u32 I2C_FLAG);
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void I2C_ClearFlag(I2C_TypeDef* I2Cx, u32 I2C_FLAG);
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ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, u32 I2C_IT);
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void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, u32 I2C_IT);
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#endif /*__STM32F10x_I2C_H */
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/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/
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