282 lines
11 KiB
C
282 lines
11 KiB
C
/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2008, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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#ifndef trace_LEVEL
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#define trace_LEVEL 1
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#endif
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//------------------------------------------------------------------------------
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// Headers
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//------------------------------------------------------------------------------
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#include "twi.h"
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#include <utility/math.h>
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#include <utility/assert.h>
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#include <utility/trace.h>
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//------------------------------------------------------------------------------
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// Global functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// Configures a TWI peripheral to operate in master mode, at the given
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/// frequency (in Hz). The duty cycle of the TWI clock is set to 50%.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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/// \param twck Desired TWI clock frequency.
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/// \param mck Master clock frequency.
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//------------------------------------------------------------------------------
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void TWI_Configure(AT91S_TWI *pTwi, unsigned int twck, unsigned int mck)
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{
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unsigned int ckdiv = 0;
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unsigned int cldiv;
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unsigned char ok = 0;
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trace_LOG(trace_DEBUG, "-D- TWI_Configure()\n\r");
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SANITY_CHECK(pTwi);
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// Reset the TWI
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pTwi->TWI_CR = AT91C_TWI_SWRST;
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// Set master mode
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pTwi->TWI_CR = AT91C_TWI_MSEN;
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// Configure clock
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while (!ok) {
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cldiv = ((mck / (2 * twck)) - 3) / power(2, ckdiv);
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if (cldiv <= 255) {
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ok = 1;
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}
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else {
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ckdiv++;
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}
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}
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ASSERT(ckdiv < 8, "-F- Cannot find valid TWI clock parameters\n\r");
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trace_LOG(trace_INFO, "-D- Using CKDIV = %u and CLDIV/CHDIV = %u\n\r", ckdiv, cldiv);
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pTwi->TWI_CWGR = (ckdiv << 16) | (cldiv << 8) | cldiv;
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}
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//------------------------------------------------------------------------------
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/// Sends a STOP condition on the TWI.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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//------------------------------------------------------------------------------
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void TWI_Stop(AT91S_TWI *pTwi)
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{
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SANITY_CHECK(pTwi);
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pTwi->TWI_CR = AT91C_TWI_STOP;
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}
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//------------------------------------------------------------------------------
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/// Starts a read operation on the TWI bus with the specified slave, and returns
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/// immediately. Data must then be read using TWI_ReadByte() whenever a byte is
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/// available (poll using TWI_ByteReceived()).
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/// \param pTwi Pointer to an AT91S_TWI instance.
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/// \param address Slave address on the bus.
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/// \param iaddress Optional internal address bytes.
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/// \param isize Number of internal address bytes.
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//-----------------------------------------------------------------------------
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void TWI_StartRead(
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AT91S_TWI *pTwi,
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unsigned char address,
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unsigned int iaddress,
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unsigned char isize)
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{
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trace_LOG(trace_DEBUG, "-D- TWI_StartRead()\n\r");
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SANITY_CHECK(pTwi);
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SANITY_CHECK((address & 0x80) == 0);
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SANITY_CHECK((iaddress & 0xFF000000) == 0);
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SANITY_CHECK(isize < 4);
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// Set slave address and number of internal address bytes
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pTwi->TWI_MMR = (isize << 8) | AT91C_TWI_MREAD | (address << 16);
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// Set internal address bytes
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pTwi->TWI_IADR = iaddress;
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// Send START condition
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pTwi->TWI_CR = AT91C_TWI_START;
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}
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//-----------------------------------------------------------------------------
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/// Reads a byte from the TWI bus. The read operation must have been started
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/// using TWI_StartRead() and a byte must be available (check with
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/// TWI_ByteReceived()).
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/// Returns the byte read.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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//-----------------------------------------------------------------------------
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unsigned char TWI_ReadByte(AT91S_TWI *pTwi)
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{
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SANITY_CHECK(pTwi);
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return pTwi->TWI_RHR;
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}
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//-----------------------------------------------------------------------------
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/// Sends a byte of data to one of the TWI slaves on the bus. This function
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/// must be called once before TWI_StartWrite() with the first byte of data
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/// to send, then it shall be called repeatedly after that to send the
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/// remaining bytes.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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/// \param byte Byte to send.
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//-----------------------------------------------------------------------------
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void TWI_WriteByte(AT91S_TWI *pTwi, unsigned char byte)
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{
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SANITY_CHECK(pTwi);
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pTwi->TWI_THR = byte;
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}
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//-----------------------------------------------------------------------------
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/// Starts a write operation on the TWI to access the selected slave, then
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/// returns immediately. A byte of data must be provided to start the write;
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/// other bytes are written next.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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/// \param address Address of slave to acccess on the bus.
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/// \param iaddress Optional slave internal address.
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/// \param isize Number of internal address bytes.
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/// \param byte First byte to send.
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//-----------------------------------------------------------------------------
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void TWI_StartWrite(
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AT91S_TWI *pTwi,
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unsigned char address,
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unsigned int iaddress,
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unsigned char isize,
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unsigned char byte)
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{
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trace_LOG(trace_DEBUG, "-D- TWI_StartWrite()\n\r");
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SANITY_CHECK(pTwi);
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SANITY_CHECK((address & 0x80) == 0);
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SANITY_CHECK((iaddress & 0xFF000000) == 0);
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SANITY_CHECK(isize < 4);
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// Set slave address and number of internal address bytes
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pTwi->TWI_MMR = (isize << 8) | (address << 16);
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// Set internal address bytes
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pTwi->TWI_IADR = iaddress;
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// Write first byte to send
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TWI_WriteByte(pTwi, byte);
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}
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//-----------------------------------------------------------------------------
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/// Returns 1 if a byte has been received and can be read on the given TWI
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/// peripheral; otherwise, returns 0. This function resets the status register
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/// of the TWI.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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//-----------------------------------------------------------------------------
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unsigned char TWI_ByteReceived(AT91S_TWI *pTwi)
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{
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return ((pTwi->TWI_SR & AT91C_TWI_RXRDY) == AT91C_TWI_RXRDY);
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}
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//-----------------------------------------------------------------------------
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/// Returns 1 if a byte has been sent, so another one can be stored for
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/// transmission; otherwise returns 0. This function clears the status register
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/// of the TWI.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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//-----------------------------------------------------------------------------
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unsigned char TWI_ByteSent(AT91S_TWI *pTwi)
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{
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return ((pTwi->TWI_SR & AT91C_TWI_TXRDY) == AT91C_TWI_TXRDY);
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}
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//-----------------------------------------------------------------------------
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/// Returns 1 if the current transmission is complete (the STOP has been sent);
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/// otherwise returns 0.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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//-----------------------------------------------------------------------------
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unsigned char TWI_TransferComplete(AT91S_TWI *pTwi)
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{
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return ((pTwi->TWI_SR & AT91C_TWI_TXCOMP) == AT91C_TWI_TXCOMP);
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}
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//-----------------------------------------------------------------------------
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/// Enables the selected interrupts sources on a TWI peripheral.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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/// \param sources Bitwise OR of selected interrupt sources.
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//-----------------------------------------------------------------------------
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void TWI_EnableIt(AT91S_TWI *pTwi, unsigned int sources)
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{
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SANITY_CHECK(pTwi);
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SANITY_CHECK((sources & 0xFFFFFEF8) == 0);
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pTwi->TWI_IER = sources;
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}
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//-----------------------------------------------------------------------------
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/// Disables the selected interrupts sources on a TWI peripheral.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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/// \param sources Bitwise OR of selected interrupt sources.
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//-----------------------------------------------------------------------------
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void TWI_DisableIt(AT91S_TWI *pTwi, unsigned int sources)
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{
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SANITY_CHECK(pTwi);
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SANITY_CHECK((sources & 0xFFFFFEF8) == 0);
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pTwi->TWI_IDR = sources;
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}
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//-----------------------------------------------------------------------------
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/// Returns the current status register of the given TWI peripheral. This
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/// resets the internal value of the status register, so further read may yield
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/// different values.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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//-----------------------------------------------------------------------------
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unsigned int TWI_GetStatus(AT91S_TWI *pTwi)
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{
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SANITY_CHECK(pTwi);
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return pTwi->TWI_SR;
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}
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//-----------------------------------------------------------------------------
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/// Returns the current status register of the given TWI peripheral, but
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/// masking interrupt sources which are not currently enabled.
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/// This resets the internal value of the status register, so further read may
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/// yield different values.
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/// \param pTwi Pointer to an AT91S_TWI instance.
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//-----------------------------------------------------------------------------
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unsigned int TWI_GetMaskedStatus(AT91S_TWI *pTwi)
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{
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unsigned int status;
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SANITY_CHECK(pTwi);
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status = pTwi->TWI_SR;
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status &= pTwi->TWI_IMR;
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return status;
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}
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