681 lines
22 KiB
Diff
681 lines
22 KiB
Diff
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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--- a/arch/arm64/boot/dts/rockchip/Makefile (revision 4c1c8a78a1bfc84404d088c5a34dd3625f6b3f40)
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+++ b/arch/arm64/boot/dts/rockchip/Makefile (revision a45c446e458e82465be126710c57677c6237d914)
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@@ -92,6 +92,7 @@
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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subdir-y := $(dts-dirs) overlay
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diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi
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new file mode 100644
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--- /dev/null (revision a45c446e458e82465be126710c57677c6237d914)
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi (revision a45c446e458e82465be126710c57677c6237d914)
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@@ -0,0 +1,429 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include "rk3568.dtsi"
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+
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+/ {
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+ compatible = "radxa,cm3i", "rockchip,rk3568";
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+
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+ aliases {
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+ mmc0 = &sdhci;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:115200n8";
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+
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+ led_user: led-0 {
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+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ function = LED_FUNCTION_HEARTBEAT;
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+ color = <LED_COLOR_ID_GREEN>;
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+ linux,default-trigger = "heartbeat";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_user_en>;
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+ };
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+ };
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+
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+ pcie30_avdd0v9: pcie30-avdd0v9-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ pcie30_avdd1v8: pcie30-avdd1v8-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie30_avdd1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v_input>;
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v_input>;
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+ };
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+
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+ /* labeled +5v_input in schematic */
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+ vcc5v_input: vcc5v-input-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v_input";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+};
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+
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+&combphy0 {
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+ status = "okay";
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+};
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+
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+&combphy1 {
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+ status = "okay";
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+};
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+
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+&combphy2 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&display_subsystem {
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+ status = "disabled";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ vdd_cpu: regulator@1c {
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+ compatible = "tcs,tcs4525";
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+ reg = <0x1c>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1150000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v_input>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ rk809: pmic@20 {
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+ compatible = "rockchip,rk809";
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+ reg = <0x20>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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+ #clock-cells = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc5-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_gpu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu";
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+ regulator-always-on;
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vdd_npu: DCDC_REG4 {
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+ regulator-name = "vdd_npu";
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+ regulator-init-microvolt = <900000>;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_1v8: DCDC_REG5 {
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_image: LDO_REG1 {
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+ regulator-name = "vdda0v9_image";
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda_0v9: LDO_REG2 {
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+ regulator-name = "vdda_0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_pmu: LDO_REG3 {
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+ regulator-name = "vdda0v9_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <900000>;
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+ };
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+ };
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+
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+ vccio_acodec: LDO_REG4 {
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+ regulator-name = "vccio_acodec";
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+ regulator-always-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vccio_sd: LDO_REG5 {
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+ regulator-name = "vccio_sd";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_pmu: LDO_REG6 {
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+ regulator-name = "vcc3v3_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcca_1v8: LDO_REG7 {
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+ regulator-name = "vcca_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcca1v8_pmu: LDO_REG8 {
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+ regulator-name = "vcca1v8_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vcca1v8_image: LDO_REG9 {
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+ regulator-name = "vcca1v8_image";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_3v3: SWITCH_REG1 {
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+ regulator-name = "vcc_3v3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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||
|
|
+
|
||
|
|
+ vcc3v3_sd: SWITCH_REG2 {
|
||
|
|
+ regulator-name = "vcc3v3_sd";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pinctrl {
|
||
|
|
+ leds {
|
||
|
|
+ led_user_en: led_user_en {
|
||
|
|
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ pmic {
|
||
|
|
+ pmic_int: pmic_int {
|
||
|
|
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pmu_io_domains {
|
||
|
|
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||
|
|
+ pmuio2-supply = <&vcc3v3_pmu>;
|
||
|
|
+ vccio1-supply = <&vccio_acodec>;
|
||
|
|
+ vccio2-supply = <&vcc_1v8>;
|
||
|
|
+ vccio3-supply = <&vccio_sd>;
|
||
|
|
+ vccio4-supply = <&vcc_1v8>;
|
||
|
|
+ vccio5-supply = <&vcc_3v3>;
|
||
|
|
+ vccio6-supply = <&vcc_1v8>;
|
||
|
|
+ vccio7-supply = <&vcc_3v3>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&saradc {
|
||
|
|
+ vref-supply = <&vcca_1v8>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&sdhci {
|
||
|
|
+ bus-width = <8>;
|
||
|
|
+ max-frequency = <200000000>;
|
||
|
|
+ non-removable;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||
|
|
+ vmmc-supply = <&vcc_3v3>;
|
||
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+
|
||
|
|
+
|
||
|
|
+&sfc {
|
||
|
|
+ status = "okay";
|
||
|
|
+ flash@0 {
|
||
|
|
+ compatible = "jedec,spi-nor";
|
||
|
|
+ reg = <0>;
|
||
|
|
+ spi-max-frequency = <108000000>;
|
||
|
|
+ spi-rx-bus-width = <2>;
|
||
|
|
+ spi-tx-bus-width = <2>;
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&tsadc {
|
||
|
|
+ rockchip,hw-tshut-mode = <1>;
|
||
|
|
+ rockchip,hw-tshut-polarity = <0>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&uart2 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb2phy0 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb2phy1 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host0_xhci {
|
||
|
|
+ extcon = <&usb2phy0>;
|
||
|
|
+ dr_mode = "host";
|
||
|
|
+};
|
||
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
|
||
|
|
new file mode 100644
|
||
|
|
--- /dev/null (revision a45c446e458e82465be126710c57677c6237d914)
|
||
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts (revision a45c446e458e82465be126710c57677c6237d914)
|
||
|
|
@@ -0,0 +1,230 @@
|
||
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||
|
|
+
|
||
|
|
+/dts-v1/;
|
||
|
|
+#include "rk3568-radxa-cm3i.dtsi"
|
||
|
|
+
|
||
|
|
+/ {
|
||
|
|
+ model = "Radxa E25 Carrier Board";
|
||
|
|
+ compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";
|
||
|
|
+
|
||
|
|
+ aliases {
|
||
|
|
+ mmc1 = &sdmmc0;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ pwm-leds {
|
||
|
|
+ compatible = "pwm-leds-multicolor";
|
||
|
|
+
|
||
|
|
+ multi-led {
|
||
|
|
+ color = <LED_COLOR_ID_RGB>;
|
||
|
|
+ max-brightness = <255>;
|
||
|
|
+
|
||
|
|
+ led-red {
|
||
|
|
+ color = <LED_COLOR_ID_RED>;
|
||
|
|
+ pwms = <&pwm1 0 1000000 0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ led-green {
|
||
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
||
|
|
+ pwms = <&pwm2 0 1000000 0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ led-blue {
|
||
|
|
+ color = <LED_COLOR_ID_BLUE>;
|
||
|
|
+ pwms = <&pwm12 0 1000000 0>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vbus_typec: vbus-typec-regulator {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ enable-active-high;
|
||
|
|
+ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&vbus_typec_en>;
|
||
|
|
+ regulator-name = "vbus_typec";
|
||
|
|
+ regulator-min-microvolt = <5000000>;
|
||
|
|
+ regulator-max-microvolt = <5000000>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc3v3_minipcie: vcc3v3-minipcie-regulator {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ enable-active-high;
|
||
|
|
+ gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&minipcie_enable_h>;
|
||
|
|
+ regulator-name = "vcc3v3_minipcie";
|
||
|
|
+ regulator-min-microvolt = <5000000>;
|
||
|
|
+ regulator-max-microvolt = <5000000>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc3v3_ngff: vcc3v3-ngff-regulator {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ enable-active-high;
|
||
|
|
+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&ngffpcie_enable_h>;
|
||
|
|
+ regulator-name = "vcc3v3_ngff";
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /* actually fed by vcc5v0_sys, dependent
|
||
|
|
+ * on pi6c clock generator
|
||
|
|
+ */
|
||
|
|
+ vcc3v3_pcie30x1: vcc3v3-pcie30x1-regulator {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ enable-active-high;
|
||
|
|
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&pcie30x1_enable_h>;
|
||
|
|
+ regulator-name = "vcc3v3_pcie30x1";
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ vin-supply = <&vcc3v3_pi6c_05>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ enable-active-high;
|
||
|
|
+ gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&pcie_enable_h>;
|
||
|
|
+ regulator-name = "vcc3v3_pcie";
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie2x1 {
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&pcie20_reset_h>;
|
||
|
|
+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ vpcie3v3-supply = <&vcc3v3_pi6c_05>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie30phy {
|
||
|
|
+ data-lanes = <1 2>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie3x1 {
|
||
|
|
+ num-lanes = <1>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&pcie30x1m0_pins>;
|
||
|
|
+ reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie30x1>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie3x2 {
|
||
|
|
+ num-lanes = <1>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&pcie30x2_reset_h>;
|
||
|
|
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ vpcie3v3-supply = <&vcc3v3_pi6c_05>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pinctrl {
|
||
|
|
+ pcie {
|
||
|
|
+ pcie20_reset_h: pcie20-reset-h {
|
||
|
|
+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ pcie30x1_enable_h: pcie30x1-enable-h {
|
||
|
|
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ pcie30x2_reset_h: pcie30x2-reset-h {
|
||
|
|
+ rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ pcie_enable_h: pcie-enable-h {
|
||
|
|
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ usb {
|
||
|
|
+ minipcie_enable_h: minipcie-enable-h {
|
||
|
|
+ rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ ngffpcie_enable_h: ngffpcie-enable-h {
|
||
|
|
+ rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vbus_typec_en: vbus_typec_en {
|
||
|
|
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pwm1 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pwm2 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pwm12 {
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&pwm12m1_pins>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&sdmmc0 {
|
||
|
|
+ bus-width = <4>;
|
||
|
|
+ cap-sd-highspeed;
|
||
|
|
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||
|
|
+ /* Also used in pcie30x1_clkreqnm0 */
|
||
|
|
+ disable-wp;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
|
||
|
|
+ sd-uhs-sdr50;
|
||
|
|
+ vmmc-supply = <&vcc3v3_sd>;
|
||
|
|
+ vqmmc-supply = <&vccio_sd>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host0_ehci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host0_ohci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host0_xhci {
|
||
|
|
+ extcon = <&usb2phy0>;
|
||
|
|
+ dr_mode = "host";
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host1_ehci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host1_ohci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb2phy0_otg {
|
||
|
|
+ phy-supply = <&vbus_typec>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb2phy1_host {
|
||
|
|
+ phy-supply = <&vcc3v3_minipcie>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb2phy1_otg {
|
||
|
|
+ phy-supply = <&vcc3v3_ngff>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|