1166 lines
26 KiB
Diff
1166 lines
26 KiB
Diff
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From 17f94f45c8cd258b9d9aa97d9d894ddce2a60769 Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megi@xff.cz>
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Date: Sat, 10 Jun 2023 18:15:24 +0200
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Subject: [PATCH 467/469] arm64: dts: rk3588-orange-pi-5-plus: Add board device
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tree
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Orange Pi 5 Plus is RK3588 based SBC with:
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- [marketing material]
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Signed-off-by: Ondrej Jirman <megi@xff.cz>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../dts/rockchip/rk3588-orange-pi-5-plus.dts | 1127 +++++++++++++++++
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2 files changed, 1128 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-orange-pi-5-plus.dts
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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index 2d585bbb8f3a..20b7fa2e6107 100644
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -93,6 +93,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orange-pi-5-plus.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb
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diff --git a/arch/arm64/boot/dts/rockchip/rk3588-orange-pi-5-plus.dts b/arch/arm64/boot/dts/rockchip/rk3588-orange-pi-5-plus.dts
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new file mode 100644
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index 000000000000..28d2e80886f5
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-orange-pi-5-plus.dts
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@@ -0,0 +1,1127 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/usb/pd.h>
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+#include "rk3588.dtsi"
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+
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+/* TODO:
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+ *
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+ * - HDMI ports
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+ */
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+
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+/ {
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+ model = "Xunlong Orange Pi 5 Plus";
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+ compatible = "xunlong,orange-pi-5-plus", "rockchip,rk3588";
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+
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+ aliases {
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+ mmc0 = &sdhci;
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+ mmc1 = &sdmmc;
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+ serial2 = &uart2;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ adc-keys-1 {
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+ compatible = "adc-keys";
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+ io-channels = <&saradc 0>;
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+ io-channel-names = "buttons";
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+ keyup-threshold-microvolt = <1800000>;
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+ poll-interval = <100>;
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+
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+ recovery-key {
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+ linux,code = <KEY_SETUP>;
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+ label = "Mask Rom";
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+ press-threshold-microvolt = <2000>;
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+ };
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+ };
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+
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+ adc-keys-2 {
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+ compatible = "adc-keys";
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+ io-channels = <&saradc 1>;
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+ io-channel-names = "buttons";
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+ keyup-threshold-microvolt = <1800000>;
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+ poll-interval = <100>;
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+
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+ recovery-key {
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+ linux,code = <KEY_ESC>;
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+ label = "Recovery";
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+ press-threshold-microvolt = <2000>;
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_pins>;
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+
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+ led-green {
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+ color = <LED_COLOR_ID_GREEN>;
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+ function = LED_FUNCTION_INDICATOR;
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+ gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ led-blue {
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+ color = <LED_COLOR_ID_BLUE>;
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+ function = LED_FUNCTION_INDICATOR;
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+ gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+
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+ ir-receiver {
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+ compatible = "gpio-ir-receiver";
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+ gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ir_receiver_pin>;
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+ };
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+
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+ speaker_amp: speaker-audio-amplifier {
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+ compatible = "simple-audio-amplifier";
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+ enable-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
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+ sound-name-prefix = "Speaker Amp";
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+ };
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+
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+ headphone_amp: headphone-audio-amplifier {
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+ compatible = "simple-audio-amplifier";
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+ enable-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
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+ sound-name-prefix = "Headphones Amp";
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+ };
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+
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+ sound {
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+ compatible = "simple-audio-card";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hp_detect>;
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+ simple-audio-card,name = "Analog";
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+ simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>;
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,hp-det-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
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+ simple-audio-card,bitclock-master = <&daicpu>;
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+ simple-audio-card,frame-master = <&daicpu>;
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+
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+ simple-audio-card,widgets =
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+ "Microphone", "Onboard Microphone",
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+ "Microphone", "Microphone Jack",
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+ "Speaker", "Speaker",
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+ "Headphone", "Headphones";
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+
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+ simple-audio-card,routing =
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+ "Headphones", "LOUT1",
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+ "Headphones", "ROUT1",
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+ "Speaker", "LOUT2",
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+ "Speaker", "ROUT2",
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+
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+ "Headphones", "Headphones Amp OUTL",
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+ "Headphones", "Headphones Amp OUTR",
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+ "Headphones Amp INL", "LOUT1",
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+ "Headphones Amp INR", "ROUT1",
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+
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+ "Speaker", "Speaker Amp OUTL",
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+ "Speaker", "Speaker Amp OUTR",
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+ "Speaker Amp INL", "LOUT2",
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+ "Speaker Amp INR", "ROUT2",
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+
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+ "LINPUT1", "Onboard Microphone",
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+ "LINPUT2", "Onboard Microphone",
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+ "RINPUT1", "Microphone Jack",
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+ "RINPUT2", "Microphone Jack";
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+
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+ daicpu: simple-audio-card,cpu {
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+ sound-dai = <&i2s0_8ch>;
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+ system-clock-frequency = <12288000>;
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+ };
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+
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+ daicodec: simple-audio-card,codec {
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+ sound-dai = <&es8388>;
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+ system-clock-frequency = <12288000>;
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+ };
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_1v1_nldo_s3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1100000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc_3v3_sd_s0: vcc-3v3-sd-s0 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_3v3_sd_s0";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc_pwr>;
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+ enable-active-low;
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+ };
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+
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+ vcc5v0_host: vcc5v0-host {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_host";
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ enable-active-high;
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+ gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vbus5v0_typec: vbus5v0-typec {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vbus5v0_typec";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ enable-active-high;
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+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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+ vin-supply = <&vcc5v0_sys>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&typec5v_pwren>;
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+ };
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+
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+ pcie20_avdd0v85: pcie20-avdd0v85 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie20_avdd0v85";
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-min-microvolt = <850000>;
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+ regulator-max-microvolt = <850000>;
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+ vin-supply = <&vdd_0v85_s0>;
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+ };
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+
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+ pcie20_avdd1v8: pcie20-avdd1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "pcie20_avdd1v8";
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-min-microvolt = <1800000>;
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|
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+ regulator-max-microvolt = <1800000>;
|
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|
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+ vin-supply = <&avcc_1v8_s0>;
|
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|
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+ };
|
||
|
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+
|
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|
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+ pcie30_avdd0v75: pcie30-avdd0v75 {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ regulator-name = "pcie30_avdd0v75";
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-min-microvolt = <750000>;
|
||
|
|
+ regulator-max-microvolt = <750000>;
|
||
|
|
+ vin-supply = <&avdd_0v75_s0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ pcie30_avdd1v8: pcie30-avdd1v8 {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ regulator-name = "pcie30_avdd1v8";
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-min-microvolt = <1800000>;
|
||
|
|
+ regulator-max-microvolt = <1800000>;
|
||
|
|
+ vin-supply = <&avcc_1v8_s0>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0 {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ regulator-name = "vcc3v3_pcie2x1l0";
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ enable-active-high;
|
||
|
|
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ startup-delay-us = <50000>;
|
||
|
|
+ /*XXX: verify with schematic once released */
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /*XXX: verify with schematic */
|
||
|
|
+ vcc3v3_pcie_eth: vcc3v3-pcie-eth {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ regulator-name = "vcc3v3_pcie_eth";
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ enable-active-low;
|
||
|
|
+ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
|
||
|
|
+ startup-delay-us = <50000>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /*XXX: verify with schematic */
|
||
|
|
+ vcc3v3_pcie30: vcc3v3-pcie30 {
|
||
|
|
+ compatible = "regulator-fixed";
|
||
|
|
+ regulator-name = "vcc3v3_pcie30";
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ enable-active-high;
|
||
|
|
+ gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ startup-delay-us = <5000>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_b0 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_big0_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_big0_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_b1 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_big0_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_big0_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_b2 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_big1_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_big1_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_b3 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_big1_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_big1_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_l0 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_l1 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_l2 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&cpu_l3 {
|
||
|
|
+ cpu-supply = <&vdd_cpu_lit_s0>;
|
||
|
|
+ mem-supply = <&vdd_cpu_lit_mem_s0>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy2 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy3 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy2_host {
|
||
|
|
+ phy-supply = <&vcc5v0_host>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy3_host {
|
||
|
|
+ phy-supply = <&vcc5v0_host>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host0_ehci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host0_ohci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host1_ehci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usb_host1_ohci {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&i2c0 {
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&i2c0m2_xfer>;
|
||
|
|
+ status = "okay";
|
||
|
|
+
|
||
|
|
+ vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: regulator@42 {
|
||
|
|
+ compatible = "rockchip,rk8602";
|
||
|
|
+ reg = <0x42>;
|
||
|
|
+ fcs,suspend-voltage-selector = <1>;
|
||
|
|
+ regulator-name = "vdd_cpu_big0_s0";
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <550000>;
|
||
|
|
+ regulator-max-microvolt = <1050000>;
|
||
|
|
+ regulator-ramp-delay = <2300>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: regulator@43 {
|
||
|
|
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
|
||
|
|
+ reg = <0x43>;
|
||
|
|
+ fcs,suspend-voltage-selector = <1>;
|
||
|
|
+ regulator-name = "vdd_cpu_big1_s0";
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <550000>;
|
||
|
|
+ regulator-max-microvolt = <1050000>;
|
||
|
|
+ regulator-ramp-delay = <2300>;
|
||
|
|
+ vin-supply = <&vcc5v0_sys>;
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&i2c6 {
|
||
|
|
+ clock-frequency = <400000>;
|
||
|
|
+ status = "okay";
|
||
|
|
+
|
||
|
|
+ hym8563: rtc@51 {
|
||
|
|
+ compatible = "haoyu,hym8563";
|
||
|
|
+ reg = <0x51>;
|
||
|
|
+ #clock-cells = <0>;
|
||
|
|
+ clock-output-names = "hym8563";
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&hym8563_int>;
|
||
|
|
+ interrupt-parent = <&gpio0>;
|
||
|
|
+ interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
||
|
|
+ wakeup-source;
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&sdhci {
|
||
|
|
+ bus-width = <8>;
|
||
|
|
+ no-sdio;
|
||
|
|
+ no-sd;
|
||
|
|
+ non-removable;
|
||
|
|
+ max-frequency = <200000000>;
|
||
|
|
+ mmc-hs400-1_8v;
|
||
|
|
+ mmc-hs400-enhanced-strobe;
|
||
|
|
+ //XXX: not on board by default
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&sdmmc {
|
||
|
|
+ bus-width = <4>;
|
||
|
|
+ cap-sd-highspeed;
|
||
|
|
+ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||
|
|
+ disable-wp;
|
||
|
|
+ max-frequency = <150000000>;
|
||
|
|
+ no-sdio;
|
||
|
|
+ no-mmc;
|
||
|
|
+ sd-uhs-sdr104;
|
||
|
|
+ vmmc-supply = <&vcc_3v3_sd_s0>;
|
||
|
|
+ vqmmc-supply = <&vccio_sd_s0>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&sfc {
|
||
|
|
+ max-freq = <100000000>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&fspim1_pins>;
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+ status = "okay";
|
||
|
|
+
|
||
|
|
+ spi_flash: spi-flash@0 {
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+ compatible = "jedec,spi-nor";
|
||
|
|
+ reg = <0x0>;
|
||
|
|
+ spi-max-frequency = <100000000>;
|
||
|
|
+ spi-tx-bus-width = <1>;
|
||
|
|
+ spi-rx-bus-width = <4>;
|
||
|
|
+
|
||
|
|
+ partitions {
|
||
|
|
+ compatible = "fixed-partitions";
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <1>;
|
||
|
|
+
|
||
|
|
+ loader@0 {
|
||
|
|
+ label = "loader";
|
||
|
|
+ reg = <0x0 0x1000000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&i2c7 {
|
||
|
|
+ status = "okay";
|
||
|
|
+
|
||
|
|
+ es8388: audio-codec@11 {
|
||
|
|
+ compatible = "everest,es8388", "everest,es8323";
|
||
|
|
+ reg = <0x11>;
|
||
|
|
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
|
||
|
|
+ clock-names = "mclk";
|
||
|
|
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
|
||
|
|
+ assigned-clock-rates = <12288000>;
|
||
|
|
+ #sound-dai-cells = <0>;
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&i2s0_8ch {
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&i2s0_lrck
|
||
|
|
+ &i2s0_mclk
|
||
|
|
+ &i2s0_sclk
|
||
|
|
+ &i2s0_sdi0
|
||
|
|
+ &i2s0_sdo0>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pinctrl {
|
||
|
|
+ leds {
|
||
|
|
+ led_pins: led-pins {
|
||
|
|
+ rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
|
||
|
|
+ <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ sdmmc {
|
||
|
|
+ sdmmc_pwr: sdmmc_pwr {
|
||
|
|
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ hym8563 {
|
||
|
|
+ hym8563_int: hym8563-int {
|
||
|
|
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ usb {
|
||
|
|
+ vcc5v0_host_en: vcc5v0-host-en {
|
||
|
|
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ usb-typec {
|
||
|
|
+ usbc0_int: usbc0-int {
|
||
|
|
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ typec5v_pwren: typec5v-pwren {
|
||
|
|
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ sound {
|
||
|
|
+ hp_detect: hp-detect {
|
||
|
|
+ rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ ir-receiver {
|
||
|
|
+ ir_receiver_pin: ir-receiver-pin {
|
||
|
|
+ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&tsadc {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&uart2 {
|
||
|
|
+ pinctrl-0 = <&uart2m0_xfer>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&spi2 {
|
||
|
|
+ status = "okay";
|
||
|
|
+ assigned-clocks = <&cru CLK_SPI2>;
|
||
|
|
+ assigned-clock-rates = <200000000>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
|
||
|
|
+ num-cs = <1>;
|
||
|
|
+
|
||
|
|
+ pmic@0 {
|
||
|
|
+ compatible = "rockchip,rk806";
|
||
|
|
+ spi-max-frequency = <1000000>;
|
||
|
|
+ reg = <0x0>;
|
||
|
|
+
|
||
|
|
+ interrupt-parent = <&gpio0>;
|
||
|
|
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||
|
|
+
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
|
||
|
|
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||
|
|
+
|
||
|
|
+ vcc1-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc2-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc3-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc4-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc5-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc6-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc7-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc8-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc9-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc10-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
|
||
|
|
+ vcc12-supply = <&vcc5v0_sys>;
|
||
|
|
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
|
||
|
|
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
|
||
|
|
+ vcca-supply = <&vcc5v0_sys>;
|
||
|
|
+
|
||
|
|
+ gpio-controller;
|
||
|
|
+ #gpio-cells = <2>;
|
||
|
|
+
|
||
|
|
+ rockchip,system-power-controller;
|
||
|
|
+
|
||
|
|
+ rk806_dvs1_null: dvs1-null-pins {
|
||
|
|
+ pins = "gpio_pwrctrl2";
|
||
|
|
+ function = "pin_fun0";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs2_null: dvs2-null-pins {
|
||
|
|
+ pins = "gpio_pwrctrl2";
|
||
|
|
+ function = "pin_fun0";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs3_null: dvs3-null-pins {
|
||
|
|
+ pins = "gpio_pwrctrl3";
|
||
|
|
+ function = "pin_fun0";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ /*
|
||
|
|
+ rk806_dvs1_slp: rk806_dvs1_slp {
|
||
|
|
+ pins = "gpio_pwrctrl1";
|
||
|
|
+ function = "pin_fun1";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs1_pwrdn: rk806_dvs1_pwrdn {
|
||
|
|
+ pins = "gpio_pwrctrl1";
|
||
|
|
+ function = "pin_fun2";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs1_rst: rk806_dvs1_rst {
|
||
|
|
+ pins = "gpio_pwrctrl1";
|
||
|
|
+ function = "pin_fun3";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs2_slp: rk806_dvs2_slp {
|
||
|
|
+ pins = "gpio_pwrctrl2";
|
||
|
|
+ function = "pin_fun1";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs2_pwrdn: rk806_dvs2_pwrdn {
|
||
|
|
+ pins = "gpio_pwrctrl2";
|
||
|
|
+ function = "pin_fun2";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs2_rst: rk806_dvs2_rst {
|
||
|
|
+ pins = "gpio_pwrctrl2";
|
||
|
|
+ function = "pin_fun3";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs2_dvs: rk806_dvs2_dvs {
|
||
|
|
+ pins = "gpio_pwrctrl2";
|
||
|
|
+ function = "pin_fun4";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs2_gpio: rk806_dvs2_gpio {
|
||
|
|
+ pins = "gpio_pwrctrl2";
|
||
|
|
+ function = "pin_fun5";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs3_slp: rk806_dvs3_slp {
|
||
|
|
+ pins = "gpio_pwrctrl3";
|
||
|
|
+ function = "pin_fun1";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs3_pwrdn: rk806_dvs3_pwrdn {
|
||
|
|
+ pins = "gpio_pwrctrl3";
|
||
|
|
+ function = "pin_fun2";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs3_rst: rk806_dvs3_rst {
|
||
|
|
+ pins = "gpio_pwrctrl3";
|
||
|
|
+ function = "pin_fun3";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs3_dvs: rk806_dvs3_dvs {
|
||
|
|
+ pins = "gpio_pwrctrl3";
|
||
|
|
+ function = "pin_fun4";
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ rk806_dvs3_gpio: rk806_dvs3_gpio {
|
||
|
|
+ pins = "gpio_pwrctrl3";
|
||
|
|
+ function = "pin_fun5";
|
||
|
|
+ };
|
||
|
|
+ */
|
||
|
|
+
|
||
|
|
+ regulators {
|
||
|
|
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <550000>;
|
||
|
|
+ regulator-max-microvolt = <950000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vdd_gpu_s0";
|
||
|
|
+ regulator-enable-ramp-delay = <400>;
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <550000>;
|
||
|
|
+ regulator-max-microvolt = <950000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vdd_cpu_lit_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_log_s0: dcdc-reg3 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <675000>;
|
||
|
|
+ regulator-max-microvolt = <750000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vdd_log_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <750000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <550000>;
|
||
|
|
+ regulator-max-microvolt = <950000>;
|
||
|
|
+ regulator-init-microvolt = <750000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vdd_vdenc_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_ddr_s0: dcdc-reg5 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <675000>;
|
||
|
|
+ regulator-max-microvolt = <900000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vdd_ddr_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <850000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd2_ddr_s3: dcdc-reg6 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-name = "vdd2_ddr_s3";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-on-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc_2v0_pldo_s3: dcdc-reg7 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <2000000>;
|
||
|
|
+ regulator-max-microvolt = <2000000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vdd_2v0_pldo_s3";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-on-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <2000000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc_3v3_s3: dcdc-reg8 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ regulator-name = "vcc_3v3_s3";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-on-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <3300000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vddq_ddr_s0: dcdc-reg9 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-name = "vddq_ddr_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc_1v8_s3: dcdc-reg10 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <1800000>;
|
||
|
|
+ regulator-max-microvolt = <1800000>;
|
||
|
|
+ regulator-name = "vcc_1v8_s3";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-on-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <1800000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ avcc_1v8_s0: pldo-reg1 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <1800000>;
|
||
|
|
+ regulator-max-microvolt = <1800000>;
|
||
|
|
+ regulator-name = "avcc_1v8_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc_1v8_s0: pldo-reg2 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <1800000>;
|
||
|
|
+ regulator-max-microvolt = <1800000>;
|
||
|
|
+ regulator-name = "vcc_1v8_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <1800000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ avdd_1v2_s0: pldo-reg3 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <1200000>;
|
||
|
|
+ regulator-max-microvolt = <1200000>;
|
||
|
|
+ regulator-name = "avdd_1v2_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vcc_3v3_s0: pldo-reg4 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <3300000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vcc_3v3_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vccio_sd_s0: pldo-reg5 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <1800000>;
|
||
|
|
+ regulator-max-microvolt = <3300000>;
|
||
|
|
+ regulator-ramp-delay = <12500>;
|
||
|
|
+ regulator-name = "vccio_sd_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ pldo6_s3: pldo-reg6 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <1800000>;
|
||
|
|
+ regulator-max-microvolt = <1800000>;
|
||
|
|
+ regulator-name = "pldo6_s3";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-on-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <1800000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_0v75_s3: nldo-reg1 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <750000>;
|
||
|
|
+ regulator-max-microvolt = <750000>;
|
||
|
|
+ regulator-name = "vdd_0v75_s3";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-on-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <750000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_ddr_pll_s0: nldo-reg2 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <850000>;
|
||
|
|
+ regulator-max-microvolt = <850000>;
|
||
|
|
+ regulator-name = "vdd_ddr_pll_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ regulator-suspend-microvolt = <850000>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ avdd_0v75_s0: nldo-reg3 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <750000>;
|
||
|
|
+ regulator-max-microvolt = <750000>;
|
||
|
|
+ //regulator-min-microvolt = <837500>;
|
||
|
|
+ //regulator-max-microvolt = <837500>;
|
||
|
|
+ regulator-name = "avdd_0v75_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_0v85_s0: nldo-reg4 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <850000>;
|
||
|
|
+ regulator-max-microvolt = <850000>;
|
||
|
|
+ regulator-name = "vdd_0v85_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ vdd_0v75_s0: nldo-reg5 {
|
||
|
|
+ regulator-always-on;
|
||
|
|
+ regulator-boot-on;
|
||
|
|
+ regulator-min-microvolt = <750000>;
|
||
|
|
+ regulator-max-microvolt = <750000>;
|
||
|
|
+ regulator-name = "vdd_0v75_s0";
|
||
|
|
+
|
||
|
|
+ regulator-state-mem {
|
||
|
|
+ regulator-off-in-suspend;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie2x1l0 {
|
||
|
|
+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
|
||
|
|
+ rockchip,skip-scan-in-resume;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie2x1l1 {
|
||
|
|
+ reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie2x1l2 {
|
||
|
|
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie30phy {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&pcie3x4 {
|
||
|
|
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&combphy0_ps {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&combphy1_ps {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&combphy2_psu {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+// USB 3.0
|
||
|
|
+
|
||
|
|
+&usbdp_phy0 {
|
||
|
|
+ orientation-switch;
|
||
|
|
+ mode-switch;
|
||
|
|
+ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||
|
|
+ status = "okay";
|
||
|
|
+ svid = <0xff01>;
|
||
|
|
+
|
||
|
|
+ port {
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+
|
||
|
|
+ usbdp_phy0_orientation_switch: endpoint@0 {
|
||
|
|
+ reg = <0>;
|
||
|
|
+ remote-endpoint = <&usbc0_orien_sw>;
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ usbdp_phy0_dp_altmode_mux: endpoint@1 {
|
||
|
|
+ reg = <1>;
|
||
|
|
+ remote-endpoint = <&dp_altmode_mux>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usbdp_phy0_u3 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usbdrd3_0 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usbdrd_dwc3_0 {
|
||
|
|
+ dr_mode = "otg";
|
||
|
|
+ usb-role-switch;
|
||
|
|
+
|
||
|
|
+ port {
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+ dwc3_0_role_switch: endpoint@0 {
|
||
|
|
+ reg = <0>;
|
||
|
|
+ remote-endpoint = <&usbc0_role_sw>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy0 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy0_otg {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&i2c6 {
|
||
|
|
+ usbc0: usb-typec@22 {
|
||
|
|
+ compatible = "fcs,fusb302";
|
||
|
|
+ reg = <0x22>;
|
||
|
|
+ interrupt-parent = <&gpio0>;
|
||
|
|
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
||
|
|
+ pinctrl-names = "default";
|
||
|
|
+ pinctrl-0 = <&usbc0_int>;
|
||
|
|
+ vbus-supply = <&vbus5v0_typec>;
|
||
|
|
+
|
||
|
|
+ usb_con: connector {
|
||
|
|
+ compatible = "usb-c-connector";
|
||
|
|
+ label = "USB-C";
|
||
|
|
+ data-role = "dual";
|
||
|
|
+ power-role = "dual";
|
||
|
|
+ try-power-role = "source";
|
||
|
|
+ op-sink-microwatt = <1000000>;
|
||
|
|
+ sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
|
||
|
|
+ source-pdos = <PDO_FIXED(5000, 1500, PDO_FIXED_USB_COMM)>;
|
||
|
|
+
|
||
|
|
+ /*
|
||
|
|
+ altmodes {
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+
|
||
|
|
+ altmode@0 {
|
||
|
|
+ reg = <0>;
|
||
|
|
+ svid = <0xff01>;
|
||
|
|
+ vdo = <0xffffffff>; // yeah, no, this is nonsense
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ */
|
||
|
|
+
|
||
|
|
+ ports {
|
||
|
|
+ #address-cells = <1>;
|
||
|
|
+ #size-cells = <0>;
|
||
|
|
+
|
||
|
|
+ port@0 {
|
||
|
|
+ reg = <0>;
|
||
|
|
+ usbc0_orien_sw: endpoint {
|
||
|
|
+ remote-endpoint = <&usbdp_phy0_orientation_switch>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ port@1 {
|
||
|
|
+ reg = <1>;
|
||
|
|
+ usbc0_role_sw: endpoint {
|
||
|
|
+ remote-endpoint = <&dwc3_0_role_switch>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+
|
||
|
|
+ port@2 {
|
||
|
|
+ reg = <2>;
|
||
|
|
+ dp_altmode_mux: endpoint {
|
||
|
|
+ remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+ };
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usbdp_phy1 {
|
||
|
|
+ rockchip,dp-lane-mux = <2 3>;
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usbdp_phy1_u3 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&usbdrd3_1 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy1 {
|
||
|
|
+ status = "okay";
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&u2phy1_otg {
|
||
|
|
+ status = "okay";
|
||
|
|
+ phy-supply = <&vcc5v0_host>;
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+&saradc {
|
||
|
|
+ status = "okay";
|
||
|
|
+ vref-supply = <&vcc_1v8_s0>;
|
||
|
|
+};
|
||
|
|
--
|
||
|
|
2.34.1
|
||
|
|
|