406 lines
11 KiB
Diff
406 lines
11 KiB
Diff
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
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Date: Thu, 10 Jun 2021 11:58:00 +0200
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Subject: [ARCHEOLOGY] Fix mainline kernel boot on Rockpi S (#2823)
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> X-Git-Archeology: > recovered message: > https://armbian.atlassian.net/browse/AR-785
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> X-Git-Archeology: - Revision 17b3da0a44d70b42c391f7c93f0683e2901486c9: https://github.com/armbian/build/commit/17b3da0a44d70b42c391f7c93f0683e2901486c9
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> X-Git-Archeology: Date: Thu, 10 Jun 2021 11:58:00 +0200
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> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
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> X-Git-Archeology: Subject: Fix mainline kernel boot on Rockpi S (#2823)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 86abac1fd4e169712a44d245cf7adef4ee17c420: https://github.com/armbian/build/commit/86abac1fd4e169712a44d245cf7adef4ee17c420
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> X-Git-Archeology: Date: Tue, 26 Oct 2021 22:14:41 +0200
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> X-Git-Archeology: From: Piotr Szczepanik <piter75@gmail.com>
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> X-Git-Archeology: Subject: Cleanup u-boot configurations for rockchip64 derivatives (#3150)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 26437e36c18bb09484f4150e396a1784cc6471b7: https://github.com/armbian/build/commit/26437e36c18bb09484f4150e396a1784cc6471b7
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> X-Git-Archeology: Date: Thu, 16 Jun 2022 12:27:05 +0200
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> X-Git-Archeology: From: Piotr Szczepanik <piter75@gmail.com>
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> X-Git-Archeology: Subject: Switched rockchip64 u-boot to v2022.04 (#3871)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 2813365dd25e3ad110936cbf014b95b38d7090ec: https://github.com/armbian/build/commit/2813365dd25e3ad110936cbf014b95b38d7090ec
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> X-Git-Archeology: Date: Mon, 07 Nov 2022 21:29:00 +0100
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> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
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> X-Git-Archeology: Subject: Move known non working rockhip64 boards to previous boot loader (#4392)
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> X-Git-Archeology:
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---
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arch/arm/dts/Makefile | 3 +-
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arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 17 +
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arch/arm/dts/rk3308-rock-pi-s.dts | 215 ++++++++++
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configs/rock-pi-s-rk3308_defconfig | 105 +++++
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4 files changed, 339 insertions(+), 1 deletion(-)
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index ce5f8c27c5..4cad0dfc9c 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -117,7 +117,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3288) += \
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dtb-$(CONFIG_ROCKCHIP_RK3308) += \
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rk3308-evb.dtb \
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- rk3308-roc-cc.dtb
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+ rk3308-roc-cc.dtb \
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+ rk3308-rock-pi-s.dtb
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dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb \
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diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
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new file mode 100644
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index 0000000000..40bb917ba9
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--- /dev/null
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+++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
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@@ -0,0 +1,17 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
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+ */
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+#include "rk3308-u-boot.dtsi"
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+
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+/ {
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+ chosen {
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+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
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+ };
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+};
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+
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+&uart2 {
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+ u-boot,dm-pre-reloc;
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+ clock-frequency = <24000000>;
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+ status = "okay";
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+};
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diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts b/arch/arm/dts/rk3308-rock-pi-s.dts
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new file mode 100644
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index 0000000000..678e7d704f
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--- /dev/null
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+++ b/arch/arm/dts/rk3308-rock-pi-s.dts
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@@ -0,0 +1,215 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2019 Akash Gajjar <akash@openedev.com>
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+ * Copyright (c) 2019 Jagan Teki <jagan@openedev.com>
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+ */
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+
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+/dts-v1/;
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+#include "rk3308.dtsi"
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+
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+/ {
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+ model = "Radxa ROCK Pi S";
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+ compatible = "radxa,rockpis", "rockchip,rk3308";
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>;
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+
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+ green-led {
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+ label = "rockpis:green:power";
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+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "default-on";
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+ default-state = "on";
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+ };
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+
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+ blue-led {
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+ label = "rockpis:blue:user";
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ default-state = "on";
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ vcc5v0_sys: vcc5v0-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vdd_core: vdd-core {
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+ compatible = "pwm-regulator";
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+ pwms = <&pwm0 0 5000 1>;
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+ regulator-name = "vdd_core";
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+ regulator-min-microvolt = <827000>;
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+ regulator-max-microvolt = <1340000>;
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+ regulator-init-microvolt = <1015000>;
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+ regulator-settling-time-up-us = <250>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ pwm-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vdd_log: vdd-log {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_log";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1050000>;
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+ regulator-max-microvolt = <1050000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc_ddr: vcc-ddr {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1500000>;
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+ regulator-max-microvolt = <1500000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc_1v8: vcc-1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_io>;
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+ };
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+
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+ vcc_io: vcc-io {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_io";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc_phy: vcc-phy-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_phy";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc5v0_otg: vcc5v0-otg {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_otg";
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+ regulator-always-on;
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+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&otg_vbus_drv>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_core>;
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+};
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+
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+&emmc {
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+ bus-width = <4>; // Confirm if right value - <8>
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+ cap-mmc-highspeed;
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+ mmc-hs200-1_8v;
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+ /* supports-sd; */
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+ /* disable-wp; */
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+ non-removable;
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+ /* num-slots = <1>; */
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+ /* please provide actual vmmc and vqmmc supplies
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+ vin is not a valid supply for emmcs */
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+ vin-supply = <&vcc_io>;
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+ status = "okay";
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+};
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+
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+&i2c1 {
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+ status = "okay";
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+};
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+
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+&sdmmc {
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+ bus-width = <4>;
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+ cap-mmc-highspeed;
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+ cap-sd-highspeed;
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+ disable-wp;
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+ max-frequency = <150000000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>;
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+ sd-uhs-sdr12;
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+ sd-uhs-sdr25;
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+ sd-uhs-sdr50;
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+ sd-uhs-sdr104;
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+ status = "okay";
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+};
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+
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+&mac {
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+ phy-supply = <&vcc_phy>;
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+ clock_in_out = "output";
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+ assigned-clocks = <&cru SCLK_MAC>;
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+ assigned-clock-parents = <&cru SCLK_MAC_SRC>;
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+ snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 50000 50000>;
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+ status = "okay";
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+};
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+
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+&spi2 {
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+ status = "okay";
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+ max-freq = <10000000>;
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+};
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+
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+&pinctrl {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rtc_32k>;
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+
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+ leds {
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+ green_led_gio: green-led-gpio {
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+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ heartbeat_led_gpio: heartbeat-led-gpio {
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+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ usb {
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+ otg_vbus_drv: otg-vbus-drv {
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+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+};
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+
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+&pwm0 {
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+ status = "okay";
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+ pinctrl-0 = <&pwm0_pin_pull_down>;
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+};
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+
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+&saradc {
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+ vref-supply = <&vcc_1v8>;
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+ status = "okay";
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+};
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+
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+&uart0 {
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+ status = "okay";
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+};
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+
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+&uart2 {
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+ status = "okay";
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+};
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+
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+&uart4 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart4_xfer &uart4_rts &uart4_cts>;
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+ status = "okay";
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+};
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diff --git a/configs/rock-pi-s-rk3308_defconfig b/configs/rock-pi-s-rk3308_defconfig
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new file mode 100644
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index 0000000000..2b4ab51d23
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--- /dev/null
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+++ b/configs/rock-pi-s-rk3308_defconfig
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@@ -0,0 +1,105 @@
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+CONFIG_ARM=y
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+CONFIG_SKIP_LOWLEVEL_INIT=y
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SYS_TEXT_BASE=0x00600000
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+CONFIG_SPL_GPIO_SUPPORT=y
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+CONFIG_SPL_LIBCOMMON_SUPPORT=y
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+CONFIG_SPL_LIBGENERIC_SUPPORT=y
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+CONFIG_SYS_MALLOC_F_LEN=0x2000
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+CONFIG_ROCKCHIP_RK3308=y
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+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
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+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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+CONFIG_TARGET_EVB_RK3308=y
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+CONFIG_SPL_STACK_R_ADDR=0xc00000
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+CONFIG_PRE_CON_BUF_ADDR=0x0f200000
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+CONFIG_DEBUG_UART_BASE=0xFF0C0000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_SPL_LIBDISK_SUPPORT=y
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+CONFIG_DEFAULT_DEVICE_TREE="rk3308-rock-pi-s"
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+CONFIG_DEBUG_UART=y
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+CONFIG_SYS_LOAD_ADDR=0x800800
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+CONFIG_BAUDRATE=1500000
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+# CONFIG_LOCALVERSION_AUTO is not set
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+CONFIG_ANDROID_BOOT_IMAGE=y
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+CONFIG_FIT=y
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+CONFIG_FIT_VERBOSE=y
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||
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+CONFIG_PRE_CONSOLE_BUFFER=y
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||
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+CONFIG_CONSOLE_MUX=y
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||
|
|
+CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
|
||
|
|
+# CONFIG_SYS_DEVICE_NULLDEV is not set
|
||
|
|
+CONFIG_DEFAULT_FDT_FILE="rk3308-rock-pi-s.dtb"
|
||
|
|
+CONFIG_MISC_INIT_R=y
|
||
|
|
+CONFIG_VERSION_VARIABLE=y
|
||
|
|
+# CONFIG_DISPLAY_CPUINFO is not set
|
||
|
|
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||
|
|
+CONFIG_BOARD_TYPES=y
|
||
|
|
+CONFIG_SPL_STACK_R=y
|
||
|
|
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
|
||
|
|
+CONFIG_CMD_CONFIG=y
|
||
|
|
+# CONFIG_CMD_ELF is not set
|
||
|
|
+# CONFIG_CMD_IMI is not set
|
||
|
|
+# CONFIG_CMD_XIMG is not set
|
||
|
|
+CONFIG_CMD_GPT=y
|
||
|
|
+# CONFIG_CMD_LOADB is not set
|
||
|
|
+# CONFIG_CMD_LOADS is not set
|
||
|
|
+CONFIG_CMD_MMC=y
|
||
|
|
+CONFIG_CMD_USB=y
|
||
|
|
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||
|
|
+# CONFIG_CMD_ITEST is not set
|
||
|
|
+# CONFIG_CMD_SETEXPR is not set
|
||
|
|
+# CONFIG_ISO_PARTITION is not set
|
||
|
|
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
|
||
|
|
+CONFIG_SPL_OF_CONTROL=y
|
||
|
|
+CONFIG_OF_LIVE=y
|
||
|
|
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||
|
|
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||
|
|
+CONFIG_REGMAP=y
|
||
|
|
+CONFIG_SYSCON=y
|
||
|
|
+CONFIG_CLK=y
|
||
|
|
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
|
||
|
|
+CONFIG_SPL_FIRMWARE=y
|
||
|
|
+CONFIG_ROCKCHIP_GPIO=y
|
||
|
|
+CONFIG_SYS_I2C_ROCKCHIP=y
|
||
|
|
+CONFIG_LED=y
|
||
|
|
+CONFIG_LED_GPIO=y
|
||
|
|
+CONFIG_MMC_DW=y
|
||
|
|
+CONFIG_MMC_DW_ROCKCHIP=y
|
||
|
|
+CONFIG_MMC_SDHCI=y
|
||
|
|
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||
|
|
+CONFIG_PHY_REALTEK=y
|
||
|
|
+CONFIG_DM_ETH=y
|
||
|
|
+CONFIG_PHY_GIGE=y
|
||
|
|
+CONFIG_ETH_DESIGNWARE=y
|
||
|
|
+CONFIG_RGMII=y
|
||
|
|
+CONFIG_MII=y
|
||
|
|
+CONFIG_GMAC_ROCKCHIP=y
|
||
|
|
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||
|
|
+CONFIG_PINCTRL=y
|
||
|
|
+CONFIG_DM_PMIC=y
|
||
|
|
+CONFIG_PMIC_RK8XX=y
|
||
|
|
+CONFIG_REGULATOR_PWM=y
|
||
|
|
+CONFIG_DM_REGULATOR_FIXED=y
|
||
|
|
+CONFIG_PWM_ROCKCHIP=y
|
||
|
|
+CONFIG_RAM=y
|
||
|
|
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
|
||
|
|
+CONFIG_DM_RESET=y
|
||
|
|
+CONFIG_DEBUG_UART_SHIFT=2
|
||
|
|
+CONFIG_ROCKCHIP_SPI=y
|
||
|
|
+CONFIG_SYSRESET=y
|
||
|
|
+CONFIG_USB=y
|
||
|
|
+CONFIG_DM_USB_GADGET=y
|
||
|
|
+CONFIG_SPL_DM_USB_GADGET=y
|
||
|
|
+CONFIG_USB_EHCI_HCD=y
|
||
|
|
+CONFIG_USB_EHCI_GENERIC=y
|
||
|
|
+CONFIG_USB_DWC2=y
|
||
|
|
+CONFIG_USB_DWC3=y
|
||
|
|
+CONFIG_ROCKCHIP_USB2_PHY=y
|
||
|
|
+CONFIG_USB_KEYBOARD=y
|
||
|
|
+CONFIG_USB_GADGET=y
|
||
|
|
+CONFIG_USB_GADGET_DWC2_OTG=y
|
||
|
|
+CONFIG_USB_GADGET_DOWNLOAD=y
|
||
|
|
+CONFIG_EXT4_WRITE=y
|
||
|
|
+CONFIG_SPL_TINY_MEMSET=y
|
||
|
|
+CONFIG_LZO=y
|
||
|
|
+CONFIG_ERRNO_STR=y
|
||
|
|
+# CONFIG_EFI_LOADER is not set
|
||
|
|
--
|
||
|
|
Armbian
|
||
|
|
|