58 lines
1.8 KiB
Diff
58 lines
1.8 KiB
Diff
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From e6a83c8b624052022b8212beabee6e4c40c6d8b2 Mon Sep 17 00:00:00 2001
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From: Russell King <rmk+kernel@arm.linux.org.uk>
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Date: Tue, 29 Nov 2016 10:13:48 +0000
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Subject: implement slot capabilities (SSPL)
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---
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drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++++++++
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1 file changed, 20 insertions(+)
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diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
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index dba5baa2c1ed..c817cc5b2206 100644
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--- a/drivers/pci/controller/pci-mvebu.c
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+++ b/drivers/pci/controller/pci-mvebu.c
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@@ -78,6 +78,7 @@
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#define PCIE_SSPL_VALUE_MASK GENMASK(7, 0)
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#define PCIE_SSPL_SCALE_SHIFT 8
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#define PCIE_SSPL_SCALE_MASK GENMASK(9, 8)
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+#define PCIE_SSPL_MSGEN BIT(14)
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#define PCIE_SSPL_ENABLE BIT(16)
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#define PCIE_RC_RTSTA 0x1a14
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#define PCIE_DEBUG_CTRL 0x1a60
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@@ -705,6 +706,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
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(PCI_EXP_LNKSTA_DLLLA << 16) : 0);
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break;
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+ case PCI_EXP_SLTCAP:
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+ {
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+ u32 tmp = mvebu_readl(port, PCIE_SSPL_OFF);
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+ *value = FIELD_GET(PCIE_SSPL_SCALE_MASK, tmp) << 15 |
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+ FIELD_GET(PCIE_SSPL_VALUE_MASK, tmp) << 7;
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+ break;
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+ }
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+
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case PCI_EXP_SLTCTL: {
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u16 slotctl = le16_to_cpu(bridge->pcie_conf.slotctl);
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u16 slotsta = le16_to_cpu(bridge->pcie_conf.slotsta);
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@@ -882,6 +891,17 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
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mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
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break;
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+ case PCI_EXP_SLTCAP:
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+ {
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+ u32 sspl = FIELD_PREP(PCIE_SSPL_VALUE_MASK,
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+ FIELD_GET(PCI_EXP_SLTCAP_SPLV, new)) |
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+ FIELD_PREP(PCIE_SSPL_SCALE_MASK,
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+ FIELD_GET(PCI_EXP_SLTCAP_SPLS, new)) |
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+ PCIE_SSPL_MSGEN;
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+ mvebu_writel(port, sspl, PCIE_SSPL_OFF);
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+ break;
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+ }
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+
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case PCI_EXP_SLTCTL:
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/*
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* Allow to change PCIE_SSPL_ENABLE bit only when slot power
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--
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cgit
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