54 lines
1.6 KiB
Diff
54 lines
1.6 KiB
Diff
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From 359945b9f0c743846405b49513cc72606f5e781c Mon Sep 17 00:00:00 2001
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From: ashthespy <ashthespy@gmail.com>
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Date: Thu, 16 Jan 2020 21:13:09 +0100
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Subject: [PATCH 05/23] arm64: dts: rk3308: Add mac node at dtsi level
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---
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arch/arm64/boot/dts/rockchip/rk3308.dtsi | 23 +++++++++++++++++++++++
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1 file changed, 23 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
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index 8bdc66c62975..26af951be980 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
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@@ -24,6 +24,7 @@ aliases {
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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+ ethernet0 = &mac;
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mmc0 = &sdmmc;
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mmc1 = &emmc;
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mmc2 = &sdio;
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@@ -627,6 +628,28 @@ sdio: dwmmc@ff4a0000 {
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status = "disabled";
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};
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+ mac: ethernet@ff4e0000 {
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+ compatible = "rockchip,rk3308-gmac";
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+ reg = <0x0 0xff4e0000 0x0 0x10000>;
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+ rockchip,grf = <&grf>;
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+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "macirq";
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+ clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
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+ <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>,
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+ <&cru SCLK_MAC>, <&cru ACLK_MAC>,
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+ <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>;
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+ clock-names = "stmmaceth", "mac_clk_rx",
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+ "mac_clk_tx", "clk_mac_ref",
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+ "clk_mac_refout", "aclk_mac",
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+ "pclk_mac", "clk_mac_speed";
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+ phy-mode = "rmii";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
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+ resets = <&cru SRST_MAC_A>;
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+ reset-names = "stmmaceth";
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+ status = "disabled";
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+ };
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+
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cru: clock-controller@ff500000 {
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compatible = "rockchip,rk3308-cru";
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reg = <0x0 0xff500000 0x0 0x1000>;
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--
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2.25.1
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