build/patch/kernel/archive/rockchip64-5.14/board-rockpis-0027-arm64-dts-rk3308-add-otp-cpuinfo.patch

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--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi 2020-12-26 18:07:15.666727654 +0200
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi 2020-12-26 18:35:42.115701024 +0200
@@ -139,6 +151,12 @@
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
+ cpuinfo {
+ compatible = "rockchip,cpuinfo";
+ nvmem-cells = <&cpu_id>;
+ nvmem-cell-names = "id";
+ };
+
mac_clkin: external-mac-clock {
compatible = "fixed-clock";
clock-frequency = <50000000>;
@@ -146,6 +164,29 @@
#clock-cells = <0>;
};
+ otp: otp@ff210000 {
+ compatible = "rockchip,rk3308-otp";
+ reg = <0x0 0xff210000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
+ <&cru PCLK_OTP_PHY>;
+ clock-names = "otp", "apb_pclk", "phy";
+ resets = <&cru SRST_OTP_PHY>;
+ reset-names = "phy";
+
+ /* Data cells */
+ cpu_id: id@7 {
+ reg = <0x07 0x10>;
+ };
+ cpu_leakage: cpu-leakage@17 {
+ reg = <0x17 0x1>;
+ };
+ logic_leakage: logic-leakage@18 {
+ reg = <0x18 0x1>;
+ };
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";