139 lines
4.1 KiB
Diff
139 lines
4.1 KiB
Diff
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diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
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index 494cf2b5bf7b..384461b70684 100644
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--- a/drivers/soc/rockchip/grf.c
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+++ b/drivers/soc/rockchip/grf.c
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@@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk3399_grf __initconst = {
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.num_values = ARRAY_SIZE(rk3399_defaults),
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};
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+#define RK3566_GRF_USB3OTG0_CON1 0x0104
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+
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+static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
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+ { "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
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+ { "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
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+ { "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
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+};
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+
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+static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
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+ .values = rk3566_defaults,
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+ .num_values = ARRAY_SIZE(rk3566_defaults),
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+};
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+
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+
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static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
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{
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.compatible = "rockchip,rk3036-grf",
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@@ -130,6 +144,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
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}, {
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.compatible = "rockchip,rk3399-grf",
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.data = (void *)&rk3399_grf,
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+ }, {
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+ .compatible = "rockchip,rk3566-pipe-grf",
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+ .data = (void *)&rk3566_pipegrf,
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},
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{ /* sentinel */ },
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};
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diff --git a/arch/arm64/boot/dts/rockchip/rk3566.dtsi b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
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index 3839eef5e4f7..0b957068ff89 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3566.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3566.dtsi
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@@ -6,6 +6,10 @@ / {
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compatible = "rockchip,rk3566";
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};
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+&pipegrf {
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+ compatible = "rockchip,rk3566-pipe-grf", "syscon";
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+};
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+
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&power {
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power-domain@RK3568_PD_PIPE {
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reg = <RK3568_PD_PIPE>;
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@@ -18,3 +22,10 @@ power-domain@RK3568_PD_PIPE {
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#power-domain-cells = <0>;
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};
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};
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+
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+&usb_host0_xhci {
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+ phys = <&usb2phy0_otg>;
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+ phy-names = "usb2-phy";
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+ extcon = <&usb2phy0>;
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+ maximum-speed = "high-speed";
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+};
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diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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index 5b0f528d6818..8ba9334f9753 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@@ -99,6 +99,10 @@ opp-1992000000 {
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};
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};
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+&pipegrf {
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+ compatible = "rockchip,rk3568-pipe-grf", "syscon";
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+};
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+
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&power {
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power-domain@RK3568_PD_PIPE {
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reg = <RK3568_PD_PIPE>;
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@@ -114,3 +118,8 @@ power-domain@RK3568_PD_PIPE {
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#power-domain-cells = <0>;
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};
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};
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+
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+&usb_host0_xhci {
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+ phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
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+ phy-names = "usb2-phy", "usb3-phy";
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+};
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diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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index 7cdef800cb3c..ca20d7b91fe5 100644
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -230,6 +230,40 @@ scmi_shmem: sram@0 {
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};
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};
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+ usb_host0_xhci: usb@fcc00000 {
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+ compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
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+ reg = <0x0 0xfcc00000 0x0 0x400000>;
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+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>,
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+ <&cru ACLK_USB3OTG0>;
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+ clock-names = "ref_clk", "suspend_clk",
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+ "bus_clk";
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+ dr_mode = "host";
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+ phy_type = "utmi_wide";
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+ power-domains = <&power RK3568_PD_PIPE>;
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+ resets = <&cru SRST_USB3OTG0>;
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+ snps,dis_u2_susphy_quirk;
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+ status = "disabled";
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+ };
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+
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+ usb_host1_xhci: usb@fd000000 {
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+ compatible = "rockchip,rk3568-dwc3", "snps,dwc3";
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+ reg = <0x0 0xfd000000 0x0 0x400000>;
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+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>,
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+ <&cru ACLK_USB3OTG1>;
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+ clock-names = "ref_clk", "suspend_clk",
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+ "bus_clk";
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+ dr_mode = "host";
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+ phys = <&usb2phy0_host>, <&combphy1 PHY_TYPE_USB3>;
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+ phy-names = "usb2-phy", "usb3-phy";
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+ phy_type = "utmi_wide";
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+ power-domains = <&power RK3568_PD_PIPE>;
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+ resets = <&cru SRST_USB3OTG1>;
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+ snps,dis_u2_susphy_quirk;
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+ status = "disabled";
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+ };
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+
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gic: interrupt-controller@fd400000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
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@@ -297,7 +331,6 @@ pmu_io_domains: io-domains {
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};
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pipegrf: syscon@fdc50000 {
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- compatible = "rockchip,rk3568-pipe-grf", "syscon";
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reg = <0x0 0xfdc50000 0x0 0x1000>;
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};
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