build/patch/kernel/archive/rockchip64-5.19/overlays-11-add-rk3308bs.patch

diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
index f11aa6d57..badb15519 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
@@ -19,7 +19,11 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 	rockchip-rk3318-box-wlan-ext.dtbo \
 	rockchip-rk3318-box-wlan-ap6330.dtbo \
 	rockchip-rk3318-box-cpu-hs.dtbo \
-	rockchip-rk3318-box-emmc-hs200.dtbo
+	rockchip-rk3318-box-emmc-hs200.dtbo \
+        rk3308-bs.dtbo rk3308-bs@1.3ghz.dtbo \
+        rk3308-sdio@10mhz.dtbo rk3308-sdio@4mhz.dtbo \
+        rk3308-emmc.dtbo
+        
 
 scr-$(CONFIG_ARCH_ROCKCHIP) += \
        rockchip-fixup.scr
diff --git a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
index 27f945d38..d21fed1ff 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
+++ b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
@@ -10,6 +10,10 @@ rockchip (Rockchip)
 
 - i2c7, i2c8, pcie-gen2, spi-spidev, uart4, w1-gpio
 
+for RK3308 (Rock PI-S)
+
+- rk3308bs rk3308bs-1.3ghz sdio-10mhz sdio-4mhz emmc
+
 ### Overlay details:
 
 ### i2c7
@@ -166,3 +170,40 @@ wifi + bt chip and clones.
 ### rk3318-box-cpu-hs
 
 Enable additional cpu "high-speed" bins up to 1.3ghz
+
+**********************************
+Details for Rock Pi-S overlays  (7 Oct 2022):
+
+V1.3 of the RockPi-S uses a the B-S variant of the RK3308 that is optimized
+for lower core voltages than the older chips on the V1.2 and V1.1 boards.
+All V1.3 boards should apply the
+###  rk3308-bs
+overlay to lower the core voltages to reduce power consumption.
+This also enables operation at 1.1Ghz.
+
+Optionally, V1.3 boards may add the
+###  rk3308-bs@1.3ghz
+to overclock the B-S CPU to 1.3Ghz.
+Add the rk3308bs-rock-pi-s-1.3Ghz overlay  *after adding*  rockchip-rk3308bs
+
+===========
+Install the following overlays only on older (unpatched) mainline kernels:
+
+Older mainline kernels disable the Rock Pi S built-in SDNAND (EMMC)
+###  rk3308-emmc
+enables your SDNAND chip.  It is OK to install for boards that lack the SDNAND.
+
+The legacy 4.4 and this mainline kernel drive the SDIO clock at 50Mhz to provide
+maximum WiFi throughput.  However...
+
+Older versions of the Mainline kernel drive the SDIO clock at only 1Mhz
+This reduces WiFi throughput to < 500kB/s !
+
+###  rk3308-sdio@10mhz
+increases the SDIO clock to 10Mhz, providing about 2.4MB/s WiFi throughput.
+
+###  rk3308-sdio@4mhz
+increases the SDIO clock to only 4Mhz, providing about 1MB/s WiFi throughput.
+use this only if 10Mhz SDIO clock is unstable
+
+Note that older mainline kernels cannot drive the SDIO clock faster than 10Mhz.
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3308-bs.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3308-bs.dts
new file mode 100644
index 000000000..978f67947
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3308-bs.dts
@@ -0,0 +1,39 @@
+//Adjustments for Rockchip RK3308-BS suffix SOC
+//https://dl.radxa.com/rockpis/docs/sw/RK3308B-S&RK3308H-S_Software_Compatibility_Introduction_V1.0.0_20211016.pdf
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&cpu0_opp_table>;
+		__overlay__ {
+			opp-408000000 {
+				opp-hz = /bits/ 64 <408000000>;
+				opp-microvolt = <850000 850000 1200000>;
+				clock-latency-ns = <40000>;
+				opp-suspend;
+			};
+			opp-600000000 {
+				opp-hz = /bits/ 64 <600000000>;
+				opp-microvolt = <900000 900000 1200000>;
+				clock-latency-ns = <40000>;
+			};
+			opp-816000000 {
+				opp-hz = /bits/ 64 <816000000>;
+				opp-microvolt = <1000000 1000000 1200000>;
+				clock-latency-ns = <40000>;
+			};
+			opp-1008000000 {
+				opp-hz = /bits/ 64 <1008000000>;
+				opp-microvolt = <1125000 1125000 1200000>;
+				clock-latency-ns = <40000>;
+			};
+			opp-1104000000 {
+				opp-hz = /bits/ 64 <1104000000>;
+				opp-microvolt = <1200000 1200000 1200000>;
+				clock-latency-ns = <40000>;
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3308-bs@1.3ghz.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3308-bs@1.3ghz.dts
new file mode 100644
index 000000000..3fae0dd23
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3308-bs@1.3ghz.dts
@@ -0,0 +1,26 @@
+//Overclock the Rockchip RK3308-BS suffix SOC to 1.3 Ghz
+//  assumes rk3308bs-rock-pi-s.dts overlay has already been added
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&cpu0_opp_table>;
+		__overlay__ {
+			//the following are unsupported, overclocked operating points
+			opp-1200000000 {
+				opp-hz = /bits/ 64 <1200000000>;
+				opp-microvolt = <1200000 1200000 1200000>;
+				clock-latency-ns = <40000>;
+				status = "okay";
+			};
+			opp-1296000000 {
+				opp-hz = /bits/ 64 <1296000000>;
+				opp-microvolt = <1200000 1200000 1200000>;
+				clock-latency-ns = <40000>;
+				status = "okay";
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3308-emmc.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3308-emmc.dts
new file mode 100644
index 000000000..4a4c3804d
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3308-emmc.dts
@@ -0,0 +1,13 @@
+//For RockPI-S:  enable SDnand chip
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&emmc>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3308-sdio@10mhz.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3308-sdio@10mhz.dts
new file mode 100644
index 000000000..c7f2e280f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3308-sdio@10mhz.dts
@@ -0,0 +1,14 @@
+//For RockPI-S:  Increase SDIO Max Frequency from 1Mhz to 10Mhz
+//Increases RTL8723-BS WiFi's throughput from 300KB/s to 2.4MB/s
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&sdio>;
+		__overlay__ {
+			max-frequency = <10000000>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3308-sdio@4mhz.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3308-sdio@4mhz.dts
new file mode 100644
index 000000000..efcc5c265
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3308-sdio@4mhz.dts
@@ -0,0 +1,14 @@
+//For RockPI-S:  Increase SDIO Max Frequency from 1Mhz to 4Mhz
+//Increases RTL8723-BS WiFi's throughput from 300KB/s to 1MB/s
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&sdio>;
+		__overlay__ {
+			max-frequency = <4000000>;
+		};
+	};
+};