build/patch/kernel/archive/rockchip64-5.19/rk3328-device-tree-overlays-uart1-i2c0.patch

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From 0a11005a8a39ed8d84c42a0f29636631db621f0a Mon Sep 17 00:00:00 2001
From: Kat Schwarz <schwar3kat@armbian.com>
Date: Sun, 22 Jan 2023 21:16:07 +1300
Subject: [PATCH] add-rk3328-dtbo-uart1-i2c0
RK3328 UART1 and I2C0 are available on Orange Pi R1 Plus LTS 13 pin connector.
Add two device tree overlay files for rk3328 uart1 and i2c0.
Signed-off-by: Kat Schwarz <schwar3kat@armbian.com>
---
arch/arm64/boot/dts/rockchip/overlay/Makefile | 2 ++
.../rockchip/overlay/README.rockchip-overlays | 12 ++++++++++++
.../rockchip/overlay/rockchip-rk3328-i2c0.dts | 13 +++++++++++++
.../rockchip/overlay/rockchip-rk3328-uart1.dts | 17 +++++++++++++++++
4 files changed, 44 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-i2c0.dts
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-uart1.dts
diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
index 7813ae347..53f8412d7 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
@@ -3,6 +3,8 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
rockchip-i2c7.dtbo \
rockchip-i2c8.dtbo \
rockchip-pcie-gen2.dtbo \
+ rockchip-rk3328-i2c0.dtbo \
+ rockchip-rk3328-uart1.dtbo \
rockchip-rk3328-opp-1.4ghz.dtbo \
rockchip-rk3328-opp-1.5ghz.dtbo \
rockchip-rk3399-opp-2ghz.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
index 07e79b04d..16942a511 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
+++ b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
@@ -29,6 +29,18 @@ I2C8 pins (pi-conn) (pi-conn) (SCL, SDA): GPIO1-C5, GPIO1-C4
Enables PCIe Gen2 link speed on RK3399.
WARNING! Not officially supported by Rockchip!!!
+### rk3328-i2c0
+
+Activates TWI/I2C bus 0
+
+I2C0 (SCL, SDA): GPIO2-D0, GPIO2-D1
+
+### rk3328-uart1
+
+Activates UART1
+
+UART1 pins (RX, TX): GPIO3_A6, GPIO3_A4
+
### rk3328-opp-1.4ghz
Adds the 1.4GHz opp for overclocking
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-i2c0.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-i2c0.dts
new file mode 100644
index 000000000..af2d61ecd
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-i2c0.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3328";
+
+ fragment@0 {
+ target-path = "/i2c@ff150000";
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-uart1.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-uart1.dts
new file mode 100644
index 000000000..9ff6a0018
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-uart1.dts
@@ -0,0 +1,17 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3328";
+
+ fragment@1 {
+ target = <0xffffffff>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ __fixups__ {
+ uart1 = "/fragment@1:target:0";
+ };
+};
--
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