353 lines
7.8 KiB
Diff
353 lines
7.8 KiB
Diff
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From 506d63cda173ca0f992bdbf4b4d2f3e1e20f905c Mon Sep 17 00:00:00 2001
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From: Paolo Sabatino <paolo.sabatino@gmail.com>
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Date: Mon, 18 Oct 2021 18:30:28 +0000
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Subject: [PATCH] rk3318-box: add led-conf3 to support MXQ-RK3328-D4 boards
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with RK805 PMIC
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---
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arch/arm64/boot/dts/rockchip/overlay/Makefile | 1 +
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.../rockchip/overlay/README.rockchip-overlays | 7 +
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.../overlay/rockchip-rk3318-box-led-conf3.dts | 279 ++++++++++++++++++
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3 files changed, 287 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3318-box-led-conf3.dts
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diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
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index c28c7a5eb..f11aa6d57 100644
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--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
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@@ -13,6 +13,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
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rockchip-w1-gpio.dtbo \
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rockchip-rk3318-box-led-conf1.dtbo \
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rockchip-rk3318-box-led-conf2.dtbo \
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+ rockchip-rk3318-box-led-conf3.dtbo \
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rockchip-rk3318-box-emmc-ddr.dtbo \
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rockchip-rk3318-box-wlan-ap6334.dtbo \
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rockchip-rk3318-box-wlan-ext.dtbo \
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diff --git a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
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index 4172bd731..27f945d38 100644
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--- a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
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+++ b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
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@@ -129,6 +129,13 @@ YX_RK3328 and clones
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Activates led/gpio configuration for rk3318 tv box boards withs signature
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X88_PRO_B and clones
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+### rk3318-box-led-conf3
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+
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+This device tree overlay is suitable for MXQ-RK3328-D4_A board which
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+has an integrated PMIC (RK805). The dtbo is very important to achieve
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+1.3 Ghz speed for CPU and stable voltages for other parts of the
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+system. Also enables gpio leds and keys.
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+
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### rk3318-box-emmc-ddr
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Activates eMMC DDR capability for rk3318 tv box boards. Probably all the eMMC chips
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diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3318-box-led-conf3.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3318-box-led-conf3.dts
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new file mode 100644
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index 000000000000..6e05145a287d
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3318-box-led-conf3.dts
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@@ -0,0 +1,300 @@
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+/dts-v1/;
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+/plugin/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+
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+&{/regulators/regulator@0} {
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+ status = "disabled";
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+};
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+
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+&{/regulators/regulator@1} {
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+ status = "disabled";
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+};
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+
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+&{/vdd-arm} {
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+ status = "disabled";
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+};
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+
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+&{/vdd-log} {
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+ status = "disabled";
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+};
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+
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+&{/xin32k} {
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+ status = "disabled";
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+};
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+
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+&i2c1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ clock-frequency = <1000000>;
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+ i2c-scl-rising-time-ns = <83>;
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+ i2c-scl-falling-time-ns = <5>;
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+ status = "okay";
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+
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+ rk805: rk805@18 {
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+ compatible = "rockchip,rk805";
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+ reg = <0x18>;
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+ status = "okay";
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ interrupt-parent = <&gpio2>;
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+ interrupts = <RK_PA6 IRQ_TYPE_LEVEL_LOW>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+
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+ #clock-cells = <1>;
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+ clock-output-names = "xin32k", "rk805-clkout2";
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+
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+ vcc1-supply = <&vcc_sys>;
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+ vcc2-supply = <&vcc_sys>;
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+ vcc3-supply = <&vcc_sys>;
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+ vcc4-supply = <&vcc_sys>;
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+ vcc5-supply = <&rk805_vcc_io>;
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+ vcc6-supply = <&rk805_vcc_io>;
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+
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+ rtc {
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+ status = "okay";
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+ };
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+
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+ pwrkey {
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+ status = "okay";
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+ };
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+
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+ gpio {
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+ status = "okay";
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+ };
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+
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+ regulators {
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+ compatible = "rk805-regulator";
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-min-microvolt = <700000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <12500>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ vdd_arm: DCDC_REG2 {
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+ regulator-name = "vdd_arm";
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+ regulator-min-microvolt = <700000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <12500>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <950000>;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc_io: rk805_vcc_io: DCDC_REG4 {
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+ regulator-name = "vccio_3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vdd_18: vcc_18: LDO_REG1 {
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+ regulator-name = "vccio_1v8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vcc_18emmc: LDO_REG2 {
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+ regulator-name = "vcc_18emmc";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vdd_11: LDO_REG3 {
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+ regulator-name = "vdd_11";
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1100000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1100000>;
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+ };
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+ };
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+ };
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+ };
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+
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+};
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+
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+&pinctrl {
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+
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+ leds {
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+ ir_led: ir-led {
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+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+};
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+
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+&gpio_led {
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ir_led>;
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+
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+ working {
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+ gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "mmc2";
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+ default-state = "off";
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+ mode = <35>;
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+ };
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+
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+ /*
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+ * These leds are described in the original dtb, but are not present on the board
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+ auxiliary {
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+ gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "mmc2";
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+ default-state = "off";
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+ mode = <5>;
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+ };
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+
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+ ir {
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+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
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+ linux,default-trigger = "ir";
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+ default-state = "off";
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+ mode = <0>;
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+ };
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+ */
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+
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+};
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+
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+&io_domains {
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+ vccio1-supply = <&vcc_io>;
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+ vccio2-supply = <&vcc_18emmc>;
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+ vccio3-supply = <&vcc_io>;
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+ vccio4-supply = <&vdd_18>;
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+ vccio5-supply = <&vcc_io>;
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+ vccio6-supply = <&vcc_io>;
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+ pmuio-supply = <&vcc_io>;
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+};
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+
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+&{/} {
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+ gpio_keys: gpio-keys {
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+ compatible = "gpio-keys";
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+
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+ power {
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+ label = "Power button";
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+ linux,code = <KEY_POWER>;
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+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ };
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+ };
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+};
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+
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+&dmc {
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+ center-supply = <&vdd_logic>;
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_logic>;
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+};
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+
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+&vpu {
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+ vcodec-supply = <&vdd_logic>;
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+
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+&vcc_sd {
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+ vin-supply = <&vcc_io>;
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+};
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+
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+&emmc {
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+ vmmc-supply = <&vcc_io>;
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+ vqmmc-supply = <&vcc_18emmc>;
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+};
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+
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+&saradc {
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+ vref-supply = <&vcc_18>;
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+};
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+
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+&pwm0 {
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+ status = "disabled";
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+};
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+
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+&pwm1 {
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+ status = "disabled";
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+};
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+
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+/*
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+ * Following section enables the sdio bus on sdmmc_ext controller
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+ */
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+&sdio {
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+ /delete-property/ mmc-pwrseq;
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+ status = "disabled";
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+};
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+
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+&sdio_ext {
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+ rockchip,default-sample-phase = <112>; // Allows ssv6051 chips to be detected at 50 MHz
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+ sd-uhs-sdr50;
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+ mmc-pwrseq = <&sdio_pwrseq>;
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+ status = "okay";
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+};
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+
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+&sdmmc_ext {
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+ status = "disabled";
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+};
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--
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2.30.2
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