185 lines
9.3 KiB
Diff
185 lines
9.3 KiB
Diff
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Dan Pasanen <dan.pasanen@gmail.com>
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Date: Thu, 16 Dec 2021 05:17:33 -0500
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Subject: [ARCHEOLOGY] rockchip-[current,edge]: add pcie hack and lsi scsi/sas
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support (#3351)
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> X-Git-Archeology: > recovered message: > * build: kernel: rockchip64-[current,edge]: add pcie bus scan delay patches
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> X-Git-Archeology: > recovered message: > These are needed for cards like the LSI SAS2008 which needs a little
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> X-Git-Archeology: > recovered message: > extra time to initialize or they'll cause a kernel panic.
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> X-Git-Archeology: > recovered message: > References:
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> X-Git-Archeology: > recovered message: > https://gitlab.manjaro.org/manjaro-arm/packages/core/linux/-/blob/master/0013-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch
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> X-Git-Archeology: > recovered message: > https://gitlab.manjaro.org/manjaro-arm/packages/core/linux/-/blob/master/0022-arm64-dts-rockchip-Add-pcie-bus-scan-delay-to-rockpr.patch
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> X-Git-Archeology: > recovered message: > * config: linux-rockchip64-[current,edge]: enable lsi sata/sas support
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> X-Git-Archeology: - Revision 7be9e8b99590e32c0594365d00a2a2cfc3c4bd5a: https://github.com/armbian/build/commit/7be9e8b99590e32c0594365d00a2a2cfc3c4bd5a
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> X-Git-Archeology: Date: Thu, 16 Dec 2021 05:17:33 -0500
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> X-Git-Archeology: From: Dan Pasanen <dan.pasanen@gmail.com>
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> X-Git-Archeology: Subject: rockchip-[current,edge]: add pcie hack and lsi scsi/sas support (#3351)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 6b490e16944b30ff69bf9c13678905187df0d9d4: https://github.com/armbian/build/commit/6b490e16944b30ff69bf9c13678905187df0d9d4
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> X-Git-Archeology: Date: Tue, 11 Jan 2022 15:26:11 +0100
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> X-Git-Archeology: From: Oleg <balbes-150@yandex.ru>
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> X-Git-Archeology: Subject: move kernel edge to 5.16 (#3387)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision ac8fc4385594d59257ee9dffd9efa85e3497fa7d: https://github.com/armbian/build/commit/ac8fc4385594d59257ee9dffd9efa85e3497fa7d
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> X-Git-Archeology: Date: Sat, 26 Feb 2022 07:46:44 +0100
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> X-Git-Archeology: From: Piotr Szczepanik <piter75@gmail.com>
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> X-Git-Archeology: Subject: Switch rockchip64 current to linux 5.15.y (#3489)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision f52a4193d02ef88333ba117c68d49486dfd7ff41: https://github.com/armbian/build/commit/f52a4193d02ef88333ba117c68d49486dfd7ff41
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> X-Git-Archeology: Date: Sun, 20 Mar 2022 22:58:21 +0100
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> X-Git-Archeology: From: Oleg <balbes-150@yandex.ru>
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> X-Git-Archeology: Subject: Adding Pine64 Quartz64a as WIP target (#3539)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 0afe24c95729044910e0b3f84dc5500bcdc6524c: https://github.com/armbian/build/commit/0afe24c95729044910e0b3f84dc5500bcdc6524c
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> X-Git-Archeology: Date: Sun, 24 Apr 2022 22:33:47 +0200
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> X-Git-Archeology: From: Oleg <balbes-150@yandex.ru>
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> X-Git-Archeology: Subject: move kernel media edge to 5.17 (#3704)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 897674aa74bce0326ed7fe06f5336bf4709a8a1f: https://github.com/armbian/build/commit/897674aa74bce0326ed7fe06f5336bf4709a8a1f
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> X-Git-Archeology: Date: Tue, 03 May 2022 08:27:32 +0200
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> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
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> X-Git-Archeology: Subject: Bump and freeze kernel at last known working versions (#3736)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 597d2dac11f00d9070a4e49d6bad1b2244e36cb3: https://github.com/armbian/build/commit/597d2dac11f00d9070a4e49d6bad1b2244e36cb3
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> X-Git-Archeology: Date: Sat, 28 May 2022 07:56:22 +0200
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> X-Git-Archeology: From: Jianfeng Liu <liujianfeng1994@gmail.com>
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> X-Git-Archeology: Subject: update rockchip64-edge to 5.18 (#3814)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 8c6641e7b79f0d50acdc306d140e586a4e923cf0: https://github.com/armbian/build/commit/8c6641e7b79f0d50acdc306d140e586a4e923cf0
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> X-Git-Archeology: Date: Wed, 03 Aug 2022 22:22:55 +0200
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> X-Git-Archeology: From: Jianfeng Liu <liujianfeng1994@gmail.com>
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> X-Git-Archeology: Subject: update rockchip64 edge to 5.19 (#4039)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 6765f734cc4a22aeaa9f99a3ad28c8c322de26f6: https://github.com/armbian/build/commit/6765f734cc4a22aeaa9f99a3ad28c8c322de26f6
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> X-Git-Archeology: Date: Tue, 25 Oct 2022 11:26:51 +0200
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> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
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> X-Git-Archeology: Subject: Bump rockchip64 edge to 6.0.y (#4337)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 92f1a22d76b987afa7ba555d5b509adc51d689e7: https://github.com/armbian/build/commit/92f1a22d76b987afa7ba555d5b509adc51d689e7
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> X-Git-Archeology: Date: Fri, 16 Dec 2022 13:38:13 +0100
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> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
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> X-Git-Archeology: Subject: Re-add rockchip64 6.0 patches (#4575)
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> X-Git-Archeology:
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> X-Git-Archeology: - Revision 34ae84fac5d0b66a1ab2d1e51534b7beb13ef245: https://github.com/armbian/build/commit/34ae84fac5d0b66a1ab2d1e51534b7beb13ef245
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> X-Git-Archeology: Date: Fri, 05 May 2023 14:22:00 +0200
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> X-Git-Archeology: From: amazingfate <liujianfeng1994@gmail.com>
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> X-Git-Archeology: Subject: bump rockchip64 edge to v6.3
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> X-Git-Archeology:
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---
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Documentation/admin-guide/kernel-parameters.txt | 8 +++
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drivers/pci/controller/pcie-rockchip-host.c | 25 ++++++++++
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drivers/pci/controller/pcie-rockchip.c | 6 +++
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drivers/pci/controller/pcie-rockchip.h | 2 +
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4 files changed, 41 insertions(+)
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diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
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index 7016cb12dc4e..6fc40ae5ce10 100644
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--- a/Documentation/admin-guide/kernel-parameters.txt
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+++ b/Documentation/admin-guide/kernel-parameters.txt
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@@ -4388,6 +4388,14 @@
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nomsi Do not use MSI for native PCIe PME signaling (this makes
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all PCIe root ports use INTx for all services).
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+ pcie_rockchip_host.bus_scan_delay= [PCIE] Delay in ms before
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+ scanning PCIe bus in Rockchip PCIe host driver. Some PCIe
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+ cards seem to need delays that can be several hundred ms.
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+ If set to greater than or equal to 0 this parameter will
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+ override delay that can be set in device tree.
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+ Values less than 0 mean that this parameter is ignored.
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+ default=-1
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+
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pcmv= [HW,PCMCIA] BadgePAD 4
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pd_ignore_unused
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diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
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index c96c0f454570..a161b852a5c8 100644
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--- a/drivers/pci/controller/pcie-rockchip-host.c
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+++ b/drivers/pci/controller/pcie-rockchip-host.c
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@@ -24,6 +24,7 @@
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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+#include <linux/moduleparam.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_pci.h>
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@@ -38,6 +39,9 @@
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#include "../pci.h"
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#include "pcie-rockchip.h"
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+static int bus_scan_delay = -1;
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+module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO);
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+
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static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip)
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{
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u32 status;
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@@ -932,6 +936,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct pci_host_bridge *bridge;
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int err;
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+ u32 delay = 0;
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if (!dev->of_node)
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return -ENODEV;
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@@ -981,6 +986,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
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bridge->sysdata = rockchip;
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bridge->ops = &rockchip_pcie_ops;
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+ /* Checking if bus scan delay was given from command line and prefer
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+ * that over the value in device tree (which defaults to 0 if not set).
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+ */
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+ if (bus_scan_delay >= 0) {
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+ delay = bus_scan_delay;
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+ dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay);
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+ } else {
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+ delay = rockchip->bus_scan_delay;
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+ dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay);
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+ }
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+ /* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge
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+ * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when
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+ * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack)
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+ * before panicing. I have no idea why this works or what causes the panic. I just
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+ * found this hack by luck when trying to "make it break differently if possible".
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+ */
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+ if (delay > 0) {
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+ msleep(delay);
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+ }
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+
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err = rockchip_pcie_setup_irq(rockchip);
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if (err)
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goto err_remove_irq_domain;
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diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
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index 990a00e08bc5..c7ec35afd8ca 100644
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--- a/drivers/pci/controller/pcie-rockchip.c
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+++ b/drivers/pci/controller/pcie-rockchip.c
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@@ -149,6 +149,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
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return PTR_ERR(rockchip->clk_pcie_pm);
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}
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+ err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay);
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+ if (err) {
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+ dev_info(dev, "no bus scan delay, default to 0 ms\n");
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+ rockchip->bus_scan_delay = 0;
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+ }
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+
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return 0;
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}
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EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
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diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
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index 32c3a859c26b..87223ba452a4 100644
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--- a/drivers/pci/controller/pcie-rockchip.h
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+++ b/drivers/pci/controller/pcie-rockchip.h
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@@ -299,6 +299,8 @@ struct rockchip_pcie {
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phys_addr_t msg_bus_addr;
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bool is_rc;
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struct resource *mem_res;
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+ /* Bus scan delay is a workaround for some pcie devices causing crashes */
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+ u32 bus_scan_delay;
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};
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static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg)
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--
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Armbian
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