441 lines
13 KiB
Diff
441 lines
13 KiB
Diff
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From d98aa318aabd4aba05328f9c832b23bdf2e1677a Mon Sep 17 00:00:00 2001
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From: Jernej Skrabec <jernej.skrabec@siol.net>
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Date: Fri, 16 Aug 2019 16:38:21 +0200
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Subject: [PATCH 1/4] mfd: Add support for AC200
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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---
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drivers/mfd/Kconfig | 9 ++
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drivers/mfd/Makefile | 1 +
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drivers/mfd/ac200.c | 170 +++++++++++++++++++++++++++++++
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include/linux/mfd/ac200.h | 208 ++++++++++++++++++++++++++++++++++++++
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4 files changed, 388 insertions(+)
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create mode 100644 drivers/mfd/ac200.c
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create mode 100644 include/linux/mfd/ac200.h
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diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
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index 420900852166..a45e7c88ac9b 100644
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--- a/drivers/mfd/Kconfig
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+++ b/drivers/mfd/Kconfig
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@@ -178,6 +178,15 @@ config MFD_AC100
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This driver include only the core APIs. You have to select individual
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components like codecs or RTC under the corresponding menus.
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+config MFD_AC200
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+ bool "X-Powers AC200"
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+ select MFD_CORE
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+ depends on I2C
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+ help
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+ If you say Y here you get support for the X-Powers AC200 IC.
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+ This driver include only the core APIs. You have to select individual
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+ components like Ethernet PHY or RTC under the corresponding menus.
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+
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config MFD_AXP20X
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tristate
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select MFD_CORE
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diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
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index aed99f08739f..4431a4cf19ca 100644
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--- a/drivers/mfd/Makefile
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+++ b/drivers/mfd/Makefile
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@@ -141,6 +141,7 @@ obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o
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obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o
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obj-$(CONFIG_MFD_AC100) += ac100.o
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+obj-$(CONFIG_MFD_AC200) += ac200.o
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obj-$(CONFIG_MFD_AXP20X) += axp20x.o
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obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o
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obj-$(CONFIG_MFD_AXP20X_RSB) += axp20x-rsb.o
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diff --git a/drivers/mfd/ac200.c b/drivers/mfd/ac200.c
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new file mode 100644
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index 000000000000..570573790d91
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--- /dev/null
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+++ b/drivers/mfd/ac200.c
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@@ -0,0 +1,170 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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+/*
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+ * MFD core driver for X-Powers' AC200 IC
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+ *
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+ * The AC200 is a chip which is co-packaged with Allwinner H6 SoC and
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+ * includes analog audio codec, analog TV encoder, ethernet PHY, eFuse
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+ * and RTC.
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+ *
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+ * Copyright (c) 2020 Jernej Skrabec <jernej.skrabec@siol.net>
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+ */
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+
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+#include <linux/i2c.h>
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+#include <linux/interrupt.h>
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+#include <linux/kernel.h>
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+#include <linux/mfd/core.h>
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+#include <linux/mfd/ac200.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+
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+/* Interrupts */
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+#define AC200_IRQ_RTC 0
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+#define AC200_IRQ_EPHY 1
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+#define AC200_IRQ_TVE 2
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+
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+/* IRQ enable register */
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+#define AC200_SYS_IRQ_ENABLE_OUT_EN BIT(15)
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+#define AC200_SYS_IRQ_ENABLE_RTC BIT(12)
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+#define AC200_SYS_IRQ_ENABLE_EPHY BIT(8)
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+#define AC200_SYS_IRQ_ENABLE_TVE BIT(4)
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+
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+static const struct regmap_range_cfg ac200_range_cfg[] = {
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+ {
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+ .range_min = AC200_SYS_VERSION,
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+ .range_max = AC200_IC_CHARA1,
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+ .selector_reg = AC200_TWI_REG_ADDR_H,
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+ .selector_mask = 0xff,
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+ .selector_shift = 0,
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+ .window_start = 0,
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+ .window_len = 256,
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+ }
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+};
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+
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+static const struct regmap_config ac200_regmap_config = {
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+ .reg_bits = 8,
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+ .val_bits = 16,
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+ .ranges = ac200_range_cfg,
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+ .num_ranges = ARRAY_SIZE(ac200_range_cfg),
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+ .max_register = AC200_IC_CHARA1,
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+};
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+
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+static const struct regmap_irq ac200_regmap_irqs[] = {
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+ REGMAP_IRQ_REG(AC200_IRQ_RTC, 0, AC200_SYS_IRQ_ENABLE_RTC),
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+ REGMAP_IRQ_REG(AC200_IRQ_EPHY, 0, AC200_SYS_IRQ_ENABLE_EPHY),
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+ REGMAP_IRQ_REG(AC200_IRQ_TVE, 0, AC200_SYS_IRQ_ENABLE_TVE),
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+};
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+
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+static const struct regmap_irq_chip ac200_regmap_irq_chip = {
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+ .name = "ac200_irq_chip",
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+ .status_base = AC200_SYS_IRQ_STATUS,
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+ .mask_base = AC200_SYS_IRQ_ENABLE,
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+ .mask_invert = true,
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+ .irqs = ac200_regmap_irqs,
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+ .num_irqs = ARRAY_SIZE(ac200_regmap_irqs),
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+ .num_regs = 1,
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+};
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+
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+static const struct resource ephy_resource[] = {
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+ DEFINE_RES_IRQ(AC200_IRQ_EPHY),
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+};
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+
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+static const struct mfd_cell ac200_cells[] = {
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+ {
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+ .name = "ac200-ephy",
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+ .num_resources = ARRAY_SIZE(ephy_resource),
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+ .resources = ephy_resource,
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+ .of_compatible = "x-powers,ac200-ephy",
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+ },
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+};
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+
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+static int ac200_i2c_probe(struct i2c_client *i2c,
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+ const struct i2c_device_id *id)
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+{
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+ struct device *dev = &i2c->dev;
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+ struct ac200_dev *ac200;
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+ int ret;
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+
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+ ac200 = devm_kzalloc(dev, sizeof(*ac200), GFP_KERNEL);
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+ if (!ac200)
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+ return -ENOMEM;
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+
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+ i2c_set_clientdata(i2c, ac200);
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+
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+ ac200->regmap = devm_regmap_init_i2c(i2c, &ac200_regmap_config);
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+ if (IS_ERR(ac200->regmap)) {
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+ ret = PTR_ERR(ac200->regmap);
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+ dev_err(dev, "regmap init failed: %d\n", ret);
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+ return ret;
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+ }
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+
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+ /* do a reset to put chip in a known state */
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+
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+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
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+ if (ret)
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+ return ret;
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+
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+ ret = regmap_write(ac200->regmap, AC200_SYS_CONTROL, 1);
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+ if (ret)
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+ return ret;
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+
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+ /* enable interrupt pin */
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+
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+ ret = regmap_write(ac200->regmap, AC200_SYS_IRQ_ENABLE,
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+ AC200_SYS_IRQ_ENABLE_OUT_EN);
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+ if (ret)
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+ return ret;
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+
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+ ret = regmap_add_irq_chip(ac200->regmap, i2c->irq, IRQF_ONESHOT, 0,
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+ &ac200_regmap_irq_chip, &ac200->regmap_irqc);
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+ if (ret)
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+ return ret;
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+
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+ ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, ac200_cells,
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+ ARRAY_SIZE(ac200_cells), NULL, 0, NULL);
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+ if (ret) {
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+ dev_err(dev, "failed to add MFD devices: %d\n", ret);
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+ regmap_del_irq_chip(i2c->irq, ac200->regmap_irqc);
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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+static int ac200_i2c_remove(struct i2c_client *i2c)
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+{
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+ struct ac200_dev *ac200 = i2c_get_clientdata(i2c);
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+
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+ regmap_write(ac200->regmap, AC200_SYS_CONTROL, 0);
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+
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+ mfd_remove_devices(&i2c->dev);
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+ regmap_del_irq_chip(i2c->irq, ac200->regmap_irqc);
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+
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+ return 0;
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+}
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+
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+static const struct i2c_device_id ac200_ids[] = {
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+ { "ac200", },
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+ { /* sentinel */ }
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+};
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+MODULE_DEVICE_TABLE(i2c, ac200_ids);
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+
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+static const struct of_device_id ac200_of_match[] = {
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+ { .compatible = "x-powers,ac200" },
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+ { /* sentinel */ }
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+};
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+MODULE_DEVICE_TABLE(of, ac200_of_match);
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+
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+static struct i2c_driver ac200_i2c_driver = {
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+ .driver = {
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+ .name = "ac200",
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+ .of_match_table = of_match_ptr(ac200_of_match),
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+ },
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+ .probe = ac200_i2c_probe,
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+ .remove = ac200_i2c_remove,
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+ .id_table = ac200_ids,
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+};
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+module_i2c_driver(ac200_i2c_driver);
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+
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+MODULE_DESCRIPTION("MFD core driver for AC200");
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+MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
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+MODULE_LICENSE("GPL v2");
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diff --git a/include/linux/mfd/ac200.h b/include/linux/mfd/ac200.h
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new file mode 100644
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index 000000000000..0c677094a5b3
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--- /dev/null
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+++ b/include/linux/mfd/ac200.h
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@@ -0,0 +1,208 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+/*
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+ * AC200 register list
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+ *
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+ * Copyright (C) 2019 Jernej Skrabec <jernej.skrabec@siol.net>
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+ */
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+
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+#ifndef __LINUX_MFD_AC200_H
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+#define __LINUX_MFD_AC200_H
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+
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+#include <linux/regmap.h>
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+
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+/* interface registers (can be accessed from any page) */
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+#define AC200_TWI_CHANGE_TO_RSB 0x3E
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+#define AC200_TWI_PAD_DELAY 0xC4
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+#define AC200_TWI_REG_ADDR_H 0xFE
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+
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+/* General registers */
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+#define AC200_SYS_VERSION 0x0000
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+#define AC200_SYS_CONTROL 0x0002
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+#define AC200_SYS_IRQ_ENABLE 0x0004
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+#define AC200_SYS_IRQ_STATUS 0x0006
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+#define AC200_SYS_CLK_CTL 0x0008
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+#define AC200_SYS_DLDO_OSC_CTL 0x000A
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+#define AC200_SYS_PLL_CTL0 0x000C
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+#define AC200_SYS_PLL_CTL1 0x000E
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+#define AC200_SYS_AUDIO_CTL0 0x0010
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+#define AC200_SYS_AUDIO_CTL1 0x0012
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+#define AC200_SYS_EPHY_CTL0 0x0014
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+#define AC200_SYS_EPHY_CTL1 0x0016
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+#define AC200_SYS_TVE_CTL0 0x0018
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+#define AC200_SYS_TVE_CTL1 0x001A
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+
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+/* Audio Codec registers */
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+#define AC200_AC_SYS_CLK_CTL 0x2000
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+#define AC200_SYS_MOD_RST 0x2002
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+#define AC200_SYS_SAMP_CTL 0x2004
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+#define AC200_I2S_CTL 0x2100
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+#define AC200_I2S_CLK 0x2102
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+#define AC200_I2S_FMT0 0x2104
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+#define AC200_I2S_FMT1 0x2108
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+#define AC200_I2S_MIX_SRC 0x2114
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+#define AC200_I2S_MIX_GAIN 0x2116
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+#define AC200_I2S_DACDAT_DVC 0x2118
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+#define AC200_I2S_ADCDAT_DVC 0x211A
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+#define AC200_AC_DAC_DPC 0x2200
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+#define AC200_AC_DAC_MIX_SRC 0x2202
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+#define AC200_AC_DAC_MIX_GAIN 0x2204
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+#define AC200_DACA_OMIXER_CTRL 0x2220
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+#define AC200_OMIXER_SR 0x2222
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+#define AC200_LINEOUT_CTRL 0x2224
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+#define AC200_AC_ADC_DPC 0x2300
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+#define AC200_MBIAS_CTRL 0x2310
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+#define AC200_ADC_MIC_CTRL 0x2320
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+#define AC200_ADCMIXER_SR 0x2322
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+#define AC200_ANALOG_TUNING0 0x232A
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+#define AC200_ANALOG_TUNING1 0x232C
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+#define AC200_AC_AGC_SEL 0x2480
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+#define AC200_ADC_DAPLCTRL 0x2500
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+#define AC200_ADC_DAPRCTRL 0x2502
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+#define AC200_ADC_DAPLSTA 0x2504
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+#define AC200_ADC_DAPRSTA 0x2506
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+#define AC200_ADC_DAPLTL 0x2508
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+#define AC200_ADC_DAPRTL 0x250A
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+#define AC200_ADC_DAPLHAC 0x250C
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+#define AC200_ADC_DAPLLAC 0x250E
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+#define AC200_ADC_DAPRHAC 0x2510
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+#define AC200_ADC_DAPRLAC 0x2512
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+#define AC200_ADC_DAPLDT 0x2514
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+#define AC200_ADC_DAPLAT 0x2516
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+#define AC200_ADC_DAPRDT 0x2518
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+#define AC200_ADC_DAPRAT 0x251A
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+#define AC200_ADC_DAPNTH 0x251C
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+#define AC200_ADC_DAPLHNAC 0x251E
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+#define AC200_ADC_DAPLLNAC 0x2520
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+#define AC200_ADC_DAPRHNAC 0x2522
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+#define AC200_ADC_DAPRLNAC 0x2524
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+#define AC200_AC_DAPHHPFC 0x2526
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+#define AC200_AC_DAPLHPFC 0x2528
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+#define AC200_AC_DAPOPT 0x252A
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+#define AC200_AC_DAC_DAPCTRL 0x3000
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+#define AC200_AC_DRC_HHPFC 0x3002
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+#define AC200_AC_DRC_LHPFC 0x3004
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+#define AC200_AC_DRC_CTRL 0x3006
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+#define AC200_AC_DRC_LPFHAT 0x3008
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+#define AC200_AC_DRC_LPFLAT 0x300A
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+#define AC200_AC_DRC_RPFHAT 0x300C
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+#define AC200_AC_DRC_RPFLAT 0x300E
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+#define AC200_AC_DRC_LPFHRT 0x3010
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+#define AC200_AC_DRC_LPFLRT 0x3012
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+#define AC200_AC_DRC_RPFHRT 0x3014
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+#define AC200_AC_DRC_RPFLRT 0x3016
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+#define AC200_AC_DRC_LRMSHAT 0x3018
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+#define AC200_AC_DRC_LRMSLAT 0x301A
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+#define AC200_AC_DRC_RRMSHAT 0x301C
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+#define AC200_AC_DRC_RRMSLAT 0x301E
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+#define AC200_AC_DRC_HCT 0x3020
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+#define AC200_AC_DRC_LCT 0x3022
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+#define AC200_AC_DRC_HKC 0x3024
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+#define AC200_AC_DRC_LKC 0x3026
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+#define AC200_AC_DRC_HOPC 0x3028
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+#define AC200_AC_DRC_LOPC 0x302A
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+#define AC200_AC_DRC_HLT 0x302C
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+#define AC200_AC_DRC_LLT 0x302E
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+#define AC200_AC_DRC_HKI 0x3030
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+#define AC200_AC_DRC_LKI 0x3032
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+#define AC200_AC_DRC_HOPL 0x3034
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+#define AC200_AC_DRC_LOPL 0x3036
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+#define AC200_AC_DRC_HET 0x3038
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+#define AC200_AC_DRC_LET 0x303A
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+#define AC200_AC_DRC_HKE 0x303C
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+#define AC200_AC_DRC_LKE 0x303E
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+#define AC200_AC_DRC_HOPE 0x3040
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+#define AC200_AC_DRC_LOPE 0x3042
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+#define AC200_AC_DRC_HKN 0x3044
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+#define AC200_AC_DRC_LKN 0x3046
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+#define AC200_AC_DRC_SFHAT 0x3048
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+#define AC200_AC_DRC_SFLAT 0x304A
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+#define AC200_AC_DRC_SFHRT 0x304C
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+#define AC200_AC_DRC_SFLRT 0x304E
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||
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+#define AC200_AC_DRC_MXGHS 0x3050
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||
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+#define AC200_AC_DRC_MXGLS 0x3052
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||
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+#define AC200_AC_DRC_MNGHS 0x3054
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||
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+#define AC200_AC_DRC_MNGLS 0x3056
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||
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+#define AC200_AC_DRC_EPSHC 0x3058
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||
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+#define AC200_AC_DRC_EPSLC 0x305A
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||
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+#define AC200_AC_DRC_HPFHGAIN 0x305E
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||
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+#define AC200_AC_DRC_HPFLGAIN 0x3060
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||
|
+#define AC200_AC_DRC_BISTCR 0x3100
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||
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+#define AC200_AC_DRC_BISTST 0x3102
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||
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+
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||
|
+/* TVE registers */
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||
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+#define AC200_TVE_CTL0 0x4000
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||
|
+#define AC200_TVE_CTL1 0x4002
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||
|
+#define AC200_TVE_MOD0 0x4004
|
||
|
+#define AC200_TVE_MOD1 0x4006
|
||
|
+#define AC200_TVE_DAC_CFG0 0x4008
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||
|
+#define AC200_TVE_DAC_CFG1 0x400A
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||
|
+#define AC200_TVE_YC_DELAY 0x400C
|
||
|
+#define AC200_TVE_YC_FILTER 0x400E
|
||
|
+#define AC200_TVE_BURST_FRQ0 0x4010
|
||
|
+#define AC200_TVE_BURST_FRQ1 0x4012
|
||
|
+#define AC200_TVE_FRONT_PORCH 0x4014
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||
|
+#define AC200_TVE_BACK_PORCH 0x4016
|
||
|
+#define AC200_TVE_TOTAL_LINE 0x401C
|
||
|
+#define AC200_TVE_FIRST_ACTIVE 0x401E
|
||
|
+#define AC200_TVE_BLACK_LEVEL 0x4020
|
||
|
+#define AC200_TVE_BLANK_LEVEL 0x4022
|
||
|
+#define AC200_TVE_PLUG_EN 0x4030
|
||
|
+#define AC200_TVE_PLUG_IRQ_EN 0x4032
|
||
|
+#define AC200_TVE_PLUG_IRQ_STA 0x4034
|
||
|
+#define AC200_TVE_PLUG_STA 0x4038
|
||
|
+#define AC200_TVE_PLUG_DEBOUNCE 0x4040
|
||
|
+#define AC200_TVE_DAC_TEST 0x4042
|
||
|
+#define AC200_TVE_PLUG_PULSE_LEVEL 0x40F4
|
||
|
+#define AC200_TVE_PLUG_PULSE_START 0x40F8
|
||
|
+#define AC200_TVE_PLUG_PULSE_PERIOD 0x40FA
|
||
|
+#define AC200_TVE_IF_CTL 0x5000
|
||
|
+#define AC200_TVE_IF_TIM0 0x5008
|
||
|
+#define AC200_TVE_IF_TIM1 0x500A
|
||
|
+#define AC200_TVE_IF_TIM2 0x500C
|
||
|
+#define AC200_TVE_IF_TIM3 0x500E
|
||
|
+#define AC200_TVE_IF_SYNC0 0x5010
|
||
|
+#define AC200_TVE_IF_SYNC1 0x5012
|
||
|
+#define AC200_TVE_IF_SYNC2 0x5014
|
||
|
+#define AC200_TVE_IF_TIM4 0x5016
|
||
|
+#define AC200_TVE_IF_STATUS 0x5018
|
||
|
+
|
||
|
+/* EPHY registers */
|
||
|
+#define AC200_EPHY_CTL 0x6000
|
||
|
+#define AC200_EPHY_BIST 0x6002
|
||
|
+
|
||
|
+/* eFuse registers (0x8000 - 0x9FFF, layout unknown) */
|
||
|
+
|
||
|
+/* RTC registers */
|
||
|
+#define AC200_LOSC_CTRL0 0xA000
|
||
|
+#define AC200_LOSC_CTRL1 0xA002
|
||
|
+#define AC200_LOSC_AUTO_SWT_STA 0xA004
|
||
|
+#define AC200_INTOSC_CLK_PRESCAL 0xA008
|
||
|
+#define AC200_RTC_YY_MM_DD0 0xA010
|
||
|
+#define AC200_RTC_YY_MM_DD1 0xA012
|
||
|
+#define AC200_RTC_HH_MM_SS0 0xA014
|
||
|
+#define AC200_RTC_HH_MM_SS1 0xA016
|
||
|
+#define AC200_ALARM0_CUR_VLU0 0xA024
|
||
|
+#define AC200_ALARM0_CUR_VLU1 0xA026
|
||
|
+#define AC200_ALARM0_ENABLE 0xA028
|
||
|
+#define AC200_ALARM0_IRQ_EN 0xA02C
|
||
|
+#define AC200_ALARM0_IRQ_STA 0xA030
|
||
|
+#define AC200_ALARM1_WK_HH_MM_SS0 0xA040
|
||
|
+#define AC200_ALARM1_WK_HH_MM_SS1 0xA042
|
||
|
+#define AC200_ALARM1_ENABLE 0xA044
|
||
|
+#define AC200_ALARM1_IRQ_EN 0xA048
|
||
|
+#define AC200_ALARM1_IRQ_STA 0xA04C
|
||
|
+#define AC200_ALARM_CONFIG 0xA050
|
||
|
+#define AC200_LOSC_OUT_GATING 0xA060
|
||
|
+#define AC200_GP_DATA(x) (0xA100 + (x) * 2)
|
||
|
+#define AC200_RTC_DEB 0xA170
|
||
|
+#define AC200_GPL_HOLD_OUTPUT 0xA180
|
||
|
+#define AC200_VDD_RTC 0xA190
|
||
|
+#define AC200_IC_CHARA0 0xA1F0
|
||
|
+#define AC200_IC_CHARA1 0xA1F2
|
||
|
+
|
||
|
+struct ac200_dev {
|
||
|
+ struct regmap *regmap;
|
||
|
+ struct regmap_irq_chip_data *regmap_irqc;
|
||
|
+};
|
||
|
+
|
||
|
+#endif /* __LINUX_MFD_AC200_H */
|
||
|
--
|
||
|
2.20.1
|
||
|
|