44 lines
1.8 KiB
Diff
44 lines
1.8 KiB
Diff
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From 508ffa39e72d79c8587685131199e3ff0ffe95e3 Mon Sep 17 00:00:00 2001
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From: Ukhellfire <afaulkner420@gmail.com>
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Date: Thu, 24 Mar 2022 22:21:00 +0000
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Subject: [PATCH 147/153] mmc/host/sunxi-mmc: Fix H6 emmc
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We have the wrong MMC CAP voltage for the emmc on this board
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---
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drivers/mmc/host/sunxi-mmc.c | 5 ++++-
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1 file changed, 4 insertions(+), 1 deletion(-)
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diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
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index 306428e77..dfe2b95f5 100644
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--- a/drivers/mmc/host/sunxi-mmc.c
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+++ b/drivers/mmc/host/sunxi-mmc.c
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@@ -1233,6 +1233,7 @@ static const struct of_device_id sunxi_mmc_of_match[] = {
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{ .compatible = "allwinner,sun50i-a100-mmc", .data = &sun50i_a100_cfg },
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{ .compatible = "allwinner,sun50i-a100-emmc", .data = &sun50i_a100_emmc_cfg },
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{ .compatible = "allwinner,sun50i-h5-emmc", .data = &sun50i_h5_emmc_cfg },
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+ { .compatible = "allwinner,sun50i-h6-emmc", .data = &sun50i_a64_emmc_cfg },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, sunxi_mmc_of_match);
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@@ -1444,7 +1445,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
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MMC_CAP_SDIO_IRQ;
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/*
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- * Some H5 devices do not have signal traces precise enough to
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+ * Some H5 and H6 devices do not have signal traces precise enough to
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* use HS DDR mode for their eMMC chips.
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*
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* We still enable HS DDR modes for all the other controller
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@@ -1453,6 +1454,8 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
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if ((host->cfg->clk_delays || host->use_new_timings) &&
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!of_device_is_compatible(pdev->dev.of_node,
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"allwinner,sun50i-h5-emmc") &&
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+ !of_device_is_compatible(pdev->dev.of_node,
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+ "allwinner,sun50i-h6-emmc") &&
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!of_machine_is_compatible("allwinner,sun7i-a20") &&
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!of_machine_is_compatible("olimex,a64-olinuxino-2ge8g"))
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mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
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--
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2.35.3
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