65 lines
2.5 KiB
Diff
65 lines
2.5 KiB
Diff
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From 5a11d6ca74867d866a14bd6f6e987f47df1d2630 Mon Sep 17 00:00:00 2001
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From: The-going <48602507+The-going@users.noreply.github.com>
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Date: Fri, 28 Jan 2022 14:10:52 +0300
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Subject: [PATCH 030/153] drv:clk:sunxi-ng:ccu-sun50i-a64: revert ccu
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Pinebook-A64
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---
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drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 18 +++++++++---------
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1 file changed, 9 insertions(+), 9 deletions(-)
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diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
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index 9833ab1a1..9e5de9521 100644
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--- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
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+++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
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@@ -560,8 +560,8 @@ static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents,
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* is required to restore the rate of TCON0 when the rate of PLL-Video0
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* changed.
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*/
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-static const char * const tcon0_parents[] = { "pll-mipi", /* "pll-video0-2x" */ };
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-static const u8 tcon0_table[] = { 0, /* 2, */ };
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+static const char * const tcon0_parents[] = { "pll-mipi", "pll-video0-2x" };
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+static const u8 tcon0_table[] = { 0, 2, };
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static SUNXI_CCU_MUX_TABLE_WITH_GATE(tcon0_clk, "tcon0", tcon0_parents,
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tcon0_table, 0x118, 24, 3, BIT(31),
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CLK_SET_RATE_PARENT);
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@@ -968,9 +968,9 @@ static struct ccu_mux_nb sun50i_a64_cpu_nb = {
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.bypass_index = 1, /* index of 24 MHz oscillator */
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};
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-static struct ccu_rate_reset_nb sun50i_a64_pll_video0_reset_tcon0_nb = {
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+/*static struct ccu_rate_reset_nb sun50i_a64_pll_video0_reset_tcon0_nb = {
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.common = &pll_video0_clk.common,
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-};
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+};*/
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#define CCU_MIPI_DSI_CLK 0x168
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@@ -1004,9 +1004,9 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
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}
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/* Force the parent of TCON0 to PLL-MIPI */
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- val = readl(reg + SUN50I_A64_TCON0_REG);
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- val &= ~GENMASK(26, 24);
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- writel(val | (0 << 24), reg + SUN50I_A64_TCON0_REG);
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+// val = readl(reg + SUN50I_A64_TCON0_REG);
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+// val &= ~GENMASK(26, 24);
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+// writel(val | (0 << 24), reg + SUN50I_A64_TCON0_REG);
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ret = devm_sunxi_ccu_probe(&pdev->dev, reg, &sun50i_a64_ccu_desc);
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if (ret)
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@@ -1020,8 +1020,8 @@ static int sun50i_a64_ccu_probe(struct platform_device *pdev)
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&sun50i_a64_cpu_nb);
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/* Reset the rate of TCON0 clock when PLL-VIDEO0 is changed */
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- sun50i_a64_pll_video0_reset_tcon0_nb.target_clk = tcon0_clk.common.hw.clk;
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- ccu_rate_reset_notifier_register(&sun50i_a64_pll_video0_reset_tcon0_nb);
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+// sun50i_a64_pll_video0_reset_tcon0_nb.target_clk = tcon0_clk.common.hw.clk;
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+// ccu_rate_reset_notifier_register(&sun50i_a64_pll_video0_reset_tcon0_nb);
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return 0;
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}
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--
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2.35.3
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