build/patch/kernel/archive/meson64-5.10/hardkernel-0019-C4-arm64-dts-add-spicc0-node.patch

From 6ed323304dfb43ad2741f4e01a79299203c1d21d Mon Sep 17 00:00:00 2001
From: Hyeonki Hong <hhk7734@gmail.com>
Date: Tue, 14 Apr 2020 14:11:30 +0900
Subject: [PATCH 19/74] ODROID-C4: arm64/dts: add spicc0 node

Change-Id: I6ccc3714fce677b1eb104c10f657739320f3772f
(cherry picked from commit e50729e07786d6ee611e0bcfafbfd7b352c9e9ac)
---
 .../boot/dts/amlogic/meson-sm1-odroid-c4.dts  | 28 +++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
index 4dbdf049c87c..8d3523c163c5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
@@ -18,6 +18,7 @@ aliases {
 		ethernet0 = &ethmac;
 		serial0 = &uart_AO;
 		serial1 = &uart_A;
+		spi0 = &spicc0;
 	};
 
 	chosen {
@@ -466,6 +467,33 @@ &sd_emmc_c {
 	vqmmc-supply = <&flash_1v8>;
 };
 
+&spicc0 {
+	status = "okay";
+
+	/*
+	 * 40 Pin Header : MOSI(GPIOX.8->19 Pin),
+	 *		   MISO(GPIOX.9->21 Pin),
+	 *		   SPI0_CLK(GPIOX.11->23 Pin)
+	 *		   SPI_CS0(GPIOX.10->24 Pin)
+	 *		   SPI_CS1(GPIOH.6->26 Pin)
+	 */
+	pinctrl-names = "default","gpio_periphs";
+	pinctrl-0 = <&spicc0_x_pins>;
+	pinctrl-1 = <&spicc0_ss0_x_pins>;
+	num_chipselect = <1>;
+
+	cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>;
+
+	spidev@0 {
+		status = "okay";
+
+		compatible = "linux,spidev";
+		/* spi default max clock 100Mhz */
+		spi-max-frequency = <100000000>;
+		reg = <0>;
+	};
+};
+
 &tdmif_b {
 	status = "okay";
 };
-- 
2.25.1