1665 lines
36 KiB
Diff
1665 lines
36 KiB
Diff
|
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
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||
|
new file mode 100644
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index 0000000..04330d3
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|
--- /dev/null
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|
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
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@@ -0,0 +1,503 @@
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+/*
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+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/input/input.h>
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+#include "rk322x.dtsi"
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+
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||
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+/ {
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||
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+
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+ compatible = "rockchip,rk3229";
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+ model = "Rockchip RK3229 SoC";
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+
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+ memory@60000000 {
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+ device_type = "memory";
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+ reg = <0x60000000 0x40000000>;
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+ };
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+
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+
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+ chosen {
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+ bootargs = "earlycon=uart8250,mmio32,0x11030000";
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|
+ };
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+
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+ reserved-memory {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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|
+ ranges;
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+
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|
+ ramoops_mem: ramoops@62e00000 {
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||
|
+ reg = <0x62e00000 0xf0000>;
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|
+ };
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+
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|
+ trust_reserved: trust@68400000 {
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|
+ reg = <0x68400000 0x2000000>; // OP-TEE uses 32mb
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|
+ no-map;
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||
|
+ };
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|
+ };
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+
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+ ramoops {
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+ compatible = "ramoops";
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+ record-size = <0x0 0x20000>;
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+ console-size = <0x0 0x80000>;
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+ ftrace-size = <0x0 0x00000>;
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+ pmsg-size = <0x0 0x50000>;
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+ memory-region = <&ramoops_mem>;
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+ };
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+
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+ psci {
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+ compatible = "arm,psci-1.0";
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+ method = "smc";
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+ };
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+
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+ sound {
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+ status = "okay";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,name = "ROCKCHIP,RK3229";
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s1>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&codec>;
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+ };
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+ };
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+
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+ hdmi_sound: hdmi-sound {
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+ status = "okay";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,mclk-fs = <128>;
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+ simple-audio-card,name = "HDMI";
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s0>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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+ };
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+ };
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+
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+ regulators {
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+ compatible = "simple-bus";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ vccio_1v8_reg: regulator@0 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vccio_1v8";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ };
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+
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+ vccio_3v3_reg: regulator@1 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vccio_3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ };
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+ };
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+
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+ spdif_out: spdif-out {
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+ status = "okay";
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+ compatible = "linux,spdif-dit";
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+ #sound-dai-cells = <0>;
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+ };
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+
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+ spdif-sound {
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+ status = "okay";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,name = "ROCKCHIP,SPDIF";
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+ simple-audio-card,cpu {
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+ sound-dai = <&spdif>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&spdif_out>;
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+ };
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+ };
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+
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+ vcc_host: vcc-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&host_vbus_drv>;
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+ regulator-name = "vcc_host";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc_otg_vbus: otg-vbus-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&otg_vbus_drv>;
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+ regulator-name = "vcc_otg_vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ enable-active-high;
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+ };
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+
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+ vcc_phy: vcc-phy-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ regulator-name = "vcc_phy";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vdd_arm: vdd-arm-regulator {
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+ compatible = "pwm-regulator";
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+ rockchip,pwm_id = <1>;
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+ rockchip,pwm_voltage = <1100000>;
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+ pwms = <&pwm1 0 5000 1>;
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+ regulator-name = "vdd_arm";
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+ regulator-min-microvolt = <950000>;
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+ regulator-max-microvolt = <1400000>;
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+ regulator-ramp-delay = <12500>;
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+ regulator-settling-time-up-us = <250>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vdd_log: vdd-log-regulator {
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+ compatible = "pwm-regulator";
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+ rockchip,pwm_id = <2>;
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+ rockchip,pwm_voltage = <1200000>;
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+ pwms = <&pwm2 0 5000 1>;
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+ regulator-name = "vdd_log";
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <1300000>;
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+ regulator-ramp-delay = <12500>;
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+ regulator-settling-time-up-us = <250>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ ir_receiver: ir-receiver {
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+ compatible = "gpio-ir-receiver";
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+ gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
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+ linux,rc-map-name = "rc-rktvbox";
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+ pinctrl-0 = <&ir_int>;
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+ pinctrl-names = "default";
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+ };
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+
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+};
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+
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+&display_subsystem {
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+
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+ status = "okay";
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+
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+ route_hdmi: route-hdmi {
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+ status = "okay";
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+ connect = <&vop_out_hdmi>;
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+ };
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+
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+ route_tve: route-tve {
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+ status = "disabled";
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+ connect = <&vop_out_tve>;
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+ };
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+};
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+
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+&codec {
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+ #sound-dai-cells = <0>;
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ enable-method = "psci";
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+ cpu-supply = <&vdd_arm>;
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+};
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+
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+&cpu1 {
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+ enable-method = "psci";
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+};
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+
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+&cpu2 {
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+ enable-method = "psci";
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+};
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+
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+&cpu3 {
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+ enable-method = "psci";
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+};
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+
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+
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+&dmc {
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+ center-supply = <&vdd_log>;
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+};
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+
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+&gmac {
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+ assigned-clocks = <&cru SCLK_MAC_SRC>;
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+ assigned-clock-rates = <50000000>;
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+ clock_in_out = "output";
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+ phy-supply = <&vcc_phy>;
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+ phy-mode = "rmii";
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+ phy-is-integrated;
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+ status = "okay";
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+};
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+
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+&gpu {
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+ status = "okay";
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+ mali-supply = <&vdd_log>;
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||
|
+};
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+
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+
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+
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+&hdmi {
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||
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+ status = "okay";
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||
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+ #sound-dai-cells = <0>;
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+ ddc-i2c-scl-high-time-ns = <9625>;
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+ ddc-i2c-scl-low-time-ns = <10000>;
|
||
|
+};
|
||
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+
|
||
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+&hdmi_phy {
|
||
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+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&io_domains {
|
||
|
+ status = "okay";
|
||
|
+ vccio1-supply = <&vccio_3v3_reg>;
|
||
|
+ vccio2-supply = <&vccio_1v8_reg>;
|
||
|
+ vccio4-supply = <&vccio_3v3_reg>;
|
||
|
+};
|
||
|
+
|
||
|
+&emmc {
|
||
|
+ broken-cd;
|
||
|
+ bus-width = <8>;
|
||
|
+ cap-mmc-highspeed;
|
||
|
+ mmc-hs200-1_8v;
|
||
|
+ supports-emmc;
|
||
|
+ disable-wp;
|
||
|
+ non-removable;
|
||
|
+ num-slots = <1>;
|
||
|
+ /delete-property/ default-sample-phase;
|
||
|
+ /delete-property/ pinctrl-names;
|
||
|
+ /delete-property/ pinctrl-0;
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ bus-width = <4>;
|
||
|
+ cap-sd-highspeed;
|
||
|
+ card-detect-delay = <200>;
|
||
|
+ disable-wp;
|
||
|
+ max-frequency = <50000000>;
|
||
|
+ num-slots = <1>;
|
||
|
+ supports-sd;
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&sdmmc_pwr &sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ bus-width = <4>;
|
||
|
+ cap-mmc-highspeed;
|
||
|
+ cap-sd-highspeed;
|
||
|
+ cap-sdio-irq;
|
||
|
+ non-removable;
|
||
|
+ ignore-pm-notify;
|
||
|
+ keep-power-in-suspend;
|
||
|
+ max-frequency = <150000000>;
|
||
|
+ supports-sdio;
|
||
|
+};
|
||
|
+
|
||
|
+&i2s0 {
|
||
|
+ status = "okay";
|
||
|
+ rockchip,bclk-fs = <128>;
|
||
|
+ #sound-dai-cells = <0>;
|
||
|
+};
|
||
|
+
|
||
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+&i2s1 {
|
||
|
+ #sound-dai-cells = <0>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&iep {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&iep_mmu {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&pinctrl {
|
||
|
+ keys {
|
||
|
+ pwr_key: pwr-key {
|
||
|
+ rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdmmc {
|
||
|
+ sdmmc_pwr: sdmmc-pwr {
|
||
|
+ rockchip,pins = <1 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio-pwrseq {
|
||
|
+ wifi_enable_h: wifi-enable-h {
|
||
|
+ rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ usb {
|
||
|
+ host_vbus_drv: host-vbus-drv {
|
||
|
+ rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+
|
||
|
+ otg_vbus_drv: otg-vbus-drv {
|
||
|
+ rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ ir {
|
||
|
+ ir_int: ir-int {
|
||
|
+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&pwm1 {
|
||
|
+ status = "okay";
|
||
|
+ pinctrl-names = "active";
|
||
|
+ pinctrl-0 = <&pwm1_pin_pull_down>;
|
||
|
+};
|
||
|
+
|
||
|
+&pwm2 {
|
||
|
+ status = "okay";
|
||
|
+ pinctrl-names = "active";
|
||
|
+ pinctrl-0 = <&pwm2_pin_pull_up>;
|
||
|
+};
|
||
|
+
|
||
|
+&rockchip_suspend {
|
||
|
+ status = "okay";
|
||
|
+ rockchip,virtual-poweroff = <1>;
|
||
|
+ rockchip,sleep-mode-config = <
|
||
|
+ (0
|
||
|
+ |RKPM_CTR_GTCLKS
|
||
|
+ |RKPM_CTR_IDLESRAM_MD
|
||
|
+ |RKPM_CTR_PMIC
|
||
|
+ )
|
||
|
+ >;
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&tsadc {
|
||
|
+ rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
|
||
|
+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&spdif {
|
||
|
+ status = "okay";
|
||
|
+ #sound-dai-cells = <0>;
|
||
|
+};
|
||
|
+
|
||
|
+&threshold {
|
||
|
+ temperature = <90000>; /* millicelsius */
|
||
|
+};
|
||
|
+
|
||
|
+&target {
|
||
|
+ temperature = <105000>; /* millicelsius */
|
||
|
+};
|
||
|
+
|
||
|
+&soc_crit {
|
||
|
+ temperature = <115000>; /* millicelsius */
|
||
|
+};
|
||
|
+
|
||
|
+&uart2 {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&u2phy0 {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ u2phy0_otg: otg-port {
|
||
|
+ vbus-supply = <&vcc_otg_vbus>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ u2phy0_host: host-port {
|
||
|
+ phy-supply = <&vcc_host>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&u2phy1 {
|
||
|
+ status = "okay";
|
||
|
+
|
||
|
+ u2phy1_otg: otg-port {
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ u2phy1_host: host-port {
|
||
|
+ phy-supply = <&vcc_host>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&rkvdec {
|
||
|
+ vcodec-supply = <&vdd_log>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&rkvdec_mmu {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&rk_rga {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host0_ehci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host0_ohci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host1_ehci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host1_ohci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host2_ehci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&usb_host2_ohci {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&vop {
|
||
|
+ assigned-clocks = <&cru DCLK_VOP>;
|
||
|
+ assigned-clock-parents = <&cru HDMIPHY>;
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&vop_mmu {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&vpu_service {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&vpu_mmu {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3228a-box.dtsi b/arch/arm/boot/dts/rk3228a-box.dtsi
|
||
|
new file mode 100644
|
||
|
index 0000000..103c324
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3228a-box.dtsi
|
||
|
@@ -0,0 +1,47 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk322x-box.dtsi"
|
||
|
+#include "rk3228a-cpu-opp.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ compatible = "rockchip,rk3228a-box", "rockchip,rk3229";
|
||
|
+
|
||
|
+ /delete-node/ opp-table2;
|
||
|
+
|
||
|
+ gpu_opp_table: opp-table2 {
|
||
|
+ compatible = "operating-points-v2";
|
||
|
+ rockchip,leakage-voltage-sel = <
|
||
|
+ 1 5 0
|
||
|
+ 6 254 1
|
||
|
+ >;
|
||
|
+ nvmem-cells = <&logic_leakage>;
|
||
|
+ nvmem-cell-names = "gpu_leakage";
|
||
|
+
|
||
|
+ opp-200000000 {
|
||
|
+ opp-hz = /bits/ 64 <200000000>;
|
||
|
+ opp-microvolt = <1050000>;
|
||
|
+ opp-microvolt-L0 = <1050000>;
|
||
|
+ opp-microvolt-L1 = <1000000>;
|
||
|
+ };
|
||
|
+ opp-300000000 {
|
||
|
+ opp-hz = /bits/ 64 <300000000>;
|
||
|
+ opp-microvolt = <1050000>;
|
||
|
+ opp-microvolt-L0 = <1050000>;
|
||
|
+ opp-microvolt-L1 = <1000000>;
|
||
|
+ };
|
||
|
+ opp-400000000 {
|
||
|
+ opp-hz = /bits/ 64 <400000000>;
|
||
|
+ opp-microvolt = <1150000>;
|
||
|
+ opp-microvolt-L0 = <1150000>;
|
||
|
+ opp-microvolt-L1 = <1100000>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3228b-box.dtsi b/arch/arm/boot/dts/rk3228b-box.dtsi
|
||
|
new file mode 100644
|
||
|
index 0000000..1aa448e
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3228b-box.dtsi
|
||
|
@@ -0,0 +1,16 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk322x-box.dtsi"
|
||
|
+#include "rk3229-cpu-opp.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ compatible = "rockchip,rk3228b-box", "rockchip,rk3229";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3229-box.dtsi b/arch/arm/boot/dts/rk3229-box.dtsi
|
||
|
new file mode 100644
|
||
|
index 0000000..8a4b25e
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3229-box.dtsi
|
||
|
@@ -0,0 +1,16 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk322x-box.dtsi"
|
||
|
+#include "rk3229-cpu-opp.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ compatible = "rockchip,rk3229-box", "rockchip,rk3229";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3228a-box-h96mini.dts b/arch/arm/boot/dts/rk3228a-box-h96mini.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..d191686
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3228a-box-h96mini.dts
|
||
|
@@ -0,0 +1,151 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3228a-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3228a H96 mini";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_green {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "on";
|
||
|
+ };
|
||
|
+
|
||
|
+ led_red {
|
||
|
+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "off";
|
||
|
+ linux,default-trigger = "rc-feedback";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ wifi_chip_type = "ap6330";
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-bluetooth {
|
||
|
+ compatible = "bluetooth-platdata";
|
||
|
+ uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
||
|
+ pinctrl-names = "default", "rts_gpio";
|
||
|
+ pinctrl-0 = <&uart11_rts>;
|
||
|
+ pinctrl-1 = <&uart11_rts_gpio>;
|
||
|
+ BT,power_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
||
|
+ BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>;
|
||
|
+ BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio_keys {
|
||
|
+ compatible = "gpio-keys";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <0>;
|
||
|
+ autorepeat;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&pwr_key>;
|
||
|
+
|
||
|
+ power_key: power-key {
|
||
|
+ label = "GPIO Key Power";
|
||
|
+ gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>;
|
||
|
+ linux,code = <KEY_POWER>;
|
||
|
+ debounce-interval = <100>;
|
||
|
+ wakeup-source;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&dram_timing {
|
||
|
+ sr_idle = <0x18>;
|
||
|
+ pd_idle = <0x20>;
|
||
|
+ ddr3_drv = <DDR3_DS_40ohm>;
|
||
|
+ ddr3_odt = <DDR3_ODT_120ohm>;
|
||
|
+ phy_ddr3_clk_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_cmd_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_dqs_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_odt = <PHY_DDR3_RON_RTT_225ohm>;
|
||
|
+};
|
||
|
+
|
||
|
+&dmc {
|
||
|
+ system-status-freq = <
|
||
|
+ /*system status freq(KHz)*/
|
||
|
+ SYS_STATUS_NORMAL 600000
|
||
|
+ SYS_STATUS_VIDEO_4K 700000
|
||
|
+ SYS_STATUS_VIDEO_4K_10B 800000
|
||
|
+ >;
|
||
|
+
|
||
|
+ dram_freq = <300000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&dmc_opp_table {
|
||
|
+
|
||
|
+ /delete-node/ opp-400000000;
|
||
|
+
|
||
|
+ /delete-node/ opp-666000000;
|
||
|
+
|
||
|
+ opp-700000000 {
|
||
|
+ opp-microvolt = <1100000>;
|
||
|
+ opp-microvolt-L0 = <1100000>;
|
||
|
+ opp-microvolt-L1 = <1050000>;
|
||
|
+ };
|
||
|
+
|
||
|
+ /delete-node/ opp-786000000;
|
||
|
+
|
||
|
+};
|
||
|
+
|
||
|
+&emmc {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&gmac {
|
||
|
+ tx_delay = <0x26>;
|
||
|
+ rx_delay = <0x11>;
|
||
|
+};
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&ir_receiver {
|
||
|
+ linux,rc-map-name = "rc-trn9";
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&uart1 {
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&uart1_xfer &uart11_cts>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3229-box-a95xr1.dts b/arch/arm/boot/dts/rk3229-box-a95xr1.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..4c9daf3
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3229-box-a95xr1.dts
|
||
|
@@ -0,0 +1,120 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3229-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3229 Box A95X-R1";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_blue {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "on";
|
||
|
+ };
|
||
|
+
|
||
|
+ led_red {
|
||
|
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "off";
|
||
|
+ linux,default-trigger = "rc-feedback";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ wifi_chip_type = "ssv6051";
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio_keys {
|
||
|
+ compatible = "gpio-keys";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <0>;
|
||
|
+ autorepeat;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&pwr_key>;
|
||
|
+
|
||
|
+ power_key: power-key {
|
||
|
+ label = "GPIO Key Power";
|
||
|
+ gpios = <&gpio0 35 GPIO_ACTIVE_HIGH>;
|
||
|
+ linux,code = <KEY_POWER>;
|
||
|
+ debounce-interval = <100>;
|
||
|
+ wakeup-source;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&dram_timing {
|
||
|
+ sr_idle = <0x0>;
|
||
|
+ pd_idle = <0x0>;
|
||
|
+ ddr3_drv = <DDR3_DS_34ohm>;
|
||
|
+ ddr3_odt = <DDR3_ODT_40ohm>;
|
||
|
+ phy_ddr3_clk_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_cmd_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_dqs_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_odt = <PHY_DDR3_RON_RTT_225ohm>;
|
||
|
+};
|
||
|
+
|
||
|
+&dmc {
|
||
|
+ system-status-freq = <
|
||
|
+ /*system status freq(KHz)*/
|
||
|
+ SYS_STATUS_NORMAL 786000
|
||
|
+ SYS_STATUS_VIDEO_4K 786000
|
||
|
+ SYS_STATUS_VIDEO_4K_10B 800000
|
||
|
+ >;
|
||
|
+
|
||
|
+ dram_freq = <786000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&emmc {
|
||
|
+ clock-frequency = <100000000>;
|
||
|
+ max-frequency = <100000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&gmac {
|
||
|
+ tx_delay = <0x26>;
|
||
|
+ rx_delay = <0x11>;
|
||
|
+};
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&ir_receiver {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3229-box-ntn8.dts b/arch/arm/boot/dts/rk3229-box-ntn8.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..5ca6a9d
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3229-box-ntn8.dts
|
||
|
@@ -0,0 +1,132 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3229-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3229 HPH NT-N8";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_green {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "on";
|
||
|
+ };
|
||
|
+
|
||
|
+ led_red {
|
||
|
+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "off";
|
||
|
+ linux,default-trigger = "rc-feedback";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ wifi_chip_type = "ap6212";
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-bluetooth {
|
||
|
+ compatible = "bluetooth-platdata";
|
||
|
+ uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
||
|
+ pinctrl-names = "default", "rts_gpio";
|
||
|
+ pinctrl-0 = <&uart11_rts>;
|
||
|
+ pinctrl-1 = <&uart11_rts_gpio>;
|
||
|
+ BT,power_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
||
|
+ BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio_keys {
|
||
|
+ compatible = "gpio-keys";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <0>;
|
||
|
+ autorepeat;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&pwr_key>;
|
||
|
+
|
||
|
+ power_key: power-key {
|
||
|
+ label = "GPIO Key Power";
|
||
|
+ gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>;
|
||
|
+ linux,code = <KEY_POWER>;
|
||
|
+ debounce-interval = <100>;
|
||
|
+ wakeup-source;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&dram_timing {
|
||
|
+ sr_idle = <0xc>;
|
||
|
+ pd_idle = <0x20>;
|
||
|
+ ddr3_drv = <DDR3_DS_40ohm>;
|
||
|
+ ddr3_odt = <DDR3_ODT_120ohm>;
|
||
|
+ phy_ddr3_clk_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_cmd_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_dqs_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_odt = <PHY_DDR3_RON_RTT_225ohm>;
|
||
|
+};
|
||
|
+
|
||
|
+&dmc {
|
||
|
+ system-status-freq = <
|
||
|
+ /*system status freq(KHz)*/
|
||
|
+ SYS_STATUS_NORMAL 786000
|
||
|
+ SYS_STATUS_VIDEO_4K 786000
|
||
|
+ SYS_STATUS_VIDEO_4K_10B 800000
|
||
|
+ >;
|
||
|
+
|
||
|
+ dram_freq = <786000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&emmc {
|
||
|
+ clock-frequency = <125000000>;
|
||
|
+ max-frequency = <125000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&gmac {
|
||
|
+ tx_delay = <0x26>;
|
||
|
+ rx_delay = <0x11>;
|
||
|
+};
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&ir_receiver {
|
||
|
+ linux,rc-map-name = "rc-trn9";
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3229-box-v884k.dts b/arch/arm/boot/dts/rk3229-box-v884k.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..d306c7a
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3229-box-v884k.dts
|
||
|
@@ -0,0 +1,109 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3229-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3229 V88 4K";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_blue {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "on";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio_keys {
|
||
|
+ compatible = "gpio-keys";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <0>;
|
||
|
+ autorepeat;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&pwr_key>;
|
||
|
+
|
||
|
+ power_key: power-key {
|
||
|
+ label = "GPIO Key Power";
|
||
|
+ gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>;
|
||
|
+ linux,code = <KEY_POWER>;
|
||
|
+ debounce-interval = <100>;
|
||
|
+ wakeup-source;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&dram_timing {
|
||
|
+ dram_spd_bin = <0x15>;
|
||
|
+ sr_idle = <0xc>;
|
||
|
+ pd_idle = <0x20>;
|
||
|
+ ddr3_drv = <DDR3_DS_40ohm>;
|
||
|
+ ddr3_odt = <DDR3_ODT_120ohm>;
|
||
|
+ phy_ddr3_clk_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_cmd_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_dqs_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_odt = <PHY_DDR3_RON_RTT_225ohm>;
|
||
|
+};
|
||
|
+
|
||
|
+&dmc {
|
||
|
+ system-status-freq = <
|
||
|
+ /*system status freq(KHz)*/
|
||
|
+ SYS_STATUS_NORMAL 786000
|
||
|
+ SYS_STATUS_VIDEO_4K 786000
|
||
|
+ SYS_STATUS_VIDEO_4K_10B 800000
|
||
|
+ >;
|
||
|
+
|
||
|
+ dram_freq = <786000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&nandc {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&ir_receiver {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3229-box-v88mars.dts b/arch/arm/boot/dts/rk3229-box-v88mars.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..4964f21
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3229-box-v88mars.dts
|
||
|
@@ -0,0 +1,92 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3229-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3229 V88 Mars";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_blue {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "on";
|
||
|
+ };
|
||
|
+
|
||
|
+ led_red {
|
||
|
+ gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "off";
|
||
|
+ linux,default-trigger = "rc-feedback";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio_keys {
|
||
|
+ compatible = "gpio-keys";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <0>;
|
||
|
+ autorepeat;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&pwr_key>;
|
||
|
+
|
||
|
+ power_key: power-key {
|
||
|
+ label = "GPIO Key Power";
|
||
|
+ gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>;
|
||
|
+ linux,code = <KEY_POWER>;
|
||
|
+ debounce-interval = <100>;
|
||
|
+ wakeup-source;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&nandc {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ clock-frequency = <50000000>;
|
||
|
+ max-frequency = <50000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&ir_receiver {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3229-box-hk1mini.dts b/arch/arm/boot/dts/rk3229-box-hk1mini.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..9616f11
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3229-box-hk1mini.dts
|
||
|
@@ -0,0 +1,115 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3229-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3229 HK1mini";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_red {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "off";
|
||
|
+ linux,default-trigger = "rc-feedback";
|
||
|
+ };
|
||
|
+
|
||
|
+ led_blue {
|
||
|
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "on";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ wifi_chip_type = "ssv6051";
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio_keys {
|
||
|
+ compatible = "gpio-keys";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <0>;
|
||
|
+ autorepeat;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&pwr_key>;
|
||
|
+
|
||
|
+ power_key: power-key {
|
||
|
+ label = "GPIO Key Power";
|
||
|
+ gpios = <&gpio0 35 GPIO_ACTIVE_HIGH>;
|
||
|
+ linux,code = <KEY_POWER>;
|
||
|
+ debounce-interval = <100>;
|
||
|
+ wakeup-source;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&dram_timing {
|
||
|
+ sr_idle = <0x18>;
|
||
|
+ pd_idle = <0x20>;
|
||
|
+ ddr3_drv = <DDR3_DS_40ohm>;
|
||
|
+ ddr3_odt = <DDR3_ODT_120ohm>;
|
||
|
+ phy_ddr3_clk_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_cmd_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_dqs_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_odt = <PHY_DDR3_RON_RTT_225ohm>;
|
||
|
+};
|
||
|
+
|
||
|
+&dmc {
|
||
|
+
|
||
|
+ system-status-freq = <
|
||
|
+ /*system status freq(KHz)*/
|
||
|
+ SYS_STATUS_NORMAL 786000
|
||
|
+ SYS_STATUS_VIDEO_4K 700000
|
||
|
+ SYS_STATUS_VIDEO_4K_10B 786000
|
||
|
+ >;
|
||
|
+
|
||
|
+ dram_freq = <786000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&nandc {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ clock-frequency = <50000000>;
|
||
|
+ max-frequency = <50000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&ir_receiver {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3229-box-d88.dts b/arch/arm/boot/dts/rk3229-box-d88.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..b5845c5
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3229-box-d88.dts
|
||
|
@@ -0,0 +1,119 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3229-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3229 D88 HDMI Stick";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_red {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "off";
|
||
|
+ };
|
||
|
+
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ wireless-bluetooth {
|
||
|
+ compatible = "bluetooth-platdata";
|
||
|
+ uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
||
|
+ pinctrl-names = "default", "rts_gpio";
|
||
|
+ pinctrl-0 = <&uart11_rts>;
|
||
|
+ pinctrl-1 = <&uart11_rts_gpio>;
|
||
|
+ BT,power_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>;
|
||
|
+ BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+ gpio_keys {
|
||
|
+ compatible = "gpio-keys";
|
||
|
+ #address-cells = <1>;
|
||
|
+ #size-cells = <0>;
|
||
|
+ autorepeat;
|
||
|
+
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&pwr_key>;
|
||
|
+
|
||
|
+ power_key: power-key {
|
||
|
+ label = "GPIO Key Power";
|
||
|
+ gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>;
|
||
|
+ linux,code = <KEY_POWER>;
|
||
|
+ debounce-interval = <100>;
|
||
|
+ wakeup-source;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&gmac {
|
||
|
+ status = "disabled";
|
||
|
+};
|
||
|
+
|
||
|
+&dram_timing {
|
||
|
+ sr_idle = <0x18>;
|
||
|
+ pd_idle = <0x20>;
|
||
|
+ ddr3_drv = <DDR3_DS_40ohm>;
|
||
|
+ ddr3_odt = <DDR3_ODT_120ohm>;
|
||
|
+ phy_ddr3_clk_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_cmd_drv = <PHY_DDR3_RON_RTT_45ohm>;
|
||
|
+ phy_ddr3_dqs_drv = <PHY_DDR3_RON_RTT_34ohm>;
|
||
|
+ phy_ddr3_odt = <PHY_DDR3_RON_RTT_225ohm>;
|
||
|
+};
|
||
|
+
|
||
|
+&dmc {
|
||
|
+ system-status-freq = <
|
||
|
+ /*system status freq(KHz)*/
|
||
|
+ SYS_STATUS_NORMAL 600000
|
||
|
+ SYS_STATUS_VIDEO_4K 786000
|
||
|
+ SYS_STATUS_VIDEO_4K_10B 800000
|
||
|
+ >;
|
||
|
+
|
||
|
+ dram_freq = <786000000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&nandc {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3228a-cpu-opp.dtsi b/arch/arm/boot/dts/rk3228a-cpu-opp.dtsi
|
||
|
new file mode 100644
|
||
|
index 0000000..98b01e5
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3228a-cpu-opp.dtsi
|
||
|
@@ -0,0 +1,92 @@
|
||
|
+/*
|
||
|
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
|
||
|
+ *
|
||
|
+ * This file is dual-licensed: you can use it either under the terms
|
||
|
+ * of the GPL or the X11 license, at your option. Note that this dual
|
||
|
+ * licensing only applies to this file, and not this project as a
|
||
|
+ * whole.
|
||
|
+ *
|
||
|
+ * a) This library is free software; you can redistribute it and/or
|
||
|
+ * modify it under the terms of the GNU General Public License as
|
||
|
+ * published by the Free Software Foundation; either version 2 of the
|
||
|
+ * License, or (at your option) any later version.
|
||
|
+ *
|
||
|
+ * This library is distributed in the hope that it will be useful,
|
||
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||
|
+ * GNU General Public License for more details.
|
||
|
+ *
|
||
|
+ * Or, alternatively,
|
||
|
+ *
|
||
|
+ * b) Permission is hereby granted, free of charge, to any person
|
||
|
+ * obtaining a copy of this software and associated documentation
|
||
|
+ * files (the "Software"), to deal in the Software without
|
||
|
+ * restriction, including without limitation the rights to use,
|
||
|
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
||
|
+ * sell copies of the Software, and to permit persons to whom the
|
||
|
+ * Software is furnished to do so, subject to the following
|
||
|
+ * conditions:
|
||
|
+ *
|
||
|
+ * The above copyright notice and this permission notice shall be
|
||
|
+ * included in all copies or substantial portions of the Software.
|
||
|
+ *
|
||
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||
|
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||
|
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||
|
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||
|
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||
|
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||
|
+ * OTHER DEALINGS IN THE SOFTWARE.
|
||
|
+ */
|
||
|
+
|
||
|
+/ {
|
||
|
+ /delete-node/ opp-table0;
|
||
|
+
|
||
|
+ cpu0_opp_table: opp_table0 {
|
||
|
+ compatible = "operating-points-v2";
|
||
|
+ opp-shared;
|
||
|
+
|
||
|
+ clocks = <&cru PLL_APLL>;
|
||
|
+ rockchip,max-volt = <1350000>;
|
||
|
+ rockchip,leakage-voltage-sel = <
|
||
|
+ 1 8 0
|
||
|
+ 9 254 1
|
||
|
+ >;
|
||
|
+ nvmem-cells = <&cpu_leakage>;
|
||
|
+ nvmem-cell-names = "cpu_leakage";
|
||
|
+
|
||
|
+ opp-408000000 {
|
||
|
+ opp-hz = /bits/ 64 <408000000>;
|
||
|
+ opp-microvolt = <950000 950000 1400000>;
|
||
|
+ opp-microvolt-L0 = <950000 950000 1400000>;
|
||
|
+ opp-microvolt-L1 = <950000 950000 1400000>;
|
||
|
+ clock-latency-ns = <40000>;
|
||
|
+ opp-suspend;
|
||
|
+ };
|
||
|
+ opp-600000000 {
|
||
|
+ opp-hz = /bits/ 64 <600000000>;
|
||
|
+ opp-microvolt = <975000 975000 1400000>;
|
||
|
+ opp-microvolt-L0 = <975000 975000 1400000>;
|
||
|
+ opp-microvolt-L1 = <975000 975000 1400000>;
|
||
|
+ };
|
||
|
+ opp-816000000 {
|
||
|
+ opp-hz = /bits/ 64 <816000000>;
|
||
|
+ opp-microvolt = <1000000 1000000 1400000>;
|
||
|
+ opp-microvolt-L0 = <1000000 1000000 1400000>;
|
||
|
+ opp-microvolt-L1 = <1000000 1000000 1400000>;
|
||
|
+ };
|
||
|
+ opp-1008000000 {
|
||
|
+ opp-hz = /bits/ 64 <1008000000>;
|
||
|
+ opp-microvolt = <1175000 1175000 1400000>;
|
||
|
+ opp-microvolt-L0 = <1175000 1175000 1400000>;
|
||
|
+ opp-microvolt-L1 = <1125000 1125000 1400000>;
|
||
|
+ };
|
||
|
+ opp-1200000000 {
|
||
|
+ opp-hz = /bits/ 64 <1200000000>;
|
||
|
+ opp-microvolt = <1275000 1275000 1400000>;
|
||
|
+ opp-microvolt-L0 = <1275000 1275000 1400000>;
|
||
|
+ opp-microvolt-L1 = <1225000 1225000 1400000>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+};
|
||
|
diff --git a/arch/arm/boot/dts/rk3228b-box-v88mars-II.dts b/arch/arm/boot/dts/rk3228b-box-v88mars-II.dts
|
||
|
new file mode 100644
|
||
|
index 0000000..a0d29bd
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm/boot/dts/rk3228b-box-v88mars-II.dts
|
||
|
@@ -0,0 +1,74 @@
|
||
|
+/*
|
||
|
+ * Copyright (C) 2020 knaerzche <knaerzche@gmail.com>
|
||
|
+ *
|
||
|
+ * This program is free software; you can redistribute it and/or modify
|
||
|
+ * it under the terms of the GNU General Public License version 2 as
|
||
|
+ * published by the Free Software Foundation.
|
||
|
+ */
|
||
|
+
|
||
|
+/dts-v1/;
|
||
|
+
|
||
|
+#include "rk3228b-box.dtsi"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "RK3228b V88 Mars II";
|
||
|
+
|
||
|
+ leds {
|
||
|
+ compatible = "gpio-leds";
|
||
|
+
|
||
|
+ led_blue {
|
||
|
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "on";
|
||
|
+ };
|
||
|
+
|
||
|
+ led_red {
|
||
|
+ gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||
|
+ default-state = "off";
|
||
|
+ linux,default-trigger = "rc-feedback";
|
||
|
+ };
|
||
|
+ };
|
||
|
+
|
||
|
+
|
||
|
+ wireless-wlan {
|
||
|
+ compatible = "wlan-platdata";
|
||
|
+ rockchip,grf = <&grf>;
|
||
|
+ sdio_vref = <3300>;
|
||
|
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||
|
+ status = "okay";
|
||
|
+ };
|
||
|
+
|
||
|
+
|
||
|
+ sdio_pwrseq: sdio-pwrseq {
|
||
|
+ compatible = "mmc-pwrseq-simple";
|
||
|
+ pinctrl-names = "default";
|
||
|
+ pinctrl-0 = <&wifi_enable_h>;
|
||
|
+ reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&nandc {
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdmmc {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+&sdio {
|
||
|
+ clock-frequency = <37500000>;
|
||
|
+ max-frequency = <37500000>;
|
||
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||
|
+ status = "okay";
|
||
|
+};
|
||
|
+
|
||
|
+
|
||
|
+&usb_otg {
|
||
|
+ dr_mode = "host";
|
||
|
+};
|
||
|
+
|
||
|
+&ir_receiver {
|
||
|
+ status = "okay";
|
||
|
+};
|