build/patch/kernel/archive/rk322x-5.10/board-rk322x-box.patch

diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..556539618
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,466 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk322x-box.dtsi"
+
+/ {
+
+	model = "Generic RK322x Tv Box board";
+
+	/delete-node/ leds;
+
+	/*
+		No need to reserve memory manually as long as u-boot v2020.10 and
+		OPTEE autoconfigure the reserved zones
+	*/
+	/delete-node/ reserved-memory;
+
+	/*
+	 * 	Include the mmc devices into aliases table
+	 */
+	aliases {
+		mmc0 = &sdmmc;
+		mmc1 = &sdio;
+		mmc2 = &emmc;
+	};
+
+	gpio_leds: gpio-leds {
+
+		compatible = "gpio-leds";
+
+		/*
+		* Working led, available on all boards
+		*/
+		working {
+			gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+			label = "working";
+			default-state = "on";
+			linux,default-trigger = "timer";
+			pinctrl-names = "default";
+			pinctrl-0 = <&gpio_led_working>;
+		};
+
+	};
+
+	// Remove the gpio-keys node from included dtsi
+	/delete-node/gpio_keys;
+
+	gpio_keys: gpio-keys {
+
+		compatible = "gpio-keys";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+	};
+
+	spdif_out: spdif-out {
+		status = "okay";
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+	};
+
+	spdif-sound {
+		status = "okay";
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "SPDIF";
+		simple-audio-card,cpu {
+			sound-dai = <&spdif>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&spdif_out>;
+		};
+	};
+
+	vcc_sys: vcc-sys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc_host: vcc-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&host_vbus_drv>;
+		regulator-name = "vcc_host";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vccio_1v8: vccio-1v8-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vccio_1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vccio_3v3: vccio-3v3-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vccio_3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc_otg: vcc-otg-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&otg_vbus_drv>;
+		regulator-name = "vcc_otg_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		regulator-name = "vcc_phy";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vccio_1v8>;
+	};
+
+	vdd_arm: vdd-arm-regulator {
+		compatible = "pwm-regulator";
+		pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
+		pwm-supply = <&vcc_sys>;
+		regulator-name = "vdd_arm";
+		regulator-min-microvolt = <950000>;
+		regulator-max-microvolt = <1400000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vdd_log: vdd-log-regulator {
+		compatible = "pwm-regulator";
+		pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
+		pwm-supply = <&vcc_sys>;
+		regulator-name = "vdd_log";
+		regulator-min-microvolt = <1000000>;
+		regulator-max-microvolt = <1300000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		/*
+		 * The 408 Mhz node causes system instabilities on some systems.
+		 * Remove it also because it is too slow.
+		 */
+		/delete-node/opp-408000000;
+
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <975000>;
+			clock-latency-ns = <40000>;
+			opp-suspend;
+		};
+
+		opp-816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <1000000>;
+		};
+
+		opp-1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <1175000>;
+		};
+
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1275000>;
+		};
+
+	};
+
+};
+
+&emmc {
+	status = "okay";
+	/delete-property/ mmc-ddr-1_8v;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+	/delete-property/ rockchip,default-sample-phase;
+};
+
+&nfc {
+
+	status = "disabled";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+
+	nand@0 {
+		reg = <0>;
+		label = "rk-nand";
+		nand-bus-width = <8>;
+		nand-ecc-mode = "hw";
+		nand-ecc-step-size = <1024>;
+		nand-ecc-strength = <60>;
+		nand-is-boot-medium;
+		rockchip,boot-blks = <8>;
+		rockchip,boot-ecc-strength = <60>;
+	};
+
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&dmc {
+	logic-supply = <&vdd_log>;
+};
+
+&io_domains {
+	vccio1-supply = <&vccio_3v3>;
+	vccio2-supply = <&vccio_1v8>;
+	vccio4-supply = <&vccio_3v3>;
+	status = "okay";
+};
+
+&gmac {
+	phy-supply = <&vcc_phy>;
+	tx_delay = <0x26>;
+	rx_delay = <0x11>;
+};
+
+&gpu {
+	mali-supply = <&vdd_log>;
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&u2phy0 {
+	u2phy0_host: host-port {
+		phy-supply = <&vcc_host>;
+	};
+
+	u2phy0_otg: otg-port {
+		phy-supply = <&vcc_otg>;
+	};
+};
+
+&u2phy1 {
+	u2phy1_host: host-port {
+		phy-supply = <&vcc_host>;
+	};
+
+	u2phy1_otg: otg-port {
+		phy-supply = <&vcc_otg>;
+	};
+};
+
+&ir_receiver {
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "host";
+};
+
+&sdio {
+	mmc-pwrseq = <&sdio_pwrseq>;
+	status = "okay";
+};
+
+&sdmmc {
+	cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
+	cd-debounce-delay-ms = <500>;
+	status = "okay";
+};
+
+&spdif {
+	status = "okay";
+};
+
+/** Integration to pin controller */
+&pinctrl {
+
+	pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+		drive-strength = <12>;
+		bias-pull-up;
+	};
+
+	pcfg_pull_down_12ma: pcfg-pull-down-12ma {
+		drive-strength = <12>;
+		bias-pull-down;
+	};
+
+	pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+		drive-strength = <12>;
+		bias-disable;
+	};
+
+	pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+		drive-strength = <8>;
+		bias-pull-up;
+	};
+
+	pcfg_pull_down_8ma: pcfg-pull-down-8ma {
+		drive-strength = <8>;
+		bias-pull-down;
+	};
+
+	pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	pcfg_pull_down_2ma: pcfg-pull-down-2ma {
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	/*
+	* Some rk322x electrical schemes report this kind of pull-up/down
+	* pin configurations. We set them here, but we don't use it in this
+	* device tree. These instead are useful for overlays, because they seem
+	* to increase stability on at least one board I got here
+	*/
+	sdmmc {
+		sdmmc_clk: sdmmc-clk {
+			rockchip,pins = <1 16 1 &pcfg_pull_down>;
+		};
+
+		sdmmc_cmd: sdmmc-cmd {
+			rockchip,pins = <1 15 1 &pcfg_pull_up>;
+		};
+
+		sdmmc_bus4: sdmmc-bus4 {
+			rockchip,pins = <1 18 1 &pcfg_pull_up>,
+					<1 19 1 &pcfg_pull_up>,
+					<1 20 1 &pcfg_pull_up>,
+					<1 21 1 &pcfg_pull_up>;
+		};
+	};
+
+	/*
+	* Same as above, decreasing strength of SDIO pins seems to be benefical
+	* to stability
+	*/
+	sdio {
+		sdio_clk: sdio-clk {
+			rockchip,pins = <3 0 1 &pcfg_pull_down_2ma>;
+		};
+
+		sdio_cmd: sdio-cmd {
+			rockchip,pins = <3 1 1 &pcfg_pull_up_2ma>;
+		};
+
+		sdio_bus4: sdio-bus4 {
+			rockchip,pins = <3 2 1 &pcfg_pull_up_2ma>,
+					<3 3 1 &pcfg_pull_up_2ma>,
+					<3 4 1 &pcfg_pull_up_2ma>,
+					<3 5 1 &pcfg_pull_up_2ma>;
+		};
+	};
+
+	/*
+	* Same drill as above, electrical schemes also report this pull-up/down
+	* configurations.
+	*/
+	emmc {
+		emmc_clk: emmc-clk {
+			rockchip,pins = <2 7 2 &pcfg_pull_up>;
+		};
+
+		emmc_cmd: emmc-cmd {
+			rockchip,pins = <1 22 2 &pcfg_pull_up>;
+		};
+
+		emmc_bus8: emmc-bus8 {
+			rockchip,pins = <1 24 2 &pcfg_pull_up>,
+					<1 25 2 &pcfg_pull_up>,
+					<1 26 2 &pcfg_pull_up>,
+					<1 27 2 &pcfg_pull_up>,
+					<1 28 2 &pcfg_pull_up>,
+					<1 29 2 &pcfg_pull_up>,
+					<1 30 2 &pcfg_pull_up>,
+					<1 31 2 &pcfg_pull_up>;
+		};
+
+		emmc_pwr: emmc-pwr {
+			rockchip,pins = <2 RK_PA5 2 &pcfg_pull_down>;
+		};
+
+		emmc_rst: emmc-rst {
+			rockchip,pins = <1 RK_PC7 2 &pcfg_pull_up>;
+		};
+
+	};
+
+
+	gpio {
+		gpio_led_working: gpio-led-working {
+			rockchip,pins =  <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	ir {
+		ir_int: ir-int {
+			rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+};