99 lines
2.5 KiB
Diff
99 lines
2.5 KiB
Diff
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From d5d5c53173c484a13cda62a537cbf75a5df4b0e4 Mon Sep 17 00:00:00 2001
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From: "Miouyouyou (Myy)" <myy@miouyouyou.fr>
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Date: Mon, 5 Nov 2018 21:58:56 +0100
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Subject: [PATCH] ARM: DTS: rk3288-tinker: Enabling SDIO and Wifi
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Adding the appropriate nodes in order to exploit the WiFi capabilities
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of the board.
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Since these capabilities are provided through SDIO, and the SDIO
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nodes were not defined, these were added too.
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These seems to depend on each other so they are added in one big
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patch.
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Split if necessary.
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Signed-off-by: Miouyouyou (Myy) <myy@miouyouyou.fr>
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---
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arch/arm/boot/dts/rk3288-tinker.dts | 62 +++++++++++++++++++++++++++++++++++++
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1 file changed, 62 insertions(+)
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diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts
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index 1e43527aa..d4df13bed 100644
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--- a/arch/arm/boot/dts/rk3288-tinker.dts
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+++ b/arch/arm/boot/dts/rk3288-tinker.dts
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@@ -6,8 +6,70 @@
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/dts-v1/;
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#include "rk3288-tinker.dtsi"
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+#include <dt-bindings/clock/rockchip,rk808.h>
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/ {
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model = "Rockchip RK3288 Asus Tinker Board";
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compatible = "asus,rk3288-tinker", "rockchip,rk3288";
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+
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+ /* This is essential to get SDIO devices working.
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+ The Wifi depends on SDIO ! */
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk808 RK808_CLKOUT1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wireless-wlan {
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+ compatible = "wlan-platdata";
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+ rockchip,grf = <&grf>;
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+ sdio_vref = <1800>;
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+ status = "okay";
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+ wifi_chip_type = "8723bs";
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+ WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
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+ };
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+};
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+
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+&io_domains {
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+ wifi-supply = <&vcc_18>;
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+};
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+
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+&pinctrl {
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+ sdio-pwrseq {
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+ wifi_enable_h: wifienable-h {
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+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ chip_enable_h: chip-enable-h {
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+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+};
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+
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+&sdio0 {
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+ bus-width = <4>;
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+ cap-sd-highspeed;
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+ cap-sdio-irq;
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+ clock-frequency = <50000000>;
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+ clock-freq-min-max = <200000 50000000>;
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+ disable-wp;
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+ keep-power-in-suspend;
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+ mmc-pwrseq = <&sdio_pwrseq>;
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+ non-removable;
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+ num-slots = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
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+ sd-uhs-sdr104;
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+ status = "okay";
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+ supports-sdio;
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};
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--
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2.16.4
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