84 lines
2.0 KiB
Diff
84 lines
2.0 KiB
Diff
|
From 4f91deda915a27c3fc7542533bbe65591b3b83b6 Mon Sep 17 00:00:00 2001
|
||
|
From: schwar3kat <61094841+schwar3kat@users.noreply.github.com>
|
||
|
Date: Mon, 21 Feb 2022 22:29:47 +1300
|
||
|
Subject: [PATCH] rk3328-orangepi-r1-plus-lts.dts
|
||
|
|
||
|
Signed-off-by: schwar3kat <61094841+schwar3kat@users.noreply.github.com>
|
||
|
---
|
||
|
.../rockchip/rk3328-orangepi-r1-plus-lts.dts | 66 +++++
|
||
|
1 files changed, 66 insertions(+)
|
||
|
create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
|
||
|
|
||
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
|
||
|
new file mode 100644
|
||
|
index 000000000..10d50ebd4
|
||
|
--- /dev/null
|
||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
|
||
|
@@ -0,0 +1,66 @@
|
||
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||
|
+/*
|
||
|
+ * Copyright (c) 2016 Xunlong Software. Co., Ltd.
|
||
|
+ * (http://www.orangepi.org)
|
||
|
+ *
|
||
|
+ * Copyright (c) 2021 Tianling Shen <cnsztl@immortalwrt.org>
|
||
|
+ */
|
||
|
+
|
||
|
+#include "rk3328-orangepi-r1-plus.dts"
|
||
|
+
|
||
|
+/ {
|
||
|
+ model = "Xunlong Orange Pi R1 Plus LTS";
|
||
|
+ compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
|
||
|
+};
|
||
|
+
|
||
|
+&dmc_opp_table {
|
||
|
+ opp-798000000 {
|
||
|
+ status = "disabled";
|
||
|
+ };
|
||
|
+ opp-840000000 {
|
||
|
+ status = "disabled";
|
||
|
+ };
|
||
|
+ opp-924000000 {
|
||
|
+ status = "disabled";
|
||
|
+ };
|
||
|
+ opp-1056000000 {
|
||
|
+ status = "disabled";
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&gmac2io {
|
||
|
+ phy-handle = <&yt8531c>;
|
||
|
+ tx_delay = <0x19>;
|
||
|
+ rx_delay = <0x05>;
|
||
|
+
|
||
|
+ mdio {
|
||
|
+ /delete-node/ ethernet-phy@1;
|
||
|
+
|
||
|
+ yt8531c: ethernet-phy@0 {
|
||
|
+ compatible = "ethernet-phy-id4f51.e91b",
|
||
|
+ "ethernet-phy-ieee802.3-c22";
|
||
|
+ reg = <0>;
|
||
|
+ pinctrl-0 = <ð_phy_reset_pin>;
|
||
|
+ pinctrl-names = "default";
|
||
|
+ reset-assert-us = <15000>;
|
||
|
+ reset-deassert-us = <50000>;
|
||
|
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||
|
+ };
|
||
|
+ };
|
||
|
+};
|
||
|
+
|
||
|
+&lan_led {
|
||
|
+ label = "orangepi-r1-plus-lts:green:lan";
|
||
|
+};
|
||
|
+
|
||
|
+&sys_led {
|
||
|
+ label = "orangepi-r1-plus-lts:red:sys";
|
||
|
+};
|
||
|
+
|
||
|
+&usb3phy_grf {
|
||
|
+ realtek,led-data = <0x78>;
|
||
|
+};
|
||
|
+
|
||
|
+&wan_led {
|
||
|
+ label = "orangepi-r1-plus-lts:green:wan";
|
||
|
+};
|