42 lines
1.3 KiB
Diff
42 lines
1.3 KiB
Diff
|
From e329bfefd00a9210b45278acf42fc639c3c54c24 Mon Sep 17 00:00:00 2001
|
||
|
From: ashthespy <ashthespy@gmail.com>
|
||
|
Date: Fri, 17 Jan 2020 17:12:51 +0100
|
||
|
Subject: [PATCH 12/23] arm64: dts: rk3308: Add rk-timer-rtc
|
||
|
|
||
|
---
|
||
|
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 11 ++++++++++-
|
||
|
1 file changed, 10 insertions(+), 1 deletion(-)
|
||
|
|
||
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
|
||
|
index 37ffedb99a2d..c711c248ce29 100644
|
||
|
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
|
||
|
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
|
||
|
@@ -502,6 +502,15 @@ rktimer: rktimer@ff1a0000 {
|
||
|
clock-names = "pclk", "timer";
|
||
|
};
|
||
|
|
||
|
+ rk_timer_rtc: rk-timer-rtc@ff1a0020 {
|
||
|
+ compatible = "rockchip,rk3308-timer-rtc";
|
||
|
+ reg = <0x0 0xff1a0020 0x0 0x20>;
|
||
|
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
+ clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER1>;
|
||
|
+ clock-names = "pclk", "timer";
|
||
|
+ status = "disabled";
|
||
|
+ };
|
||
|
+
|
||
|
saradc: saradc@ff1e0000 {
|
||
|
compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
|
||
|
reg = <0x0 0xff1e0000 0x0 0x100>;
|
||
|
@@ -707,7 +716,7 @@ i2s_8ch_3: i2s@ff330000 {
|
||
|
rockchip,mclk-calibrate;
|
||
|
status = "disabled";
|
||
|
};
|
||
|
-
|
||
|
+
|
||
|
i2s_2ch_0: i2s@ff350000 {
|
||
|
compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s";
|
||
|
reg = <0x0 0xff350000 0x0 0x1000>;
|
||
|
--
|
||
|
2.25.1
|
||
|
|