41 lines
1.3 KiB
Diff
41 lines
1.3 KiB
Diff
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From 2076121eecc18fa31ae749c6ddc5648be96f0b5e Mon Sep 17 00:00:00 2001
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From: Simon Xue <xxm@rock-chips.com>
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Date: Mon, 5 Jul 2021 09:26:10 +0800
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Subject: [PATCH 014/478] arm64: dts: rockchip: add saradc node for rk3568
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Add the core dt-node for the rk3568's saradc.
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Signed-off-by: Simon Xue <xxm@rock-chips.com>
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Link: https://lore.kernel.org/r/20210705012610.3831-1-xxm@rock-chips.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3568.dtsi | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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index 618849186c39..11825909c5db 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@@ -754,6 +754,18 @@ uart9: serial@fe6d0000 {
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status = "disabled";
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};
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+ saradc: saradc@fe720000 {
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+ compatible = "rockchip,rk3568-saradc", "rockchip,rk3399-saradc";
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+ reg = <0x0 0xfe720000 0x0 0x100>;
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+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
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+ clock-names = "saradc", "apb_pclk";
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+ resets = <&cru SRST_P_SARADC>;
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+ reset-names = "saradc-apb";
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+ #io-channel-cells = <1>;
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+ status = "disabled";
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+ };
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+
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pinctrl: pinctrl {
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compatible = "rockchip,rk3568-pinctrl";
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rockchip,grf = <&grf>;
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--
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2.35.3
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