60 lines
1.9 KiB
Diff
60 lines
1.9 KiB
Diff
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From ddd8d02c8ec817f7fda90d8833347fade0d0a45a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= <megi@xff.cz>
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Date: Sat, 1 Feb 2020 23:41:18 +0100
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Subject: [PATCH 153/464] arm64: dts: sun50i-a64: Set fifo-size for uarts
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Boot time optimization.
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Signed-off-by: Ondrej Jirman <megi@xff.cz>
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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index 57ac18738c99..fb8eca86bc14 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -961,6 +961,7 @@ uart0: serial@1c28000 {
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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+ fifo-size = <64>;
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clocks = <&ccu CLK_BUS_UART0>;
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resets = <&ccu RST_BUS_UART0>;
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status = "disabled";
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@@ -972,6 +973,7 @@ uart1: serial@1c28400 {
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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+ fifo-size = <64>;
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clocks = <&ccu CLK_BUS_UART1>;
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resets = <&ccu RST_BUS_UART1>;
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status = "disabled";
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@@ -983,6 +985,7 @@ uart2: serial@1c28800 {
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interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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+ fifo-size = <64>;
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clocks = <&ccu CLK_BUS_UART2>;
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resets = <&ccu RST_BUS_UART2>;
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status = "disabled";
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@@ -994,6 +997,7 @@ uart3: serial@1c28c00 {
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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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+ fifo-size = <64>;
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clocks = <&ccu CLK_BUS_UART3>;
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resets = <&ccu RST_BUS_UART3>;
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status = "disabled";
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@@ -1005,6 +1009,7 @@ uart4: serial@1c29000 {
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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+ fifo-size = <64>;
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clocks = <&ccu CLK_BUS_UART4>;
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resets = <&ccu RST_BUS_UART4>;
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status = "disabled";
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--
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2.34.1
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