115 lines
4.0 KiB
Diff
115 lines
4.0 KiB
Diff
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From ccfd8b3f8b001aab0a2469e43ce8768863cb454d Mon Sep 17 00:00:00 2001
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From: schwar3kat <61094841+schwar3kat@users.noreply.github.com>
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Date: Wed, 18 Jan 2023 15:46:39 +1300
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Subject: [PATCH] arm: dts: rockchip: rk3399: usb: ehci: Fix EHCI probe in rk3399 to access peripherals by USB 2.
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Commit message: Clean up mbox format in rk3399-ehci-probe-usb2.patch. No diff changes.
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arch/arm/dts/rk3399.dtsi has a node
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usb_host0_ehci: usb@fe380000 {
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compatible = "generic-ehci";
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with clocks:
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clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
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<&u2phy0>;
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The first 2 refer to nodes with class UCLASS_CLK, but &u2phy0
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has class UCLASS_PHY.
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u2phy0: usb2phy@e450 {
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compatible = "rockchip,rk3399-usb2phy";
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Since clk_get_bulk() only looks for devices with UCLASS_CLK,
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it fails with -ENODEV and then ehci_usb_probe() aborts.
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The consequence is peripherals connected to a USB 2 port (e.g. in a
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Rock Pi 4 the white port, nearer the edge) not being detected.
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They're detected if CONFIG_USB_OHCI_GENERIC is selected in Kconfig,
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because ohci_usb_probe() does not abort when one clk_get_by_index()
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fails, but then they work in USB 1 mode,.
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rk3399.dtsi comes from linux and the u2phy0 was added[1] to the clock
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list in:
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commit b5d1c57299734f5b54035ef2e61706b83041f20c
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Author: William wu <wulf@rock-chips.com>
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Date: Wed Dec 21 18:41:05 2016 +0800
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arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
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We found that the suspend process was blocked when it run into
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ehci/ohci module due to clk-480m of usb2-phy was disabled.
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[...]
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Suspend concerns don't apply to U-Boot, and the problem with U-Boot
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failing to probe EHCI doesn't apply to linux, because in linux
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rockchip_usb2phy_clk480m_register makes u2phy0 a proper clock provider
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when called by rockchip_usb2phy_probe().
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So I can think of a few alternative solutions:
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1- Change ehci_usb_probe() to make it more similar to
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ohci_usb_probe(), and survive failure to get one clock. Looks a
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little harder, and I don't know whether it could break something if
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it ignored a clock that was important for something else than
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suspend.
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2- Change rk3399.dtsi effecttively reverting the linux commit
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b5d1c57299734f5b54035ef2e61706b83041f20c. This dealigns the .dtsi
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from linux and seems fragile at the next synchronisation.
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3- Change the clock list in rk3399-u-boot.dtsi or somewhere else.
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This survives .dts* sync but may survive "too much" and miss some
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change from linux that we might want.
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4- Enable CONFIG_USB_OHCI_GENERIC and use the ports in USB 1 mode.
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This would need to be made for all boards using rk3399. In a
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simple test reading one file from USB storage it gave 769.5 KiB/s
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instead of 20.5 MiB/s with solution 2.
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5- Trying to replicate linux and have usb2phy somehow provide a clk,
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or have a separate clock device for usb2phy in addition to the phy
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device. I just can't seem to imagine how to achieve this with the
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U-Boot driver model, maybe because of my limited familiarity with
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it.
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This patch is option 3. Looked like the simplest and most performant.
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But it might not be what's wanted, so comments wellcome.
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Link: [1] https://lkml.kernel.org/lkml/1731551.Q6cHK6n5ZM@phil/T/
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Cc: Simon Glass <sjg@chromium.org>
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Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
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Cc: Kever Yang <kever.yang@rock-chips.com>
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Cc: Lukasz Majewski <lukma@denx.de>
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Cc: Sean Anderson <seanga2@gmail.com>
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Cc: Marek Vasut <marex@denx.de>
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Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
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---
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arch/arm/dts/rk3399-u-boot.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
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index 716b9a43..63c7b104 100644
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--- a/arch/arm/dts/rk3399-u-boot.dtsi
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+++ b/arch/arm/dts/rk3399-u-boot.dtsi
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@@ -147,3 +147,11 @@
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&vopl {
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u-boot,dm-pre-reloc;
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};
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+
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+&usb_host0_ehci {
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+ clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
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+};
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+
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+&usb_host1_ehci {
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+ clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
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+};
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--
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Created with Armbian build tools https://github.com/armbian/build
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