From 440c2ac99c32cfdf9556a041e5da4489fb3eaa77 Mon Sep 17 00:00:00 2001 From: JMCC Date: Sun, 27 Dec 2020 02:58:41 +0100 Subject: [PATCH] add-oc-opp-rk3399 Signed-off-by: JMCC --- arch/arm64/boot/dts/rockchip/overlay/Makefile | 4 +- .../rockchip/overlay/README.rockchip-overlays | 11 ++++ .../overlay/rockchip-rk3399-oc-20.dts | 38 ++++++++++++ .../overlay/rockchip-rk3399-oc-22.dts | 58 +++++++++++++++++++ 4 files changed, 110 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-20.dts create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-22.dts diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile index c5f52da3..9d39fce0 100644 --- a/arch/arm64/boot/dts/rockchip/overlay/Makefile +++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile @@ -3,10 +3,12 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-i2c7.dtbo \ rockchip-i2c8.dtbo \ rockchip-pcie-gen2.dtbo \ + rockchip-rk3399-oc-20.dtbo \ + rockchip-rk3399-oc-22.dtbo \ rockchip-spi-jedec-nor.dtbo \ rockchip-spi-spidev.dtbo \ rockchip-uart4.dtbo \ - rockchip-w1-gpio.dtbo + rockchip-w1-gpio.dtbo scr-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-fixup.scr diff --git a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays index ba6d51f6..13b55335 100644 --- a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays +++ b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays @@ -29,6 +29,17 @@ I2C8 pins (SCL, SDA): GPIO1-C5, GPIO1-C4 Enables PCIe Gen2 link speed on RK3399. WARNING! Not officially supported by Rockchip!!! +### rk3399-oc-20 + +Enables Overclocking frequencies 2.0/1.5 Ghz. +This one should be stable in almost any individual chip + +### rk3399-oc-22 + +Enables Overclocking frequencies 2.2/1.7 Ghz. +This one should also be stable in most cases, but make +sure you have very good cooling + ### spi-jedec-nor Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-20.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-20.dts new file mode 100644 index 00000000..32f70cfe --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-20.dts @@ -0,0 +1,38 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "rockchip,rockpi","rockchip,rk3399"; + + fragment@0 { + target = <&cluster0_opp>; + + __overlay__ { + rockchip,bin-scaling-sel = < + 0 12 + 1 12 + >; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1150000>; + clock-latency-ns = <40000>; + }; + }; + }; + + fragment@1 { + target = <&cluster1_opp>; + + __overlay__ { + rockchip,bin-scaling-sel = < + 0 1 + 1 1 + >; + opp-1992000000 { + opp-hz = /bits/ 64 <1992000000>; + opp-microvolt = <1250000>; + clock-latency-ns = <40000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-22.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-22.dts new file mode 100644 index 00000000..04b23b57 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-oc-22.dts @@ -0,0 +1,58 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "rockchip,rockpi","rockchip,rk3399"; + + fragment@0 { + target = <&cluster0_opp>; + + __overlay__ { + rockchip,bin-scaling-sel = < + 0 12 + 1 12 + >; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1150000 1150000 1200000>; + clock-latency-ns = <40000>; + }; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <1175000 1175000 1200000>; + clock-latency-ns = <40000>; + }; + opp-1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <40000>; + }; + }; + }; + + fragment@1 { + target = <&cluster1_opp>; + + __overlay__ { + rockchip,bin-scaling-sel = < + 0 1 + 1 1 + >; + opp-1992000000 { + opp-hz = /bits/ 64 <1992000000>; + opp-microvolt = <1250000 1250000 1250000>; + clock-latency-ns = <40000>; + }; + opp-2088000000 { + opp-hz = /bits/ 64 <2088000000>; + opp-microvolt = <1300000 1300000 1300000>; + cloc-latency-ns = <40000>; + }; + opp-2184000000 { + opp-hz = /bits/ 64 <2184000000>; + opp-microvolt = <1350000 1350000 1350000>; + clock-latency-ns = <40000>; + }; + }; + }; +}; -- Created with Armbian build tools https://github.com/armbian/build