From 6477f668e891765ec0fd9985587737e3bf4ead50 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sat, 3 Apr 2021 16:13:20 -0500 Subject: [PATCH 415/478] dt-bindings: arm: sunxi: Expand MBUS binding The MBUS provides more than address translation and bandwidth control. It provides a PMU to measure bandwidth usage by certain masters, and provide notification via IRQ when they are active or idle. The MBUS is also tightly integrated with the DRAM controller to provide a Memory Dynamic Frequency Scaling (MDFS) feature. In view of this, the MBUS binding needs to represent the hardware resources needed for MDFS, which include the clocks and MMIO range of the adjacent DRAM controller. Signed-off-by: Samuel Holland --- .../arm/sunxi/allwinner,sun4i-a10-mbus.yaml | 20 ++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml index e713a6fe4cf7..e0c87aebfaee 100644 --- a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml @@ -33,10 +33,26 @@ properties: - allwinner,sun50i-a64-mbus reg: - maxItems: 1 + maxItems: 2 + + reg-names: + items: + - "dram" + - "mbus" clocks: + maxItems: 3 + + clock-names: + items: + - "apb" + - "dram" + - "mbus" + + interrupts: maxItems: 1 + description: + MBUS PMU activity interrupt. dma-ranges: description: @@ -50,7 +66,9 @@ required: - "#interconnect-cells" - compatible - reg + - reg-names - clocks + - clock-names - dma-ranges additionalProperties: false -- 2.35.3