From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 19 Aug 2020 21:12:54 +0200 Subject: [PATCH] arm64: dts: rockchip: add rkvdec node for RK3328 Signed-off-by: Alex Bee --- .../bindings/media/rockchip,vdec.yaml | 3 +++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 25 ++++++++++++++++++- 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml index 3f4772c8d095..21a78372dae6 100644 --- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml @@ -20,6 +20,9 @@ properties: - items: - const: rockchip,rk3228-vdec - const: rockchip,rk3399-vdec + - items: + - const: rockchip,rk3328-vdec + - const: rockchip,rk3399-vdec reg: maxItems: 1 diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 9c10b6e3b9bc..23021373e15b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -306,6 +306,10 @@ power-domain@RK3328_PD_HEVC { }; power-domain@RK3328_PD_VIDEO { reg = ; + clocks = <&cru ACLK_RKVDEC>, + <&cru HCLK_RKVDEC>, + <&cru SCLK_VDEC_CABAC>, + <&cru SCLK_VDEC_CORE>; #power-domain-cells = <0>; }; power-domain@RK3328_PD_VPU { @@ -660,6 +664,25 @@ vpu_mmu: iommu@ff350800 { power-domains = <&power RK3328_PD_VPU>; }; + rkvdec: video-codec@ff360000 { + compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec"; + reg = <0x0 0xff360000 0x0 0x480>; + interrupts = ; + assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>, + <&cru SCLK_VDEC_CORE>; + assigned-clock-rates = <400000000>, <400000000>, <300000000>; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, + <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; + clock-names = "axi", "ahb", "cabac", "core"; + iommus = <&rkvdec_mmu>; + power-domains = <&power RK3328_PD_VIDEO>; + resets = <&cru SRST_VDEC_H>, <&cru SRST_VDEC_A>, + <&cru SRST_VDEC_CORE>, <&cru SRST_VDEC_CABAC>, + <&cru SRST_VDEC_NIU_A>, <&cru SRST_VDEC_NIU_H>; + reset-names = "video_h", "video_a", "video_core", "video_cabac", + "niu_a", "niu_h"; + }; + rkvdec_mmu: iommu@ff360480 { compatible = "rockchip,iommu"; reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; @@ -667,7 +690,7 @@ rkvdec_mmu: iommu@ff360480 { clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; clock-names = "aclk", "iface"; #iommu-cells = <0>; - status = "disabled"; + power-domains = <&power RK3328_PD_VIDEO>; }; vop: vop@ff370000 {