From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Dan Pasanen Date: Thu, 16 Dec 2021 05:17:33 -0500 Subject: [ARCHEOLOGY] rockchip-[current,edge]: add pcie hack and lsi scsi/sas support (#3351) > X-Git-Archeology: > recovered message: > * build: kernel: rockchip64-[current,edge]: add pcie bus scan delay patches > X-Git-Archeology: > recovered message: > These are needed for cards like the LSI SAS2008 which needs a little > X-Git-Archeology: > recovered message: > extra time to initialize or they'll cause a kernel panic. > X-Git-Archeology: > recovered message: > References: > X-Git-Archeology: > recovered message: > https://gitlab.manjaro.org/manjaro-arm/packages/core/linux/-/blob/master/0013-rk3399-rp64-pcie-Reimplement-rockchip-PCIe-bus-scan-delay.patch > X-Git-Archeology: > recovered message: > https://gitlab.manjaro.org/manjaro-arm/packages/core/linux/-/blob/master/0022-arm64-dts-rockchip-Add-pcie-bus-scan-delay-to-rockpr.patch > X-Git-Archeology: > recovered message: > * config: linux-rockchip64-[current,edge]: enable lsi sata/sas support > X-Git-Archeology: - Revision 7be9e8b99590e32c0594365d00a2a2cfc3c4bd5a: https://github.com/armbian/build/commit/7be9e8b99590e32c0594365d00a2a2cfc3c4bd5a > X-Git-Archeology: Date: Thu, 16 Dec 2021 05:17:33 -0500 > X-Git-Archeology: From: Dan Pasanen > X-Git-Archeology: Subject: rockchip-[current,edge]: add pcie hack and lsi scsi/sas support (#3351) > X-Git-Archeology: > X-Git-Archeology: - Revision 6b490e16944b30ff69bf9c13678905187df0d9d4: https://github.com/armbian/build/commit/6b490e16944b30ff69bf9c13678905187df0d9d4 > X-Git-Archeology: Date: Tue, 11 Jan 2022 15:26:11 +0100 > X-Git-Archeology: From: Oleg > X-Git-Archeology: Subject: move kernel edge to 5.16 (#3387) > X-Git-Archeology: > X-Git-Archeology: - Revision ac8fc4385594d59257ee9dffd9efa85e3497fa7d: https://github.com/armbian/build/commit/ac8fc4385594d59257ee9dffd9efa85e3497fa7d > X-Git-Archeology: Date: Sat, 26 Feb 2022 07:46:44 +0100 > X-Git-Archeology: From: Piotr Szczepanik > X-Git-Archeology: Subject: Switch rockchip64 current to linux 5.15.y (#3489) > X-Git-Archeology: > X-Git-Archeology: - Revision f52a4193d02ef88333ba117c68d49486dfd7ff41: https://github.com/armbian/build/commit/f52a4193d02ef88333ba117c68d49486dfd7ff41 > X-Git-Archeology: Date: Sun, 20 Mar 2022 22:58:21 +0100 > X-Git-Archeology: From: Oleg > X-Git-Archeology: Subject: Adding Pine64 Quartz64a as WIP target (#3539) > X-Git-Archeology: > X-Git-Archeology: - Revision 0afe24c95729044910e0b3f84dc5500bcdc6524c: https://github.com/armbian/build/commit/0afe24c95729044910e0b3f84dc5500bcdc6524c > X-Git-Archeology: Date: Sun, 24 Apr 2022 22:33:47 +0200 > X-Git-Archeology: From: Oleg > X-Git-Archeology: Subject: move kernel media edge to 5.17 (#3704) > X-Git-Archeology: > X-Git-Archeology: - Revision 897674aa74bce0326ed7fe06f5336bf4709a8a1f: https://github.com/armbian/build/commit/897674aa74bce0326ed7fe06f5336bf4709a8a1f > X-Git-Archeology: Date: Tue, 03 May 2022 08:27:32 +0200 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: Bump and freeze kernel at last known working versions (#3736) > X-Git-Archeology: > X-Git-Archeology: - Revision 597d2dac11f00d9070a4e49d6bad1b2244e36cb3: https://github.com/armbian/build/commit/597d2dac11f00d9070a4e49d6bad1b2244e36cb3 > X-Git-Archeology: Date: Sat, 28 May 2022 07:56:22 +0200 > X-Git-Archeology: From: Jianfeng Liu > X-Git-Archeology: Subject: update rockchip64-edge to 5.18 (#3814) > X-Git-Archeology: > X-Git-Archeology: - Revision 8c6641e7b79f0d50acdc306d140e586a4e923cf0: https://github.com/armbian/build/commit/8c6641e7b79f0d50acdc306d140e586a4e923cf0 > X-Git-Archeology: Date: Wed, 03 Aug 2022 22:22:55 +0200 > X-Git-Archeology: From: Jianfeng Liu > X-Git-Archeology: Subject: update rockchip64 edge to 5.19 (#4039) > X-Git-Archeology: > X-Git-Archeology: - Revision 6765f734cc4a22aeaa9f99a3ad28c8c322de26f6: https://github.com/armbian/build/commit/6765f734cc4a22aeaa9f99a3ad28c8c322de26f6 > X-Git-Archeology: Date: Tue, 25 Oct 2022 11:26:51 +0200 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: Bump rockchip64 edge to 6.0.y (#4337) > X-Git-Archeology: > X-Git-Archeology: - Revision 92f1a22d76b987afa7ba555d5b509adc51d689e7: https://github.com/armbian/build/commit/92f1a22d76b987afa7ba555d5b509adc51d689e7 > X-Git-Archeology: Date: Fri, 16 Dec 2022 13:38:13 +0100 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: Re-add rockchip64 6.0 patches (#4575) > X-Git-Archeology: > X-Git-Archeology: - Revision 34ae84fac5d0b66a1ab2d1e51534b7beb13ef245: https://github.com/armbian/build/commit/34ae84fac5d0b66a1ab2d1e51534b7beb13ef245 > X-Git-Archeology: Date: Fri, 05 May 2023 14:22:00 +0200 > X-Git-Archeology: From: amazingfate > X-Git-Archeology: Subject: bump rockchip64 edge to v6.3 > X-Git-Archeology: --- Documentation/admin-guide/kernel-parameters.txt | 8 +++ drivers/pci/controller/pcie-rockchip-host.c | 25 ++++++++++ drivers/pci/controller/pcie-rockchip.c | 6 +++ drivers/pci/controller/pcie-rockchip.h | 2 + 4 files changed, 41 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 732391193182..5134b12a4bf7 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -4455,6 +4455,14 @@ nomsi Do not use MSI for native PCIe PME signaling (this makes all PCIe root ports use INTx for all services). + pcie_rockchip_host.bus_scan_delay= [PCIE] Delay in ms before + scanning PCIe bus in Rockchip PCIe host driver. Some PCIe + cards seem to need delays that can be several hundred ms. + If set to greater than or equal to 0 this parameter will + override delay that can be set in device tree. + Values less than 0 mean that this parameter is ignored. + default=-1 + pcmv= [HW,PCMCIA] BadgePAD 4 pd_ignore_unused diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c index c96c0f454570..a161b852a5c8 100644 --- a/drivers/pci/controller/pcie-rockchip-host.c +++ b/drivers/pci/controller/pcie-rockchip-host.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -38,6 +39,9 @@ #include "../pci.h" #include "pcie-rockchip.h" +static int bus_scan_delay = -1; +module_param_named(bus_scan_delay, bus_scan_delay, int, S_IRUGO); + static void rockchip_pcie_enable_bw_int(struct rockchip_pcie *rockchip) { u32 status; @@ -932,6 +936,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct pci_host_bridge *bridge; int err; + u32 delay = 0; if (!dev->of_node) return -ENODEV; @@ -981,6 +986,26 @@ static int rockchip_pcie_probe(struct platform_device *pdev) bridge->sysdata = rockchip; bridge->ops = &rockchip_pcie_ops; + /* Checking if bus scan delay was given from command line and prefer + * that over the value in device tree (which defaults to 0 if not set). + */ + if (bus_scan_delay >= 0) { + delay = bus_scan_delay; + dev_info(dev, "wait %u ms (from command-line) before bus scan\n", delay); + } else { + delay = rockchip->bus_scan_delay; + dev_info(dev, "wait %u ms (from device tree) before bus scan\n", delay); + } + /* Workaround for some devices crashing on pci_host_probe / pci_scan_root_bus_bridge + * calls: sleep a bit before bus scan. Call trace gets to rockchip_pcie_rd_conf when + * trying to read vendor id (pci_bus_generic_read_dev_vendor_id is in call stack) + * before panicing. I have no idea why this works or what causes the panic. I just + * found this hack by luck when trying to "make it break differently if possible". + */ + if (delay > 0) { + msleep(delay); + } + err = rockchip_pcie_setup_irq(rockchip); if (err) goto err_remove_irq_domain; diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c index 1aa84035a8bc..c2bf64fcf300 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -150,6 +150,12 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) return PTR_ERR(rockchip->clk_pcie_pm); } + err = of_property_read_u32(node, "bus-scan-delay-ms", &rockchip->bus_scan_delay); + if (err) { + dev_info(dev, "no bus scan delay, default to 0 ms\n"); + rockchip->bus_scan_delay = 0; + } + return 0; } EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt); diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index fe0333778fd9..befb64392b14 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -318,6 +318,8 @@ struct rockchip_pcie { phys_addr_t msg_bus_addr; bool is_rc; struct resource *mem_res; + /* Bus scan delay is a workaround for some pcie devices causing crashes */ + u32 bus_scan_delay; }; static u32 rockchip_pcie_read(struct rockchip_pcie *rockchip, u32 reg) -- Armbian