// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
 * (http://www.friendlyarm.com)
 */

/dts-v1/;

#include "rk3328-nanopi-r2-rev00.dts"

/ {
	model = "FriendlyElec NanoPi R2C";
	compatible = "friendlyelec,nanopi-r2", "rockchip,rk3328";
};

&mach {
	hwrev = <6>;
	model = "NanoPi R2C";
};

&rgmiim1_pins {
	rockchip,pins =
		/* mac_txclk */
		<1 RK_PB4 2 &pcfg_pull_none_8ma>,
		/* mac_rxclk */
		<1 RK_PB5 2 &pcfg_pull_none>,
		/* mac_mdio */
		<1 RK_PC3 2 &pcfg_pull_none_2ma>,
		/* mac_txen */
		<1 RK_PD1 2 &pcfg_pull_none_8ma>,
		/* mac_clk */
		<1 RK_PC5 2 &pcfg_pull_none_2ma>,
		/* mac_rxdv */
		<1 RK_PC6 2 &pcfg_pull_none>,
		/* mac_mdc */
		<1 RK_PC7 2 &pcfg_pull_none_2ma>,
		/* mac_rxd1 */
		<1 RK_PB2 2 &pcfg_pull_none>,
		/* mac_rxd0 */
		<1 RK_PB3 2 &pcfg_pull_none>,
		/* mac_txd1 */
		<1 RK_PB0 2 &pcfg_pull_none_8ma>,
		/* mac_txd0 */
		<1 RK_PB1 2 &pcfg_pull_none_8ma>,
		/* mac_rxd3 */
		<1 RK_PB6 2 &pcfg_pull_none>,
		/* mac_rxd2 */
		<1 RK_PB7 2 &pcfg_pull_none>,
		/* mac_txd3 */
		<1 RK_PC0 2 &pcfg_pull_none_8ma>,
		/* mac_txd2 */
		<1 RK_PC1 2 &pcfg_pull_none_8ma>,

		/* mac_txclk */
		<0 RK_PB0 1 &pcfg_pull_none>,
		/* mac_txen */
		<0 RK_PB4 1 &pcfg_pull_none>,
		/* mac_clk */
		<0 RK_PD0 1 &pcfg_pull_none>,
		/* mac_txd1 */
		<0 RK_PC0 1 &pcfg_pull_none>,
		/* mac_txd0 */
		<0 RK_PC1 1 &pcfg_pull_none>,
		/* mac_txd3 */
		<0 RK_PC7 1 &pcfg_pull_none>,
		/* mac_txd2 */
		<0 RK_PC6 1 &pcfg_pull_none>;
};

/delete-node/ &rtl8211e;

&gmac2io {
	phy-handle = <&ethphy3>;
       snps,reset-delays-us = <0 15000 50000>;
       tx_delay = <0x22>;
	rx_delay = <0x12>;
	mdio {

		ethphy3: ethernet-phy@3 {
			compatible = "ethernet-phy-id0000.011a",
				     "ethernet-phy-ieee802.3-c22";
			reg = <3>;
                       interrupt-parent = <&gpio2>;
			interrupts = <RK_PC4 IRQ_TYPE_EDGE_FALLING>;
			//reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
			keep-clkout-on;
		};
	};
};