From 57ea3a4ac6f7400d1d4b00b38e4ad1b981741ffe Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Sun, 25 Aug 2019 19:41:02 -0500 Subject: [PATCH 168/351] ARM: dts: sunxi: h3/h5: Move wakeup-capable IRQs to r_intc All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. For the H3/H5, r_intc IRQ numbers are offset by 32 from the GIC IRQ numbers. Signed-off-by: Samuel Holland --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index e4a9db619920..66c2f2013136 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -847,8 +847,9 @@ hdmi_phy: hdmi-phy@1ef0000 { rtc: rtc@1f00000 { /* compatible is in per SoC .dtsi file */ reg = <0x01f00000 0x400>; - interrupts = , - ; + interrupt-parent = <&r_intc>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>, + <9 IRQ_TYPE_LEVEL_HIGH>; clock-output-names = "osc32k", "osc32k-out", "iosc"; clocks = <&osc32k>; #clock-cells = <1>; @@ -884,7 +885,8 @@ ir: ir@1f02000 { clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>; clock-names = "apb", "ir"; resets = <&r_ccu RST_APB0_IR>; - interrupts = ; + interrupt-parent = <&r_intc>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; reg = <0x01f02000 0x400>; status = "disabled"; }; @@ -905,7 +907,8 @@ r_i2c: i2c@1f02400 { r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; - interrupts = ; + interrupt-parent = <&r_intc>; + interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>; clock-names = "apb", "hosc", "losc"; gpio-controller; -- 2.34.0