From: Jonas Karlman Subject: [PATCH 1/2] arm64: dts: rockchip: assign rate to clk_rtc_32k on rk356x Date: Tue, 10 Jan 2023 22:55:50 +0000 (UTC) clk_rtc_32k and its child clock clk_hdmi_cec detauls to a rate of 24 MHz and not to 32 kHz on RK356x. Fix this by assigning clk_rtc_32k a rate of 32768, also assign the parent to clk_rtc32k_frac. Signed-off-by: Jonas Karlman --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 5706c3e24f0a..e319699f5e39 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -422,8 +422,9 @@ cru: clock-controller@fdd20000 { clock-names = "xin24m"; #clock-cells = <1>; #reset-cells = <1>; - assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>; - assigned-clock-rates = <1200000000>, <200000000>; + assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>; + assigned-clock-rates = <32768>, <1200000000>, <200000000>; + assigned-clock-parents = <&pmucru CLK_RTC32K_FRAC>; rockchip,grf = <&grf>; }; From: Jonas Karlman Subject: [PATCH 2/2] arm64: dts: rockchip: fix hdmi cec on rock-3a Date: Tue, 10 Jan 2023 22:55:58 +0000 (UTC) HDMI CEC is configured to select HDMITX_CEC_M0 function of GPIO0_C7 by default in rk356x.dtsi. On Radxa ROCK 3 Model A it is routed to HDMITX_CEC_M1 according to board schematic [1]. Fix HDMI CEC by overriding pinctrl in hdmi node to select HDMITX_CEC_M1. [1] https://dl.radxa.com/rock3/docs/hw/3a/ROCK-3A-V1.3-SCH.pdf Signed-off-by: Jonas Karlman --- arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts index a1c5fdf7d68f..c9cded3d2f1b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts @@ -279,6 +279,7 @@ &gpu { &hdmi { avdd-0v9-supply = <&vdda0v9_image>; avdd-1v8-supply = <&vcca1v8_image>; + pinctrl-0 = <&hdmitx_scl &hdmitx_sda &hdmitxm1_cec>; status = "okay"; }; ---