From 8882842d89ba8fd22c961318b418ff3f14a59bc8 Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Thu, 16 Sep 2021 17:47:10 +0200 Subject: [PATCH 425/478] soc: rockchip: fix usb3otg port on rk3566 The usb3otg port defaults to using the usb3phy clock, which isn't available on the rk3566 (due to the usb3phy being physically missing). We need to switch to the usb2phy clock for the usb3otg controller to function. Signed-off-by: Peter Geis --- drivers/soc/rockchip/grf.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c index 494cf2b5bf7b..3aebb258845a 100644 --- a/drivers/soc/rockchip/grf.c +++ b/drivers/soc/rockchip/grf.c @@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk3399_grf __initconst = { .num_values = ARRAY_SIZE(rk3399_defaults), }; +#define RK3566_GRF_USB3OTG0_CON1 0x0104 + +static const struct rockchip_grf_value rk3566_defaults[] __initconst = { + { "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) }, + { "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) }, + { "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) }, +}; + +static const struct rockchip_grf_info rk3566_pipegrf __initconst = { + .values = rk3566_defaults, + .num_values = ARRAY_SIZE(rk3566_defaults), +}; + + static const struct of_device_id rockchip_grf_dt_match[] __initconst = { { .compatible = "rockchip,rk3036-grf", @@ -130,6 +144,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = { }, { .compatible = "rockchip,rk3399-grf", .data = (void *)&rk3399_grf, + }, { + .compatible = "rockchip,rk3566-pipegrf", + .data = (void *)&rk3566_pipegrf, }, { /* sentinel */ }, }; -- 2.35.3