From ebea4a5a9ff072a22271b3c170076644d6a7f05f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ond=C5=99ej=20Jirman?= Date: Tue, 16 Nov 2021 21:19:42 +0100 Subject: [PATCH 302/391] drm: panel: hx8394: Fix mode to have refresh rate of 60 Hz VSYNC settings did not match the init sequence values. Fix that first. Now we need to generate exact clock frequency from some of the available PLLs by a simple division: GPLL = 594 MHz VPLL = unused, can be set to anything CPLL = 800 MHz Needed clock is 60 * vtotal * htotal = 60 * 1463 * ~844 = 74086320 So no we have an optimization task. We need clock frequency that can be generated from 594 or 800 MHz by integer division and we can adjust the needed frequency a little by adjusting hsync timings. 594 / 74 = 8.027 800 / 74 = 10.811 So GPLL is a better candidate because it will need smaller adjustment of HSYNC timings. Exact frequency that can be generated is: 594 / 8 = 74.25 Which would require htotal to be 74 250 000 / (60 * vtotal) = 846 So let's set horizontal timings to 720 40 46 40. Signed-off-by: Ondrej Jirman --- drivers/gpu/drm/panel/panel-himax-hx8394.c | 27 +++++----------------- 1 file changed, 6 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-himax-hx8394.c b/drivers/gpu/drm/panel/panel-himax-hx8394.c index 1f23190a3..fc04e50dd 100644 --- a/drivers/gpu/drm/panel/panel-himax-hx8394.c +++ b/drivers/gpu/drm/panel/panel-himax-hx8394.c @@ -95,28 +95,13 @@ static int hsd060bhw4_init_sequence(struct hx8394 *ctx) static const struct drm_display_mode hsd060bhw4_mode = { .hdisplay = 720, .hsync_start = 720 + 40, - .hsync_end = 720 + 40 + 40, - .htotal = 720 + 40 + 40 + 40, + .hsync_end = 720 + 40 + 46, + .htotal = 720 + 40 + 46 + 40, .vdisplay = 1440, - .vsync_start = 1440 + 18, - .vsync_end = 1440 + 18 + 10, - .vtotal = 1440 + 18 + 10 + 17, - .clock = 69000, - .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, - .width_mm = 68, - .height_mm = 136, -}; - -static const struct drm_display_mode hsd060bhw4_mode2 = { - .hdisplay = 720, - .hsync_start = 720 + 50, - .hsync_end = 720 + 50 + 10, - .htotal = 720 + 50 + 10 + 50, - .vdisplay = 1440, - .vsync_start = 1440 + 17, - .vsync_end = 1440 + 17 + 4, - .vtotal = 1440 + 17 + 4 + 10, - .clock = 60000, + .vsync_start = 1440 + 9, + .vsync_end = 1440 + 9 + 7, + .vtotal = 1440 + 9 + 7 + 7, + .clock = 74250, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 68, .height_mm = 136, -- 2.35.3