This patch forces clk initialisation of rk3399 cpu in u-boot proper.

Normally it should only be initialised in SPL as it is "time consuming".
Doing so however leaves cpus clocked to low frequencies
for Rockchip's DDR/loader/trust with mainline u-boot scenario
which does not involve SPL phase.

Signed-off-by: Piotr Szczepanik <piter75@gmail.com>

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index f8cbda44..687c3ad7 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1394,7 +1394,7 @@ static int rk3399_clk_probe(struct udevice *dev)
 	}
 #endif
 
-	if (init_clocks)
+	if (init_clocks || 1 == 1)
		rkclk_init(priv->cru);
 
 	return 0;