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build/patch/kernel/archive/rockchip64-4.4/check/0054-arm64-overlays-add-waveshare35-model-b-and-c.patch

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From ae7a309bd4111e55e929db2d6ade09b6c5d2e5b5 Mon Sep 17 00:00:00 2001
From: stephen <stephen@vamrs.com>
Date: Fri, 12 Apr 2019 19:48:52 +0800
Subject: [PATCH 54/97] arm64: overlays: add waveshare35 model b and c
Enable it by adding the followings line in /boot/hw_intfc.conf:
intfc:uart4=off
intfc:spi1=on
intfc:dtoverlay=spi1-waveshare35b-v2
or intfc:dtoverlay=spi1-waveshare35c
Signed-off-by: stephen <stephen@vamrs.com>
---
.../arm64/boot/dts/rockchip/overlays/Makefile | 4 +-
arch/arm64/boot/dts/rockchip/overlays/README | 74 +++++++++++-------
.../boot/dts/rockchip/overlays/hw_intfc.conf | 45 +++++++++++
.../overlays/spi1-waveshare35b-v2-overlay.dts | 76 +++++++++++++++++++
.../overlays/spi1-waveshare35c-overlay.dts | 75 ++++++++++++++++++
arch/arm64/configs/rockchip_linux_defconfig | 34 ++++++++-
drivers/staging/fbtft/fbtft-core.c | 28 ++++++-
7 files changed, 305 insertions(+), 31 deletions(-)
create mode 100644 arch/arm64/boot/dts/rockchip/overlays/hw_intfc.conf
create mode 100644 arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35b-v2-overlay.dts
create mode 100644 arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35c-overlay.dts
diff --git a/arch/arm64/boot/dts/rockchip/overlays/Makefile b/arch/arm64/boot/dts/rockchip/overlays/Makefile
index bb410648950b..d5d8f9daff46 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlays/Makefile
@@ -7,7 +7,9 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
at24c02.dtbo \
devspi1.dtbo \
devspi2.dtbo \
- pcie-gen2.dtbo
+ pcie-gen2.dtbo \
+ spi1-waveshare35c.dtbo \
+ spi1-waveshare35b-v2.dtbo
targets += dtbs dtbs_install
targets += $(dtbo-y)
diff --git a/arch/arm64/boot/dts/rockchip/overlays/README b/arch/arm64/boot/dts/rockchip/overlays/README
index 237e77569f56..6dbd301f32fc 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/README
+++ b/arch/arm64/boot/dts/rockchip/overlays/README
@@ -110,41 +110,61 @@ N.B. It is recommended to only ebable those bus interfaces that are needed.
Leaving all interfaces enabled can lead to unwanted behaviour.
-Name: at24c02
-Info: Overlay for activation of Atmel AT24C02 over I2C
-Load: intfc:dtoverlay=at24c02
+Name: at24c02
+Info: Overlay for activation of Atmel AT24C02 over I2C
+Load: intfc:dtoverlay=at24c02
-Name: two-color-led
-Info: Overlay for activation of two color led module.
-Load: intfc:dtoverlay=two-color-led
+Name: two-color-led
+Info: Overlay for activation of two color led module.
+Load: intfc:dtoverlay=two-color-led
-Name: console-on-ttyS2
-Info: By default, fiq debugger console is disabled.
- When this dtbo file is loaded, Rock Pi enables fiq debugger console.
- ttyS2 Pins will output console information.
- At the same time, it is recommended that you set UART2 to off in
- file /boot/hw_intfc.conf and do not load console-on-ttyS4.dtbo file.
-Load: intfc:dtoverlay=console-on-ttyS2
+Name: console-on-ttyS2
+Info: By default, fiq debugger console is disabled.
+ When this dtbo file is loaded, Rock Pi enables fiq debugger console.
+ ttyS2 Pins will output console information.
+ At the same time, it is recommended that you set UART2 to off in
+ file /boot/hw_intfc.conf and do not load console-on-ttyS4.dtbo file.
+Load: intfc:dtoverlay=console-on-ttyS2
-Name: console-on-ttyS4
-Info: By default, fiq debugger console is disabled.
- When this dtbo file is loaded, Rock Pi enables fiq debugger console.
- ttyS4 Pins will output console information.
- At the same time, it is recommended that you set UART4 to off in
- file /boot/hw_intfc.conf and do not load console-on-ttyS2.dtbo file.
-Load: intfc:dtoverlay=console-on-ttyS4
+Name: console-on-ttyS4
+Info: By default, fiq debugger console is disabled.
+ When this dtbo file is loaded, Rock Pi enables fiq debugger console.
+ ttyS4 Pins will output console information.
+ At the same time, it is recommended that you set UART4 to off in
+ file /boot/hw_intfc.conf and do not load console-on-ttyS2.dtbo file.
+Load: intfc:dtoverlay=console-on-ttyS4
-Name: devspi1
-Info: By default, spi1 is disabled.
- when use spi1, uart4 must be disabled.
-Load: intfc:dtoverlay=devspi1
+Name: devspi1
+Info: Overlay for activation of dummy spi device on SPI1 for test.
+ Need set: intfc:spi1=on
+ By default, spi1 is disabled.
+ when use spi1, uart4 must be disabled.
+Load: intfc:dtoverlay=devspi1
+
Name: devspi2
-Info: By default, spi2 is disabled.
- When use spi2. i2c6 must be disabled.
-Load: intfc:dtoverlay=devspi2
+Info: Overlay for activation of dummy spi device on SPI2 for test.
+ Need set: intfc:spi2=on
+ When use spi2. i2c6 must be disabled.
+Load: intfc:dtoverlay=devspi2
+
+
+Name: pcie-gen2
+Info: Overlay for activation of pcie running on GEN2 mode.
+Load: intfc:dtoverlay=pcie-gen2
+
+
+Name: spi1-waveshare35b-v2
+Info: Overlay for activation of waveshare 3.5inch lcd(B v2).
+ Need set: intfc:uart4=off intfc:spi1=on
+Load: intfc:dtoverlay=spi1-0waveshare35b-v2
+
+Name: spi1-waveshare35c
+Info: Overlay for activation of waveshare 3.5inch lcd(C).
+ Need set: intfc:uart4=off intfc:spi1=on
+Load: intfc:dtoverlay=spi1-waveshare35c
diff --git a/arch/arm64/boot/dts/rockchip/overlays/hw_intfc.conf b/arch/arm64/boot/dts/rockchip/overlays/hw_intfc.conf
new file mode 100644
index 000000000000..6c5bbf6088be
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/hw_intfc.conf
@@ -0,0 +1,45 @@
+
+# Hardware Interface Config
+
+# For more details, check https://wiki.radxa.com/Rockpi4/hardware/devtree_overlays.
+
+# Set "on" to enable the optional hardware interfaces while set "off" to disable.
+
+intfc:pwm0=off
+intfc:pwm1=off
+intfc:uart2=off
+intfc:uart4=off
+intfc:spi1=off
+intfc:spi2=off
+intfc:i2c2=off
+intfc:i2c6=off
+intfc:i2c7=off
+
+# Devicetree Overlay Enable, uncomment to enable .dtbo under /boot/overlays/.
+
+# EEPROM on I2C2
+#intfc:dtoverlay=at24c02
+
+# Serial console on UART2
+intfc:dtoverlay=console-on-ttyS2
+
+# Serial console on UART4
+#intfc:dtoverlay=console-on-ttyS4
+
+# Dummy spi device on SPI1 for test. Need set: intfc:spi1=on
+#intfc:dtoverlay=devspi1
+
+# Dummy spi device on SPI2 for test. Need set: intfc:spi2=on
+#intfc:dtoverlay=devspi2
+
+# PCIE running on GEN2 mode
+#intfc:dtoverlay=pcie-gen2
+
+# ALLNET 4duino B10/B11 two-coloe-led module on 40-pin Header Pin#35 and Pin#36
+#intfc:dtoverlay=two-color-led
+
+# waveshare 3.5inch lcd (B v2) on SPI1. Need set: intfc:uart4=off intfc:spi1=on
+#intfc:dtoverlay=spi1-waveshare35b-v2
+
+# waveshare 3.5inch lcd (C) on SPI1. Need set: intfc:uart4=off intfc:spi1=on
+#intfc:dtoverlay=spi1-waveshare35c
diff --git a/arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35b-v2-overlay.dts b/arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35b-v2-overlay.dts
new file mode 100644
index 000000000000..0b3ece11d9e8
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35b-v2-overlay.dts
@@ -0,0 +1,76 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ model = "ROCK PI 4B";
+ compatible = "rockchip,rockpi","rockchip,rk3399";
+
+ fragment@0 {
+ target = <&gpio4>;
+
+ __overlay__ {
+ waveshare35b_v2_pins: waveshare35b_v2_pins {
+ rockchip,pins = <4 18 0 &pcfg_pull_none>,
+ <4 28 0 &pcfg_pull_none>,
+ <4 29 0 &pcfg_pull_none>;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&spi1>;
+
+ __overlay__ {
+ status = "okay";
+ max-freq = <48000000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ waveshare35b_v2@0 {
+ compatible = "ilitek,ili9486";
+ status = "okay";
+ reg = <0>;
+ id = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&waveshare35b_v2_pins>;
+ spi-max-frequency = <15000000>;
+ txbuflen = <32768>;
+ rotate = <270>;
+ bgr = <0>;
+ fps = <30>;
+ buswidth = <8>;
+ regwidth = <16>;
+ reset-gpios = <&gpio4 29 0>;
+ dc-gpios = <&gpio4 28 0>;
+ debug = <0>;
+ init = <0x10000b0 0x0
+ 0x1000011
+ 0x20000ff
+ 0x1000021
+ 0x100003a 0x55
+ 0x10000c2 0x33
+ 0x10000c5 0x0 0x1e 0x80
+ 0x1000036 0x28
+ 0x10000b1 0xb0
+ 0x10000e0 0x0 0x13 0x18 0x4 0xf 0x6 0x3a 0x56 0x4d 0x3 0xa 0x6 0x30 0x3e 0xf
+ 0x10000e1 0x0 0x13 0x18 0x1 0x11 0x6 0x38 0x34 0x4d 0x6 0xd 0xb 0x31 0x37 0xf
+ 0x1000011
+ 0x20000ff
+ 0x1000029>;
+ };
+ waveshare35b_v2@1 {
+ compatible = "ti,ads7846";
+ status = "okay";
+ reg = <1>;
+ id = <1>;
+ spi-max-frequency = <2000000>;
+ interrupts = <18 2>;
+ interrupt-parent = <&gpio4>;
+ pendown-gpio = <&gpio4 18 0>;
+ ti,x-plate-ohms = /bits/ 16 <60>;/*[00 3c];*/
+ ti,pressure-max = /bits/ 16 <255>;/*[00 ff];*/
+ ti,swap-xy = <0>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35c-overlay.dts b/arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35c-overlay.dts
new file mode 100644
index 000000000000..0c71cb966982
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/spi1-waveshare35c-overlay.dts
@@ -0,0 +1,75 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ model = "ROCK PI 4B";
+ compatible = "rockchip,rockpi","rockchip,rk3399";
+
+ fragment@0 {
+ target = <&gpio4>;
+
+ __overlay__ {
+ waveshare35c_pins: waveshare35c_pins {
+ rockchip,pins = <4 18 0 &pcfg_pull_none>,
+ <4 28 0 &pcfg_pull_none>,
+ <4 29 0 &pcfg_pull_none>;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&spi1>;
+
+ __overlay__ {
+ status = "okay";
+ max-freq = <48000000>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ waveshare35c@0 {
+ compatible = "ilitek,ili9486";
+ status = "okay";
+ reg = <0>;
+ id = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&waveshare35c_pins>;
+ spi-max-frequency = <15000000>;
+ txbuflen = <32768>;
+ rotate = <270>;
+ bgr = <0>;
+ fps = <30>;
+ buswidth = <8>;
+ regwidth = <16>;
+ reset-gpios = <&gpio4 29 0>;
+ dc-gpios = <&gpio4 28 0>;
+ debug = <0>;
+ init = <0x10000b0 0x00
+ 0x1000011
+ 0x20000ff
+ 0x100003a 0x55
+ 0x1000036 0x28
+ 0x10000c2 0x44
+ 0x10000c5 0x00 0x00 0x00 0x00
+ 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
+ 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
+ 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
+ 0x1000036 0x28
+ 0x1000011
+ 0x1000029>;
+ };
+ waveshare35c@1 {
+ compatible = "ti,ads7846";
+ status = "okay";
+ reg = <1>;
+ id = <1>;
+ spi-max-frequency = <2000000>;
+ interrupts = <18 2>;
+ interrupt-parent = <&gpio4>;
+ pendown-gpio = <&gpio4 18 0>;
+ ti,x-plate-ohms = /bits/ 16 <60>;/*[00 3c];*/
+ ti,pressure-max = /bits/ 16 <255>;/*[00 ff];*/
+ ti,swap-xy = <0>;
+ };
+ };
+ };
+};
diff --git a/drivers/staging/fbtft/fbtft-core.c b/drivers/staging/fbtft/fbtft-core.c
index 18c2b6daf588..41351d48bda4 100644
--- a/drivers/staging/fbtft/fbtft-core.c
+++ b/drivers/staging/fbtft/fbtft-core.c
@@ -44,7 +44,7 @@ module_param(debug, ulong, 0);
MODULE_PARM_DESC(debug, "override device debug level");
#ifdef CONFIG_HAS_DMA
-static bool dma = true;
+static bool dma = false;
module_param(dma, bool, 0);
MODULE_PARM_DESC(dma, "Use DMA buffer");
#endif
@@ -666,6 +666,8 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
char *gamma = display->gamma;
unsigned long *gamma_curves = NULL;
+ printk("#fbtft# start fbtft_framebuffer_alloc...\n");
+
/* sanity check */
if (display->gamma_num * display->gamma_len > FBTFT_GAMMA_MAX_VALUES_TOTAL) {
dev_err(dev, "FBTFT_GAMMA_MAX_VALUES_TOTAL=%d is exceeded\n",
@@ -673,6 +675,8 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
return NULL;
}
+ printk("#fbtft# set fps or bpp...\n");
+
/* defaults */
if (!fps)
fps = 20;
@@ -684,6 +688,8 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
return NULL;
}
+ printk("#fbtft# override driver values...\n");
+
/* override driver values? */
if (pdata->fps)
fps = pdata->fps;
@@ -720,23 +726,33 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
height = display->height;
}
+ printk("#fbtft# alloc 1...\n");
+
vmem_size = display->width * display->height * bpp / 8;
vmem = vzalloc(vmem_size);
if (!vmem)
goto alloc_fail;
+ printk("#fbtft# alloc 2...\n");
+
fbops = devm_kzalloc(dev, sizeof(struct fb_ops), GFP_KERNEL);
if (!fbops)
goto alloc_fail;
+ printk("#fbtft# alloc 3...\n");
+
fbdefio = devm_kzalloc(dev, sizeof(struct fb_deferred_io), GFP_KERNEL);
if (!fbdefio)
goto alloc_fail;
+ printk("#fbtft# alloc 4...\n");
+
buf = devm_kzalloc(dev, 128, GFP_KERNEL);
if (!buf)
goto alloc_fail;
+ printk("#fbtft# alloc 5...\n");
+
if (display->gamma_num && display->gamma_len) {
gamma_curves = devm_kzalloc(dev, display->gamma_num * display->gamma_len * sizeof(gamma_curves[0]),
GFP_KERNEL);
@@ -744,6 +760,8 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
goto alloc_fail;
}
+ printk("#fbtft# alloc 6...\n");
+
info = framebuffer_alloc(sizeof(struct fbtft_par), dev);
if (!info)
goto alloc_fail;
@@ -810,6 +828,8 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
mutex_init(&par->gamma.lock);
info->pseudo_palette = par->pseudo_palette;
+ printk("#fbtft# alloc 6...\n");
+
if (par->gamma.curves && gamma) {
if (fbtft_gamma_parse_str(par,
par->gamma.curves, gamma, strlen(gamma)))
@@ -825,14 +845,18 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
txbuflen = PAGE_SIZE; /* need buffer for byteswapping */
#endif
+ printk("#fbtft# alloc 7...\n");
+
if (txbuflen > 0) {
#ifdef CONFIG_HAS_DMA
if (dma) {
+ printk("#fbtft# alloc 8...\n");
dev->coherent_dma_mask = ~0;
txbuf = dmam_alloc_coherent(dev, txbuflen, &par->txbuf.dma, GFP_DMA);
} else
#endif
{
+ printk("#fbtft# alloc 9...\n");
txbuf = devm_kzalloc(par->info->device, txbuflen, GFP_KERNEL);
}
if (!txbuf)
@@ -841,6 +865,8 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display,
par->txbuf.len = txbuflen;
}
+ printk("#fbtft# alloc 10...\n");
+
/* Initialize gpios to disabled */
par->gpio.reset = -1;
par->gpio.dc = -1;
--
2.25.1
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