53 lines
1.8 KiB
Diff
53 lines
1.8 KiB
Diff
From 6b4b2af5d288e40664c2fced8315a9112fe2d6d5 Mon Sep 17 00:00:00 2001
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From: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
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Date: Wed, 28 Jul 2021 20:00:40 -0300
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Subject: [PATCH 030/478] arm64: dts: rockchip: Add VPU support for the PX30
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The PX30 has a VPU (both decoder and encoder) with a dedicated IOMMU.
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Describe these two entities in device-tree.
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Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
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Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
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Link: https://lore.kernel.org/r/20210728230040.17368-1-ezequiel@collabora.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/px30.dtsi | 22 ++++++++++++++++++++++
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1 file changed, 22 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
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index 6e53a4cc75e6..185bcc5c16ac 100644
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--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
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@@ -1037,6 +1037,28 @@ gpu: gpu@ff400000 {
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status = "disabled";
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};
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+ vpu: video-codec@ff442000 {
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+ compatible = "rockchip,px30-vpu";
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+ reg = <0x0 0xff442000 0x0 0x800>;
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+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "vepu", "vdpu";
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+ clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
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+ clock-names = "aclk", "hclk";
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+ iommus = <&vpu_mmu>;
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+ power-domains = <&power PX30_PD_VPU>;
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+ };
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+
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+ vpu_mmu: iommu@ff442800 {
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+ compatible = "rockchip,iommu";
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+ reg = <0x0 0xff442800 0x0 0x100>;
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+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
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+ clock-names = "aclk", "iface";
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+ #iommu-cells = <0>;
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+ power-domains = <&power PX30_PD_VPU>;
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+ };
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+
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dsi: dsi@ff450000 {
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compatible = "rockchip,px30-mipi-dsi";
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reg = <0x0 0xff450000 0x0 0x10000>;
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--
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2.35.3
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