142 lines
3.9 KiB
Diff
142 lines
3.9 KiB
Diff
From 66f47714f6b2641fbbc65fb4161bff9b2087a62c Mon Sep 17 00:00:00 2001
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From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Date: Thu, 4 May 2023 23:06:41 +0300
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Subject: [PATCH 445/469] dt-bindings: nvmem: Convert rockchip-otp.txt to
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dt-schema
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Convert the Rockchip OTP memory bindings to dt-schema.
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Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
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Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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---
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.../bindings/nvmem/rockchip,otp.yaml | 82 +++++++++++++++++++
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.../bindings/nvmem/rockchip-otp.txt | 25 ------
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2 files changed, 82 insertions(+), 25 deletions(-)
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create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml
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delete mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
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diff --git a/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml
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new file mode 100644
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index 000000000000..4cd425ae2823
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/nvmem/rockchip,otp.yaml
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@@ -0,0 +1,82 @@
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+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/nvmem/rockchip,otp.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Rockchip internal OTP (One Time Programmable) memory
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+
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+maintainers:
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+ - Heiko Stuebner <heiko@sntech.de>
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+
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+allOf:
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+ - $ref: nvmem.yaml#
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+
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+properties:
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+ compatible:
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+ enum:
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+ - rockchip,px30-otp
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+ - rockchip,rk3308-otp
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+
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+ reg:
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+ maxItems: 1
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+
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+ clocks:
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+ maxItems: 3
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+
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+ clock-names:
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+ items:
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+ - const: otp
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+ - const: apb_pclk
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+ - const: phy
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+
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+ resets:
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+ maxItems: 1
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+
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+ reset-names:
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+ items:
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+ - const: phy
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+
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+required:
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+ - compatible
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+ - reg
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+ - clocks
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+ - clock-names
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+ - resets
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+ - reset-names
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+
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+unevaluatedProperties: false
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+
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+examples:
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+ - |
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+ #include <dt-bindings/clock/px30-cru.h>
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+
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+ soc {
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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+
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+ otp: efuse@ff290000 {
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+ compatible = "rockchip,px30-otp";
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+ reg = <0x0 0xff290000 0x0 0x4000>;
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+ clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
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+ <&cru PCLK_OTP_PHY>;
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+ clock-names = "otp", "apb_pclk", "phy";
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+ resets = <&cru SRST_OTP_PHY>;
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+ reset-names = "phy";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ cpu_id: id@7 {
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+ reg = <0x07 0x10>;
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+ };
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+
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+ cpu_leakage: cpu-leakage@17 {
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+ reg = <0x17 0x1>;
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+ };
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+
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+ performance: performance@1e {
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+ reg = <0x1e 0x1>;
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+ bits = <4 3>;
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+ };
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+ };
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+ };
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diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
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deleted file mode 100644
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index 40f649f7c2e5..000000000000
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--- a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt
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+++ /dev/null
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@@ -1,25 +0,0 @@
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-Rockchip internal OTP (One Time Programmable) memory device tree bindings
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-
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-Required properties:
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-- compatible: Should be one of the following.
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- - "rockchip,px30-otp" - for PX30 SoCs.
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- - "rockchip,rk3308-otp" - for RK3308 SoCs.
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-- reg: Should contain the registers location and size
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-- clocks: Must contain an entry for each entry in clock-names.
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-- clock-names: Should be "otp", "apb_pclk" and "phy".
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-- resets: Must contain an entry for each entry in reset-names.
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- See ../../reset/reset.txt for details.
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-- reset-names: Should be "phy".
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-
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-See nvmem.txt for more information.
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-
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-Example:
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- otp: otp@ff290000 {
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- compatible = "rockchip,px30-otp";
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- reg = <0x0 0xff290000 0x0 0x4000>;
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- #address-cells = <1>;
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- #size-cells = <1>;
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- clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
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- <&cru PCLK_OTP_PHY>;
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- clock-names = "otp", "apb_pclk", "phy";
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- };
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--
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2.34.1
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