219 lines
5.1 KiB
Diff
219 lines
5.1 KiB
Diff
new file mode 100644
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index 00000000..cf3462ea
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--- /dev/null
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+++ b/configs/roc-pc-plus-rk3399_defconfig
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@@ -0,0 +1,88 @@
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+CONFIG_ARM=y
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+CONFIG_SKIP_LOWLEVEL_INIT=y
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SYS_TEXT_BASE=0x00200000
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+CONFIG_SPL_GPIO=y
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_ENV_SIZE=0x8000
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+CONFIG_ENV_OFFSET=0x3F8000
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+CONFIG_ENV_SECT_SIZE=0x1000
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+CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-plus"
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+CONFIG_ROCKCHIP_RK3399=y
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+CONFIG_TARGET_ROC_PC_RK3399=y
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+CONFIG_DEBUG_UART_BASE=0xFF1A0000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_SPL_SPI_FLASH_SUPPORT=y
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+CONFIG_SPL_SPI=y
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+CONFIG_DEBUG_UART=y
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+CONFIG_SYS_LOAD_ADDR=0x800800
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+# CONFIG_ANDROID_BOOT_IMAGE is not set
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-plus.dtb"
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+CONFIG_SPL_STACK_R=y
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+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000
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+CONFIG_SPL_ENV_SUPPORT=y
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+CONFIG_SPL_SPI_LOAD=y
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+CONFIG_TPL=y
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+CONFIG_CMD_BOOTZ=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_PCI=y
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+CONFIG_CMD_USB=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_TIME=y
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+CONFIG_SPL_OF_CONTROL=y
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+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+CONFIG_ENV_IS_IN_SPI_FLASH=y
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+CONFIG_SPL_DM_SEQ_ALIAS=y
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_MISC=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_MMC_SDHCI=y
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+CONFIG_MMC_SDHCI_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_BUS=1
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+CONFIG_SPI_FLASH_WINBOND=y
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+CONFIG_DM_ETH=y
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+CONFIG_ETH_DESIGNWARE=y
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+CONFIG_GMAC_ROCKCHIP=y
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+CONFIG_NVME=y
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+CONFIG_PCI=y
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+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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+CONFIG_PHY_ROCKCHIP_TYPEC=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_REGULATOR_PWM=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_PWM_ROCKCHIP=y
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+# CONFIG_RAM_ROCKCHIP_DEBUG is not set
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+CONFIG_RAM_RK3399_LPDDR4=y
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+CONFIG_DM_RESET=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_ROCKCHIP_SPI=y
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+CONFIG_SYSRESET=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_EHCI_GENERIC=y
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+CONFIG_USB_DWC3=y
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+CONFIG_USB_DWC3_GENERIC=y
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+CONFIG_ROCKCHIP_USB2_PHY=y
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+CONFIG_USB_KEYBOARD=y
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+CONFIG_USB_GADGET=y
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+CONFIG_USB_HOST_ETHER=y
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+CONFIG_USB_ETHER_ASIX=y
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+CONFIG_USB_ETHER_ASIX88179=y
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+CONFIG_USB_ETHER_MCS7830=y
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+CONFIG_USB_ETHER_RTL8152=y
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+CONFIG_USB_ETHER_SMSC95XX=y
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+CONFIG_DM_VIDEO=y
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+CONFIG_DISPLAY=y
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+CONFIG_VIDEO_ROCKCHIP=y
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+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
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+CONFIG_SPL_TINY_MEMSET=y
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+CONFIG_ERRNO_STR=y
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -144,6 +144,7 @@
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rk3399-puma-haikou.dtb \
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rk3399-roc-pc.dtb \
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rk3399-roc-pc-mezzanine.dtb \
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+ rk3399-roc-pc-plus.dtb \
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rk3399-rock-pi-4a.dtb \
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rk3399-rock-pi-4b.dtb \
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rk3399-rock-pi-4c.dtb \
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new file mode 100644
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index 00000000..02a8f9f5
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-roc-pc-plus.dts
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@@ -0,0 +1,92 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
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+ */
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+
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+/dts-v1/;
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+#include "rk3399-roc-pc.dtsi"
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+
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+/ {
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+ model = "Firefly ROC-RK3399-PC-PLUS Board";
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+ compatible = "firefly,roc-rk3399-pc-plus", "rockchip,rk3399";
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+
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+ vcc3v3_ngff: vcc3v3-ngff {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_ngff";
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+ enable-active-high;
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+ gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc3v3_ngff_en>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&dc_12v>;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_pcie";
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+ enable-active-high;
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+ gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc3v3_pcie_en>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&dc_12v>;
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+ };
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+};
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+
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+&pcie_phy {
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+ status = "okay";
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+};
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+
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+&pcie0 {
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+ ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
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+ num-lanes = <4>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_perst>;
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+ vpcie3v3-supply = <&vcc3v3_pcie>;
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+ vpcie1v8-supply = <&vcc1v8_pmu>;
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+ vpcie0v9-supply = <&vcca_0v9>;
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+ status = "okay";
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+};
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+
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+&pinctrl {
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+ ngff {
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+ vcc3v3_ngff_en: vcc3v3-ngff-en {
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+ rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ pcie {
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+ vcc3v3_pcie_en: vcc3v3-pcie-en {
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+ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ pcie_perst: pcie-perst {
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+ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+};
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+
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+&sdio0 {
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+ bus-width = <4>;
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+ cap-sd-highspeed;
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+ cap-sdio-irq;
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+ keep-power-in-suspend;
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+ mmc-pwrseq = <&sdio_pwrseq>;
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+ non-removable;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
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+ sd-uhs-sdr104;
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+ vmmc-supply = <&vcc3v3_ngff>;
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+ vqmmc-supply = <&vcc_1v8>;
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+ status = "okay";
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
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+ status = "okay";
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+};
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new file mode 100644
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index 00000000..02a8f9f5
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--- /dev/null
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+++ b/arch/arm/dts/rk3399-roc-pc-plus-u-boot.dtsi
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@@ -0,0 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * Copyright (c) 2020 Amarula Solutions(India)
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+ */
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+
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+#include "rk3399-roc-pc-u-boot.dtsi"
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