61 lines
1.5 KiB
Diff
61 lines
1.5 KiB
Diff
From 6ed323304dfb43ad2741f4e01a79299203c1d21d Mon Sep 17 00:00:00 2001
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From: Hyeonki Hong <hhk7734@gmail.com>
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Date: Tue, 14 Apr 2020 14:11:30 +0900
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Subject: [PATCH 19/74] ODROID-C4: arm64/dts: add spicc0 node
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Change-Id: I6ccc3714fce677b1eb104c10f657739320f3772f
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(cherry picked from commit e50729e07786d6ee611e0bcfafbfd7b352c9e9ac)
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---
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.../boot/dts/amlogic/meson-sm1-odroid-c4.dts | 28 +++++++++++++++++++
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1 file changed, 28 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
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index 4dbdf049c87c..8d3523c163c5 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
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+++ b/arch/arm64/boot/dts/amlogic/meson-sm1-odroid-c4.dts
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@@ -18,6 +18,7 @@ aliases {
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ethernet0 = ðmac;
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serial0 = &uart_AO;
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serial1 = &uart_A;
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+ spi0 = &spicc0;
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};
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chosen {
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@@ -466,6 +467,33 @@ &sd_emmc_c {
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vqmmc-supply = <&flash_1v8>;
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};
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+&spicc0 {
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+ status = "okay";
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+
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+ /*
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+ * 40 Pin Header : MOSI(GPIOX.8->19 Pin),
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+ * MISO(GPIOX.9->21 Pin),
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+ * SPI0_CLK(GPIOX.11->23 Pin)
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+ * SPI_CS0(GPIOX.10->24 Pin)
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+ * SPI_CS1(GPIOH.6->26 Pin)
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+ */
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+ pinctrl-names = "default","gpio_periphs";
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+ pinctrl-0 = <&spicc0_x_pins>;
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+ pinctrl-1 = <&spicc0_ss0_x_pins>;
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+ num_chipselect = <1>;
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+
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+ cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>;
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+
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+ spidev@0 {
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+ status = "okay";
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+
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+ compatible = "linux,spidev";
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+ /* spi default max clock 100Mhz */
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+ spi-max-frequency = <100000000>;
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+ reg = <0>;
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+ };
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+};
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+
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&tdmif_b {
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status = "okay";
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};
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--
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2.25.1
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