build/patch/kernel/archive/rk3568-odroid-6.5/board-odroidm1-spi-uart-pwm.patch

57 lines
1.4 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Joao Assuncao <joao@joaoassuncao.com>
Date: Sun, 12 Feb 2023 21:20:35 +0100
Subject: Adds i2c3, pwm1, pwdm2, spi0 and uart1 disabled nodes to
rk3568-odroid-m1.dts
rpardini: this prepares base nodes for overlays
---
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts | 34 ++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
index a337f547caf5..2cb03c95a0f4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
@@ -739,3 +739,37 @@ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
remote-endpoint = <&hdmi_in_vp0>;
};
};
+
+&i2c3 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3m1_xfer>;
+};
+
+&pwm1 {
+ status = "disabled";
+ pinctrl-0 = <&pwm1m1_pins>;
+};
+
+&pwm2 {
+ status = "disabled";
+ pinctrl-0 = <&pwm2m1_pins>;
+};
+
+&spi0 {
+ status = "disabled";
+
+ pinctrl-0 = <&spi0m1_pins>;
+ pinctrl-1 = <&spi0m1_pins_hs>;
+ num_chipselect = <1>;
+
+ cs-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+};
+
+&uart1 {
+ status = "disabled";
+ dma-names = "tx", "rx";
+ /* uart1 uart1-with-ctsrts */
+ pinctrl-0 = <&uart1m1_xfer>;
+ pinctrl-1 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
+};
--
Armbian