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c97506efcc
build/patch/kernel/archive/rockchip-4.4/145_rockchip_tinker_touchscreen.patch

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diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
index d0c42be..3d7e74e 100644
--- a/arch/arm/boot/dts/rk3288-miniarm.dts
+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
@@ -223,6 +223,15 @@
status = "ok";
};
+&dsi0{
+ status = "okay";
+ mipi_panel: mipi-panel {
+ compatible ="asus,tc358762";
+ reg = <0>;
+ status = "okay";
+ };
+};
+
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
@@ -449,6 +458,16 @@
&i2c3 {
status = "okay";
+
+ tinker_ft5406:tinker_ft5406@38 {
+ compatible = "tinker_ft5406";
+ reg = <0x38>;
+ };
+
+ tinker_mcu:tinker_mcu@45 {
+ compatible = "tinker_mcu";
+ reg = <0x45>;
+ };
};
&i2c4 {
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 39747ff..c852640 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -46,6 +46,7 @@
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/power/rk3288-power.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/suspend/rockchip-rk3288.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include "skeleton64.dtsi"
diff --git a/drivers/Kconfig b/drivers/Kconfig
index a1a41f2..5d85e38 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -204,4 +204,6 @@ source "drivers/rk_nand/Kconfig"
source "drivers/headset_observe/Kconfig"
+source "drivers/tinkerboard/Kconfig"
+
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index e0bbaa27..4d00308c 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -180,3 +180,5 @@ obj-$(CONFIG_RK_NAND) += rk_nand/
obj-$(CONFIG_RK_HEADSET) += headset_observe/
obj-$(CONFIG_RK_FLASH) += rkflash/
obj-y += rk_nand/
+
+obj-y += tinkerboard/
\ No newline at end of file
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b58f922..a6a30ca 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -59,5 +59,6 @@ obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
obj-$(CONFIG_CXL_BASE) += cxl/
obj-$(CONFIG_UID_SYS_STATS) += uid_sys_stats.o
+obj-$(CONFIG_TINKER_MCU) += tinker_mcu.o
obj-$(CONFIG_MEMORY_STATE_TIME) += memory_state_time.o
obj-$(CONFIG_USB_CAM_GPIO) += usb_cam_gpio.o
diff --git a/drivers/misc/tinker_mcu.c b/drivers/misc/tinker_mcu.c
new file mode 100644
index 0000000..e1929ea
--- /dev/null
+++ b/drivers/misc/tinker_mcu.c
@@ -0,0 +1,232 @@
+/*
+ *
+ * Tinker board Touchscreen MCU driver.
+ *
+ * Copyright (c) 2016 ASUSTek Computer Inc.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/workqueue.h>
+#include "tinker_mcu.h"
+
+static struct tinker_mcu_data *g_mcu_data;
+static int connected = 0;
+
+static int is_hex(char num)
+{
+ //0-9, a-f, A-F
+ if ((47 < num && num < 58) || (64 < num && num < 71) || (96 < num && num < 103))
+ return 1;
+ return 0;
+}
+
+static int string_to_byte(const char *source, unsigned char *destination, int size)
+{
+ int i = 0, counter = 0;
+ char c[3] = {0};
+ unsigned char bytes;
+
+ if (size%2 == 1)
+ return -EINVAL;
+
+ for(i = 0; i < size; i++){
+ if(!is_hex(source[i])) {
+ return -EINVAL;
+ }
+ if(0 == i%2){
+ c[0] = source[i];
+ c[1] = source[i+1];
+ sscanf(c, "%hhx", &bytes);
+ destination[counter] = bytes;
+ counter++;
+ }
+ }
+ return 0;
+}
+
+static int send_cmds(struct i2c_client *client, const char *buf)
+{
+ int ret, size = strlen(buf);
+ unsigned char byte_cmd[size/2];
+
+ if ((size%2) != 0) {
+ LOG_ERR("size should be even\n");
+ return -EINVAL;
+ }
+
+ LOG_INFO("%s\n", buf);
+
+ string_to_byte(buf, byte_cmd, size);
+
+ ret = i2c_master_send(client, byte_cmd, size/2);
+ if (ret <= 0) {
+ LOG_ERR("send command failed, ret = %d\n", ret);
+ return ret!=0 ? ret : -ECOMM;
+ }
+ msleep(20);
+ return 0;
+}
+
+static int recv_cmds(struct i2c_client *client, char *buf, int size)
+{
+ int ret;
+
+ ret = i2c_master_recv(client, buf, size);
+ if (ret <= 0) {
+ LOG_ERR("receive commands failed, %d\n", ret);
+ return ret!=0 ? ret : -ECOMM;
+ }
+ msleep(20);
+ return 0;
+}
+
+static int init_cmd_check(struct tinker_mcu_data *mcu_data)
+{
+ int ret;
+ char recv_buf[1] = {0};
+
+ ret = send_cmds(mcu_data->client, "80");
+ if (ret < 0)
+ goto error;
+
+ recv_cmds(mcu_data->client, recv_buf, 1);
+ if (ret < 0)
+ goto error;
+
+ LOG_INFO("recv_cmds: 0x%X\n", recv_buf[0]);
+ if (recv_buf[0] != 0xC3) {
+ LOG_ERR("read wrong info\n");
+ ret = -EINVAL;
+ goto error;
+
+ }
+ return 0;
+
+error:
+ return ret;
+}
+
+int tinker_mcu_screen_power_up(void)
+{
+ if (!connected)
+ return -ENODEV;
+
+ LOG_INFO("\n");
+ send_cmds(g_mcu_data->client, "8500");
+ msleep(800);
+ send_cmds(g_mcu_data->client, "8501");
+ send_cmds(g_mcu_data->client, "8104");
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(tinker_mcu_screen_power_up);
+
+int tinker_mcu_set_bright(int bright)
+{
+ unsigned char cmd[2];
+ int ret;
+
+ if (!connected)
+ return -ENODEV;
+
+ if (bright > 0xff || bright < 0)
+ return -EINVAL;
+
+ LOG_INFO("bright = 0x%x\n", bright);
+
+ cmd[0] = 0x86;
+ cmd[1] = bright;
+
+ ret = i2c_master_send(g_mcu_data->client, cmd, 2);
+ if (ret <= 0) {
+ LOG_ERR("send command failed, ret = %d\n", ret);
+ return ret != 0 ? ret : -ECOMM;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(tinker_mcu_set_bright);
+
+int tinker_mcu_is_connected(void)
+{
+ return connected;
+}
+EXPORT_SYMBOL_GPL(tinker_mcu_is_connected);
+
+static int tinker_mcu_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct tinker_mcu_data *mcu_data;
+ int ret;
+
+ LOG_INFO("address = 0x%x\n", client->addr);
+
+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+ LOG_ERR("I2C check functionality failed\n");
+ return -ENODEV;
+ }
+
+ mcu_data = kzalloc(sizeof(struct tinker_mcu_data), GFP_KERNEL);
+ if (mcu_data == NULL) {
+ LOG_ERR("no memory for device\n");
+ return -ENOMEM;
+ }
+
+ mcu_data->client = client;
+ i2c_set_clientdata(client, mcu_data);
+ g_mcu_data = mcu_data;
+
+ ret = init_cmd_check(mcu_data);
+ if (ret < 0) {
+ LOG_ERR("init_cmd_check failed, %d\n", ret);
+ goto error;
+ }
+ connected = 1;
+
+ return 0;
+
+error:
+ kfree(mcu_data);
+ return ret;
+}
+
+static int tinker_mcu_remove(struct i2c_client *client)
+{
+ struct tinker_mcu_data *mcu_data = i2c_get_clientdata(client);
+ connected = 0;
+ kfree(mcu_data);
+ return 0;
+}
+
+static const struct i2c_device_id tinker_mcu_id[] = {
+ {"tinker_mcu", 0},
+ {},
+};
+
+static struct i2c_driver tinker_mcu_driver = {
+ .driver = {
+ .name = "tinker_mcu",
+ },
+ .probe = tinker_mcu_probe,
+ .remove = tinker_mcu_remove,
+ .id_table = tinker_mcu_id,
+};
+module_i2c_driver(tinker_mcu_driver);
+
+MODULE_DESCRIPTION("Tinker Board TouchScreen MCU driver");
+MODULE_LICENSE("GPL v2");
\ No newline at end of file
diff --git a/drivers/misc/tinker_mcu.h b/drivers/misc/tinker_mcu.h
new file mode 100644
index 0000000..2a96ac1
--- /dev/null
+++ b/drivers/misc/tinker_mcu.h
@@ -0,0 +1,14 @@
+#ifndef _TINKER_MCU_H_
+#define _TINKER_MCU_H_
+
+#define LOG_INFO(fmt,arg...) pr_info("tinker-mcu: %s: "fmt, __func__, ##arg);
+#define LOG_ERR(fmt,arg...) pr_err("tinker-mcu: %s: "fmt, __func__, ##arg);
+
+#define MAX_I2C_LEN 255
+
+struct tinker_mcu_data {
+ struct device *dev;
+ struct i2c_client *client;
+};
+
+#endif
\ No newline at end of file
diff --git a/drivers/tinkerboard/Kconfig b/drivers/tinkerboard/Kconfig
new file mode 100644
index 0000000..660b55b
--- /dev/null
+++ b/drivers/tinkerboard/Kconfig
@@ -0,0 +1 @@
+source "drivers/tinkerboard/dsi/Kconfig"
\ No newline at end of file
diff --git a/drivers/tinkerboard/Makefile b/drivers/tinkerboard/Makefile
new file mode 100644
index 0000000..3288d03
--- /dev/null
+++ b/drivers/tinkerboard/Makefile
@@ -0,0 +1 @@
+obj-y += dsi/
\ No newline at end of file
diff --git a/drivers/tinkerboard/dsi/Kconfig b/drivers/tinkerboard/dsi/Kconfig
new file mode 100644
index 0000000..03027f5
--- /dev/null
+++ b/drivers/tinkerboard/dsi/Kconfig
@@ -0,0 +1,33 @@
+config DRM_PANEL_TOSHIBA_TC358762
+ tristate "support for toshiba tc358762"
+ depends on OF && I2C
+ depends on BACKLIGHT_CLASS_DEVICE
+ select VIDEOMODE_HELPERS
+ help
+ Say Y here if you want to enable support for toshiba tc358762 bridge.
+ To compile this driver as a module, choose M here.
+
+config ROCKCHIP_DW_MIPI_DSI2
+ tristate "Rockchip specific extensions for Synopsys DW MIPI DSI"
+ depends on DRM_ROCKCHIP
+ depends on !ROCKCHIP_DW_MIPI_DSI
+ select DRM_MIPI_DSI
+ help
+ This selects support for Rockchip SoC specific extensions
+ for the Synopsys DesignWare HDMI driver. If you want to
+ enable MIPI DSI on RK3288 based SoC, you should selet this
+ option.
+
+config TINKER_MCU
+ tristate "tinker mcu"
+ default y
+ depends on I2C
+ help
+ Control the power of touch screen for tinker board.
+
+config TOUCHSCREEN_TINKER_FT5406
+ tristate "tinker ft5406"
+ default y
+ depends on I2C
+ help
+Control ft5406 touch ic.
\ No newline at end of file
diff --git a/drivers/tinkerboard/dsi/Makefile b/drivers/tinkerboard/dsi/Makefile
new file mode 100644
index 0000000..378ebf5
--- /dev/null
+++ b/drivers/tinkerboard/dsi/Makefile
@@ -0,0 +1,4 @@
+obj-$(CONFIG_DRM_PANEL_TOSHIBA_TC358762) += panel-toshiba-tc358762.o
+obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI2) += dw-mipi-dsi.o
+#obj-$(CONFIG_TINKER_MCU) += tinker_mcu.o
+obj-$(CONFIG_TOUCHSCREEN_TINKER_FT5406) += tinker_ft5406.o
\ No newline at end of file
diff --git a/drivers/tinkerboard/dsi/dw-mipi-dsi.c b/drivers/tinkerboard/dsi/dw-mipi-dsi.c
new file mode 100644
index 0000000..c67786d
--- /dev/null
+++ b/drivers/tinkerboard/dsi/dw-mipi-dsi.c
@@ -0,0 +1,1295 @@
+/*
+ * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/clk.h>
+#include <linux/component.h>
+#include <linux/iopoll.h>
+#include <linux/math64.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
+#include <drm/drm_atomic_helper.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_crtc_helper.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_of.h>
+#include <drm/drm_panel.h>
+#include <drm/drmP.h>
+#include <video/mipi_display.h>
+
+#include "../../gpu/drm/rockchip/rockchip_drm_drv.h"
+#include "../../gpu/drm/rockchip/rockchip_drm_vop.h"
+
+#define DRIVER_NAME "dw-mipi-dsi"
+
+#define RK3288_GRF_SOC_CON6 0x025c
+#define RK3288_DSI0_SEL_VOP_LIT BIT(6)
+#define RK3288_DSI1_SEL_VOP_LIT BIT(9)
+
+#define RK3399_GRF_SOC_CON19 0x6250
+#define RK3399_DSI0_SEL_VOP_LIT BIT(0)
+#define RK3399_DSI1_SEL_VOP_LIT BIT(4)
+
+/* disable turnrequest, turndisable, forcetxstopmode, forcerxmode */
+#define RK3399_GRF_SOC_CON22 0x6258
+#define RK3399_GRF_DSI_MODE 0xffff0000
+
+#define DSI_VERSION 0x00
+#define DSI_PWR_UP 0x04
+#define RESET 0
+#define POWERUP BIT(0)
+
+#define DSI_CLKMGR_CFG 0x08
+#define TO_CLK_DIVIDSION(div) (((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVIDSION(div) (((div) & 0xff) << 0)
+
+#define DSI_DPI_VCID 0x0c
+#define DPI_VID(vid) (((vid) & 0x3) << 0)
+
+#define DSI_DPI_COLOR_CODING 0x10
+#define EN18_LOOSELY BIT(8)
+#define DPI_COLOR_CODING_16BIT_1 0x0
+#define DPI_COLOR_CODING_16BIT_2 0x1
+#define DPI_COLOR_CODING_16BIT_3 0x2
+#define DPI_COLOR_CODING_18BIT_1 0x3
+#define DPI_COLOR_CODING_18BIT_2 0x4
+#define DPI_COLOR_CODING_24BIT 0x5
+
+#define DSI_DPI_CFG_POL 0x14
+#define COLORM_ACTIVE_LOW BIT(4)
+#define SHUTD_ACTIVE_LOW BIT(3)
+#define HSYNC_ACTIVE_LOW BIT(2)
+#define VSYNC_ACTIVE_LOW BIT(1)
+#define DATAEN_ACTIVE_LOW BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM 0x18
+#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p) ((p) & 0xff)
+
+#define DSI_DBI_CFG 0x20
+#define DSI_DBI_CMDSIZE 0x28
+
+#define DSI_PCKHDL_CFG 0x2c
+#define EN_CRC_RX BIT(4)
+#define EN_ECC_RX BIT(3)
+#define EN_BTA BIT(2)
+#define EN_EOTP_RX BIT(1)
+#define EN_EOTP_TX BIT(0)
+
+#define DSI_MODE_CFG 0x34
+#define ENABLE_VIDEO_MODE 0
+#define ENABLE_CMD_MODE BIT(0)
+
+#define DSI_VID_MODE_CFG 0x38
+#define FRAME_BTA_ACK BIT(14)
+#define ENABLE_LOW_POWER (0x3f << 8)
+#define ENABLE_LOW_POWER_MASK (0x3f << 8)
+#define VID_MODE_TYPE_BURST_SYNC_PULSES 0x0
+#define VID_MODE_TYPE_BURST_SYNC_EVENTS 0x1
+#define VID_MODE_TYPE_BURST 0x2
+
+#define DSI_VID_PKT_SIZE 0x3c
+#define VID_PKT_SIZE(p) (((p) & 0x3fff) << 0)
+#define VID_PKT_MAX_SIZE 0x3fff
+
+#define DSI_VID_NUM_CHUMKS 0x40
+#define DSI_VID_NULL_PKT_SIZE 0x44
+#define DSI_VID_HSA_TIME 0x48
+#define DSI_VID_HBP_TIME 0x4c
+#define DSI_VID_HLINE_TIME 0x50
+#define DSI_VID_VSA_LINES 0x54
+#define DSI_VID_VBP_LINES 0x58
+#define DSI_VID_VFP_LINES 0x5c
+#define DSI_VID_VACTIVE_LINES 0x60
+#define DSI_CMD_MODE_CFG 0x68
+#define MAX_RD_PKT_SIZE_LP BIT(24)
+#define DCS_LW_TX_LP BIT(19)
+#define DCS_SR_0P_TX_LP BIT(18)
+#define DCS_SW_1P_TX_LP BIT(17)
+#define DCS_SW_0P_TX_LP BIT(16)
+#define GEN_LW_TX_LP BIT(14)
+#define GEN_SR_2P_TX_LP BIT(13)
+#define GEN_SR_1P_TX_LP BIT(12)
+#define GEN_SR_0P_TX_LP BIT(11)
+#define GEN_SW_2P_TX_LP BIT(10)
+#define GEN_SW_1P_TX_LP BIT(9)
+#define GEN_SW_0P_TX_LP BIT(8)
+#define EN_ACK_RQST BIT(1)
+#define EN_TEAR_FX BIT(0)
+
+#define CMD_MODE_ALL_LP (MAX_RD_PKT_SIZE_LP | \
+ DCS_LW_TX_LP | \
+ DCS_SR_0P_TX_LP | \
+ DCS_SW_1P_TX_LP | \
+ DCS_SW_0P_TX_LP | \
+ GEN_LW_TX_LP | \
+ GEN_SR_2P_TX_LP | \
+ GEN_SR_1P_TX_LP | \
+ GEN_SR_0P_TX_LP | \
+ GEN_SW_2P_TX_LP | \
+ GEN_SW_1P_TX_LP | \
+ GEN_SW_0P_TX_LP)
+
+#define DSI_GEN_HDR 0x6c
+#define GEN_HDATA(data) (((data) & 0xffff) << 8)
+#define GEN_HDATA_MASK (0xffff << 8)
+#define GEN_HTYPE(type) (((type) & 0xff) << 0)
+#define GEN_HTYPE_MASK 0xff
+
+#define DSI_GEN_PLD_DATA 0x70
+
+#define DSI_CMD_PKT_STATUS 0x74
+#define GEN_CMD_EMPTY BIT(0)
+#define GEN_CMD_FULL BIT(1)
+#define GEN_PLD_W_EMPTY BIT(2)
+#define GEN_PLD_W_FULL BIT(3)
+#define GEN_PLD_R_EMPTY BIT(4)
+#define GEN_PLD_R_FULL BIT(5)
+#define GEN_RD_CMD_BUSY BIT(6)
+
+#define DSI_TO_CNT_CFG 0x78
+#define HSTX_TO_CNT(p) (((p) & 0xffff) << 16)
+#define LPRX_TO_CNT(p) ((p) & 0xffff)
+
+#define DSI_BTA_TO_CNT 0x8c
+#define DSI_LPCLK_CTRL 0x94
+#define AUTO_CLKLANE_CTRL BIT(1)
+#define PHY_TXREQUESTCLKHS BIT(0)
+
+#define DSI_PHY_TMR_LPCLK_CFG 0x98
+#define PHY_CLKHS2LP_TIME(lbcc) (((lbcc) & 0x3ff) << 16)
+#define PHY_CLKLP2HS_TIME(lbcc) ((lbcc) & 0x3ff)
+
+#define DSI_PHY_TMR_CFG 0x9c
+#define PHY_HS2LP_TIME(lbcc) (((lbcc) & 0xff) << 24)
+#define PHY_LP2HS_TIME(lbcc) (((lbcc) & 0xff) << 16)
+#define MAX_RD_TIME(lbcc) ((lbcc) & 0x7fff)
+
+#define DSI_PHY_RSTZ 0xa0
+#define PHY_DISFORCEPLL 0
+#define PHY_ENFORCEPLL BIT(3)
+#define PHY_DISABLECLK 0
+#define PHY_ENABLECLK BIT(2)
+#define PHY_RSTZ 0
+#define PHY_UNRSTZ BIT(1)
+#define PHY_SHUTDOWNZ 0
+#define PHY_UNSHUTDOWNZ BIT(0)
+
+#define DSI_PHY_IF_CFG 0xa4
+#define N_LANES(n) ((((n) - 1) & 0x3) << 0)
+#define PHY_STOP_WAIT_TIME(cycle) (((cycle) & 0xff) << 8)
+
+#define DSI_PHY_STATUS 0xb0
+#define LOCK BIT(0)
+#define STOP_STATE_CLK_LANE BIT(2)
+
+#define DSI_PHY_TST_CTRL0 0xb4
+#define PHY_TESTCLK BIT(1)
+#define PHY_UNTESTCLK 0
+#define PHY_TESTCLR BIT(0)
+#define PHY_UNTESTCLR 0
+
+#define DSI_PHY_TST_CTRL1 0xb8
+#define PHY_TESTEN BIT(16)
+#define PHY_UNTESTEN 0
+#define PHY_TESTDOUT(n) (((n) & 0xff) << 8)
+#define PHY_TESTDIN(n) (((n) & 0xff) << 0)
+
+#define DSI_INT_ST0 0xbc
+#define DSI_INT_ST1 0xc0
+#define DSI_INT_MSK0 0xc4
+#define DSI_INT_MSK1 0xc8
+
+#define PHY_STATUS_TIMEOUT_US 10000
+#define CMD_PKT_STATUS_TIMEOUT_US 20000
+
+#define BYPASS_VCO_RANGE BIT(7)
+#define VCO_RANGE_CON_SEL(val) (((val) & 0x7) << 3)
+#define VCO_IN_CAP_CON_DEFAULT (0x0 << 1)
+#define VCO_IN_CAP_CON_LOW (0x1 << 1)
+#define VCO_IN_CAP_CON_HIGH (0x2 << 1)
+#define REF_BIAS_CUR_SEL BIT(0)
+
+#define CP_CURRENT_3MA BIT(3)
+#define CP_PROGRAM_EN BIT(7)
+#define LPF_PROGRAM_EN BIT(6)
+#define LPF_RESISTORS_20_KOHM 0
+
+#define HSFREQRANGE_SEL(val) (((val) & 0x3f) << 1)
+
+#define INPUT_DIVIDER(val) ((val - 1) & 0x7f)
+#define LOW_PROGRAM_EN 0
+#define HIGH_PROGRAM_EN BIT(7)
+#define LOOP_DIV_LOW_SEL(val) ((val - 1) & 0x1f)
+#define LOOP_DIV_HIGH_SEL(val) (((val - 1) >> 5) & 0x1f)
+#define PLL_LOOP_DIV_EN BIT(5)
+#define PLL_INPUT_DIV_EN BIT(4)
+
+#define POWER_CONTROL BIT(6)
+#define INTERNAL_REG_CURRENT BIT(3)
+#define BIAS_BLOCK_ON BIT(2)
+#define BANDGAP_ON BIT(0)
+
+#define TER_RESISTOR_HIGH BIT(7)
+#define TER_RESISTOR_LOW 0
+#define LEVEL_SHIFTERS_ON BIT(6)
+#define TER_CAL_DONE BIT(5)
+#define SETRD_MAX (0x0 << 2)
+#define POWER_MANAGE BIT(1)
+#define TER_RESISTORS_ON BIT(0)
+
+#define BIASEXTR_SEL(val) ((val) & 0x7)
+#define BANDGAP_SEL(val) ((val) & 0x7)
+#define TLP_PROGRAM_EN BIT(7)
+#define THS_PRE_PROGRAM_EN BIT(7)
+#define THS_ZERO_PROGRAM_EN BIT(6)
+
+enum {
+ BANDGAP_97_07,
+ BANDGAP_98_05,
+ BANDGAP_99_02,
+ BANDGAP_100_00,
+ BANDGAP_93_17,
+ BANDGAP_94_15,
+ BANDGAP_95_12,
+ BANDGAP_96_10,
+};
+
+enum {
+ BIASEXTR_87_1,
+ BIASEXTR_91_5,
+ BIASEXTR_95_9,
+ BIASEXTR_100,
+ BIASEXTR_105_94,
+ BIASEXTR_111_88,
+ BIASEXTR_118_8,
+ BIASEXTR_127_7,
+};
+
+struct dw_mipi_dsi_plat_data {
+ u32 dsi0_en_bit;
+ u32 dsi1_en_bit;
+ u32 grf_switch_reg;
+ u32 grf_dsi0_mode;
+ u32 grf_dsi0_mode_reg;
+ unsigned int max_data_lanes;
+ enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
+ struct drm_display_mode *mode);
+};
+
+struct dw_mipi_dsi {
+ struct drm_encoder encoder;
+ struct drm_connector connector;
+ struct mipi_dsi_host dsi_host;
+ struct drm_panel *panel;
+ struct device *dev;
+ struct regmap *grf_regmap;
+ void __iomem *base;
+
+ struct clk *pllref_clk;
+ struct clk *pclk;
+ struct clk *phy_cfg_clk;
+
+ int dpms_mode;
+ unsigned int lane_mbps; /* per lane */
+ u32 channel;
+ u32 lanes;
+ u32 format;
+ u16 input_div;
+ u16 feedback_div;
+ struct drm_display_mode *mode;
+
+ const struct dw_mipi_dsi_plat_data *pdata;
+};
+
+enum dw_mipi_dsi_mode {
+ DW_MIPI_DSI_CMD_MODE,
+ DW_MIPI_DSI_VID_MODE,
+};
+
+struct dphy_pll_testdin_map {
+ unsigned int max_mbps;
+ u8 testdin;
+};
+
+/* The table is based on 27MHz DPHY pll reference clock. */
+static const struct dphy_pll_testdin_map dptdin_map[] = {
+ { 90, 0x00}, { 100, 0x10}, { 110, 0x20}, { 130, 0x01},
+ { 140, 0x11}, { 150, 0x21}, { 170, 0x02}, { 180, 0x12},
+ { 200, 0x22}, { 220, 0x03}, { 240, 0x13}, { 250, 0x23},
+ { 270, 0x04}, { 300, 0x14}, { 330, 0x05}, { 360, 0x15},
+ { 400, 0x25}, { 450, 0x06}, { 500, 0x16}, { 550, 0x07},
+ { 600, 0x17}, { 650, 0x08}, { 700, 0x18}, { 750, 0x09},
+ { 800, 0x19}, { 850, 0x29}, { 900, 0x39}, { 950, 0x0a},
+ {1000, 0x1a}, {1050, 0x2a}, {1100, 0x3a}, {1150, 0x0b},
+ {1200, 0x1b}, {1250, 0x2b}, {1300, 0x3b}, {1350, 0x0c},
+ {1400, 0x1c}, {1450, 0x2c}, {1500, 0x3c}
+};
+
+static int max_mbps_to_testdin(unsigned int max_mbps)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(dptdin_map); i++)
+ if (dptdin_map[i].max_mbps > max_mbps)
+ return dptdin_map[i].testdin;
+
+ return -EINVAL;
+}
+
+/*
+ * The controller should generate 2 frames before
+ * preparing the peripheral.
+ */
+static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
+{
+ int refresh, two_frames;
+
+ refresh = drm_mode_vrefresh(dsi->mode);
+ two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
+ msleep(two_frames);
+}
+
+static inline struct dw_mipi_dsi *host_to_dsi(struct mipi_dsi_host *host)
+{
+ return container_of(host, struct dw_mipi_dsi, dsi_host);
+}
+
+static inline struct dw_mipi_dsi *con_to_dsi(struct drm_connector *con)
+{
+ return container_of(con, struct dw_mipi_dsi, connector);
+}
+
+static inline struct dw_mipi_dsi *encoder_to_dsi(struct drm_encoder *encoder)
+{
+ return container_of(encoder, struct dw_mipi_dsi, encoder);
+}
+static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val)
+{
+ writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg)
+{
+ return readl(dsi->base + reg);
+}
+
+static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi *dsi, u8 test_code,
+ u8 test_data)
+{
+ /*
+ * With the falling edge on TESTCLK, the TESTDIN[7:0] signal content
+ * is latched internally as the current test code. Test data is
+ * programmed internally by rising edge on TESTCLK.
+ */
+ dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+
+ dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) |
+ PHY_TESTDIN(test_code));
+
+ dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR);
+
+ dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_UNTESTEN | PHY_TESTDOUT(0) |
+ PHY_TESTDIN(test_data));
+
+ dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR);
+}
+
+static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
+{
+ int ret, testdin, vco, val;
+
+ vco = (dsi->lane_mbps < 200) ? 0 : (dsi->lane_mbps + 100) / 200;
+
+ testdin = max_mbps_to_testdin(dsi->lane_mbps);
+ if (testdin < 0) {
+ dev_err(dsi->dev,
+ "failed to get testdin for %dmbps lane clock\n",
+ dsi->lane_mbps);
+ return testdin;
+ }
+
+ if (!IS_ERR(dsi->phy_cfg_clk)) {
+ ret = clk_prepare_enable(dsi->phy_cfg_clk);
+ if (ret) {
+ dev_err(dsi->dev, "Failed to enable phy_cfg_clk\n");
+ return ret;
+ }
+ }
+
+ dw_mipi_dsi_phy_write(dsi, 0x10, BYPASS_VCO_RANGE |
+ VCO_RANGE_CON_SEL(vco) |
+ VCO_IN_CAP_CON_LOW |
+ REF_BIAS_CUR_SEL);
+
+ dw_mipi_dsi_phy_write(dsi, 0x11, CP_CURRENT_3MA);
+ dw_mipi_dsi_phy_write(dsi, 0x12, CP_PROGRAM_EN | LPF_PROGRAM_EN |
+ LPF_RESISTORS_20_KOHM);
+
+ dw_mipi_dsi_phy_write(dsi, 0x44, HSFREQRANGE_SEL(testdin));
+
+ dw_mipi_dsi_phy_write(dsi, 0x19, PLL_LOOP_DIV_EN | PLL_INPUT_DIV_EN);
+ dw_mipi_dsi_phy_write(dsi, 0x17, INPUT_DIVIDER(dsi->input_div));
+ dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_LOW_SEL(dsi->feedback_div) |
+ LOW_PROGRAM_EN);
+ dw_mipi_dsi_phy_write(dsi, 0x18, LOOP_DIV_HIGH_SEL(dsi->feedback_div) |
+ HIGH_PROGRAM_EN);
+
+ dw_mipi_dsi_phy_write(dsi, 0x20, POWER_CONTROL | INTERNAL_REG_CURRENT |
+ BIAS_BLOCK_ON | BANDGAP_ON);
+
+ dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_LOW | TER_CAL_DONE |
+ SETRD_MAX | TER_RESISTORS_ON);
+ dw_mipi_dsi_phy_write(dsi, 0x21, TER_RESISTOR_HIGH | LEVEL_SHIFTERS_ON |
+ SETRD_MAX | POWER_MANAGE |
+ TER_RESISTORS_ON);
+
+ dw_mipi_dsi_phy_write(dsi, 0x22, LOW_PROGRAM_EN |
+ BIASEXTR_SEL(BIASEXTR_127_7));
+ dw_mipi_dsi_phy_write(dsi, 0x22, HIGH_PROGRAM_EN |
+ BANDGAP_SEL(BANDGAP_96_10));
+
+ dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
+ dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
+ dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
+
+ dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
+ PHY_UNRSTZ | PHY_UNSHUTDOWNZ);
+
+ ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+ val, val & LOCK, 1000, PHY_STATUS_TIMEOUT_US);
+ if (ret < 0) {
+ dev_err(dsi->dev, "failed to wait for phy lock state\n");
+ goto phy_init_end;
+ }
+
+ ret = readx_poll_timeout(readl, dsi->base + DSI_PHY_STATUS,
+ val, val & STOP_STATE_CLK_LANE, 1000,
+ PHY_STATUS_TIMEOUT_US);
+ if (ret < 0)
+ dev_err(dsi->dev,
+ "failed to wait for phy clk lane stop state\n");
+
+ dsi_write(dsi, DSI_LPCLK_CTRL, PHY_TXREQUESTCLKHS);
+
+phy_init_end:
+ if (!IS_ERR(dsi->phy_cfg_clk))
+ clk_disable_unprepare(dsi->phy_cfg_clk);
+
+ return ret;
+}
+
+static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
+{
+ unsigned int i, pre;
+ unsigned long mpclk, pllref, tmp;
+ unsigned int m = 1, n = 1, target_mbps = 1000;
+ unsigned int max_mbps = dptdin_map[ARRAY_SIZE(dptdin_map) - 1].max_mbps;
+ int bpp;
+
+ bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
+ if (bpp < 0) {
+ dev_err(dsi->dev, "failed to get bpp for pixel format %d\n",
+ dsi->format);
+ return bpp;
+ }
+
+ mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
+ if (mpclk) {
+ /* take 1 / 0.9, since mbps must big than bandwidth of RGB */
+ tmp = mpclk * (bpp / dsi->lanes);
+ if (tmp < max_mbps)
+ target_mbps = tmp;
+ else
+ dev_err(dsi->dev, "DPHY clock frequency is out of range\n");
+ }
+
+ pllref = DIV_ROUND_UP(clk_get_rate(dsi->pllref_clk), USEC_PER_SEC);
+ tmp = pllref;
+
+ for (i = 1; i < 6; i++) {
+ pre = pllref / i;
+ if ((tmp > (target_mbps % pre)) && (target_mbps / pre < 512)) {
+ tmp = target_mbps % pre;
+ n = i;
+ m = target_mbps / pre;
+ }
+ if (tmp == 0)
+ break;
+ }
+
+ dsi->lane_mbps = pllref / n * m;
+ dsi->input_div = n;
+ dsi->feedback_div = m;
+
+ return 0;
+}
+
+static int dw_mipi_dsi_host_attach(struct mipi_dsi_host *host,
+ struct mipi_dsi_device *device)
+{
+ struct dw_mipi_dsi *dsi = host_to_dsi(host);
+
+ if (device->lanes > dsi->pdata->max_data_lanes) {
+ dev_err(dsi->dev, "the number of data lanes(%u) is too many\n",
+ device->lanes);
+ return -EINVAL;
+ }
+
+ if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) ||
+ !(device->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)) {
+ dev_err(dsi->dev, "device mode is unsupported\n");
+ return -EINVAL;
+ }
+
+ dsi->lanes = device->lanes;
+ dsi->channel = device->channel;
+ dsi->format = device->format;
+ dsi->panel = of_drm_find_panel(device->dev.of_node);
+ if (!dsi->panel) {
+ DRM_ERROR("failed to find panel\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static int dw_mipi_dsi_host_detach(struct mipi_dsi_host *host,
+ struct mipi_dsi_device *device)
+{
+ struct dw_mipi_dsi *dsi = host_to_dsi(host);
+
+ if (dsi->panel)
+ drm_panel_detach(dsi->panel);
+
+ dsi->panel = NULL;
+ return 0;
+}
+
+static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 val)
+{
+ int ret;
+ int sts = 0;
+
+ ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+ sts, !(sts & GEN_CMD_FULL), 1000,
+ CMD_PKT_STATUS_TIMEOUT_US);
+
+ if (ret < 0) {
+ dev_err(dsi->dev, "failed to get available command FIFO\n");
+ return ret;
+ }
+
+ dsi_write(dsi, DSI_GEN_HDR, val);
+
+ ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+ sts, sts & (GEN_CMD_EMPTY | GEN_PLD_W_EMPTY),
+ 1000, CMD_PKT_STATUS_TIMEOUT_US);
+
+ if (ret < 0) {
+ dev_err(dsi->dev, "failed to write command FIFO\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int dw_mipi_dsi_short_write(struct dw_mipi_dsi *dsi,
+ const struct mipi_dsi_msg *msg)
+{
+ const u16 *tx_buf = msg->tx_buf;
+ u32 val = GEN_HDATA(*tx_buf) | GEN_HTYPE(msg->type);
+
+ if (msg->tx_len > 2) {
+ dev_err(dsi->dev, "too long tx buf length %zu for short write\n",
+ msg->tx_len);
+ return -EINVAL;
+ }
+
+ return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+}
+
+static int dw_mipi_dsi_long_write(struct dw_mipi_dsi *dsi,
+ const struct mipi_dsi_msg *msg)
+{
+ const u32 *tx_buf = msg->tx_buf;
+ int len = msg->tx_len, pld_data_bytes = sizeof(*tx_buf), ret;
+ u32 val = GEN_HDATA(msg->tx_len) | GEN_HTYPE(msg->type);
+ u32 remainder = 0;
+ u32 sts = 0;
+
+ if (msg->tx_len < 3) {
+ dev_err(dsi->dev, "wrong tx buf length %zu for long write\n",
+ msg->tx_len);
+ return -EINVAL;
+ }
+
+ while (DIV_ROUND_UP(len, pld_data_bytes)) {
+ if (len < pld_data_bytes) {
+ memcpy(&remainder, tx_buf, len);
+ dsi_write(dsi, DSI_GEN_PLD_DATA, remainder);
+ len = 0;
+ } else {
+ dsi_write(dsi, DSI_GEN_PLD_DATA, *tx_buf);
+ tx_buf++;
+ len -= pld_data_bytes;
+ }
+
+ ret = readx_poll_timeout(readl, dsi->base + DSI_CMD_PKT_STATUS,
+ sts, !(sts & GEN_PLD_W_FULL), 1000,
+ CMD_PKT_STATUS_TIMEOUT_US);
+ if (ret < 0) {
+ dev_err(dsi->dev,
+ "failed to get available write payload FIFO\n");
+ return ret;
+ }
+ }
+
+ return dw_mipi_dsi_gen_pkt_hdr_write(dsi, val);
+}
+
+static ssize_t dw_mipi_dsi_host_transfer(struct mipi_dsi_host *host,
+ const struct mipi_dsi_msg *msg)
+{
+ struct dw_mipi_dsi *dsi = host_to_dsi(host);
+ int ret;
+
+ switch (msg->type) {
+ case MIPI_DSI_DCS_SHORT_WRITE:
+ case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
+ case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
+ case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
+ case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
+ case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
+ ret = dw_mipi_dsi_short_write(dsi, msg);
+ break;
+ case MIPI_DSI_DCS_LONG_WRITE:
+ case MIPI_DSI_GENERIC_LONG_WRITE:
+ ret = dw_mipi_dsi_long_write(dsi, msg);
+ break;
+ default:
+ dev_err(dsi->dev, "unsupported message type\n");
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static const struct mipi_dsi_host_ops dw_mipi_dsi_host_ops = {
+ .attach = dw_mipi_dsi_host_attach,
+ .detach = dw_mipi_dsi_host_detach,
+ .transfer = dw_mipi_dsi_host_transfer,
+};
+
+static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
+{
+ u32 val;
+
+ val = VID_MODE_TYPE_BURST | ENABLE_LOW_POWER;
+
+ dsi_write(dsi, DSI_VID_MODE_CFG, val);
+}
+
+static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi,
+ enum dw_mipi_dsi_mode mode)
+{
+ if (mode == DW_MIPI_DSI_CMD_MODE) {
+ dsi_write(dsi, DSI_PWR_UP, RESET);
+ dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+ dsi_write(dsi, DSI_PWR_UP, POWERUP);
+ } else {
+ dsi_write(dsi, DSI_PWR_UP, RESET);
+ dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE);
+ dw_mipi_dsi_video_mode_config(dsi);
+ dsi_write(dsi, DSI_PWR_UP, POWERUP);
+ }
+}
+
+static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi)
+{
+ dsi_write(dsi, DSI_PWR_UP, RESET);
+ dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ);
+}
+
+static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi)
+{
+ dsi_write(dsi, DSI_PWR_UP, RESET);
+ dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK
+ | PHY_RSTZ | PHY_SHUTDOWNZ);
+ dsi_write(dsi, DSI_PWR_UP, POWERUP);
+ dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) |
+ TX_ESC_CLK_DIVIDSION(7));
+}
+
+static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi,
+ struct drm_display_mode *mode)
+{
+ u32 val = 0, color = 0;
+
+ switch (dsi->format) {
+ case MIPI_DSI_FMT_RGB888:
+ color = DPI_COLOR_CODING_24BIT;
+ break;
+ case MIPI_DSI_FMT_RGB666:
+ color = DPI_COLOR_CODING_18BIT_2 | EN18_LOOSELY;
+ break;
+ case MIPI_DSI_FMT_RGB666_PACKED:
+ color = DPI_COLOR_CODING_18BIT_1;
+ break;
+ case MIPI_DSI_FMT_RGB565:
+ color = DPI_COLOR_CODING_16BIT_1;
+ break;
+ }
+
+ if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
+ val |= VSYNC_ACTIVE_LOW;
+ if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
+ val |= HSYNC_ACTIVE_LOW;
+
+ dsi_write(dsi, DSI_DPI_VCID, DPI_VID(dsi->channel));
+ dsi_write(dsi, DSI_DPI_COLOR_CODING, color);
+ dsi_write(dsi, DSI_DPI_CFG_POL, val);
+ dsi_write(dsi, DSI_DPI_LP_CMD_TIM, OUTVACT_LPCMD_TIME(4)
+ | INVACT_LPCMD_TIME(4));
+}
+
+static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi)
+{
+ dsi_write(dsi, DSI_PCKHDL_CFG, EN_CRC_RX | EN_ECC_RX | EN_BTA);
+}
+
+static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi,
+ struct drm_display_mode *mode)
+{
+ dsi_write(dsi, DSI_VID_PKT_SIZE, VID_PKT_SIZE(mode->hdisplay));
+}
+
+static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
+{
+ dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000));
+ dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00);
+ dsi_write(dsi, DSI_CMD_MODE_CFG, CMD_MODE_ALL_LP);
+ dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE);
+}
+
+/* Get lane byte clock cycles. */
+static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
+ u32 hcomponent)
+{
+ u32 frac, lbcc;
+
+ lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
+
+ frac = lbcc % dsi->mode->clock;
+ lbcc = lbcc / dsi->mode->clock;
+ if (frac)
+ lbcc++;
+
+ return lbcc;
+}
+
+static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
+{
+ u32 htotal, hsa, hbp, lbcc;
+ struct drm_display_mode *mode = dsi->mode;
+
+ htotal = mode->htotal;
+ hsa = mode->hsync_end - mode->hsync_start;
+ hbp = mode->htotal - mode->hsync_end;
+
+ lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal);
+ dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);
+
+ lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa);
+ dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);
+
+ lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp);
+ dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);
+}
+
+static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
+{
+ u32 vactive, vsa, vfp, vbp;
+ struct drm_display_mode *mode = dsi->mode;
+
+ vactive = mode->vdisplay;
+ vsa = mode->vsync_end - mode->vsync_start;
+ vfp = mode->vsync_start - mode->vdisplay;
+ vbp = mode->vtotal - mode->vsync_end;
+
+ dsi_write(dsi, DSI_VID_VACTIVE_LINES, vactive);
+ dsi_write(dsi, DSI_VID_VSA_LINES, vsa);
+ dsi_write(dsi, DSI_VID_VFP_LINES, vfp);
+ dsi_write(dsi, DSI_VID_VBP_LINES, vbp);
+}
+
+static void dw_mipi_dsi_dphy_timing_config(struct dw_mipi_dsi *dsi)
+{
+ dsi_write(dsi, DSI_PHY_TMR_CFG, PHY_HS2LP_TIME(0x40)
+ | PHY_LP2HS_TIME(0x40) | MAX_RD_TIME(10000));
+
+ dsi_write(dsi, DSI_PHY_TMR_LPCLK_CFG, PHY_CLKHS2LP_TIME(0x40)
+ | PHY_CLKLP2HS_TIME(0x40));
+}
+
+static void dw_mipi_dsi_dphy_interface_config(struct dw_mipi_dsi *dsi)
+{
+ dsi_write(dsi, DSI_PHY_IF_CFG, PHY_STOP_WAIT_TIME(0x20) |
+ N_LANES(dsi->lanes));
+}
+
+static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi)
+{
+ dsi_read(dsi, DSI_INT_ST0);
+ dsi_read(dsi, DSI_INT_ST1);
+ dsi_write(dsi, DSI_INT_MSK0, 0);
+ dsi_write(dsi, DSI_INT_MSK1, 0);
+}
+
+static void dw_mipi_dsi_encoder_mode_set(struct drm_encoder *encoder,
+ struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
+ int ret;
+
+ if (dsi->dpms_mode == DRM_MODE_DPMS_ON)
+ return;
+
+ drm_mode_copy(dsi->mode, adjusted_mode);
+
+ ret = dw_mipi_dsi_get_lane_bps(dsi);
+ if (ret < 0)
+ return;
+
+ if (clk_prepare_enable(dsi->pclk)) {
+ dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__);
+ return;
+ }
+
+ pm_runtime_get_sync(dsi->dev);
+
+ dw_mipi_dsi_init(dsi);
+ dw_mipi_dsi_dpi_config(dsi, mode);
+ dw_mipi_dsi_packet_handler_config(dsi);
+ dw_mipi_dsi_video_mode_config(dsi);
+ dw_mipi_dsi_video_packet_config(dsi, mode);
+ dw_mipi_dsi_command_mode_config(dsi);
+ dw_mipi_dsi_line_timer_config(dsi);
+ dw_mipi_dsi_vertical_timing_config(dsi);
+ dw_mipi_dsi_dphy_timing_config(dsi);
+ dw_mipi_dsi_dphy_interface_config(dsi);
+ dw_mipi_dsi_clear_err(dsi);
+ if (drm_panel_prepare(dsi->panel))
+ dev_err(dsi->dev, "failed to prepare panel\n");
+
+ clk_disable_unprepare(dsi->pclk);
+}
+
+static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
+{
+ struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
+
+ if (dsi->dpms_mode != DRM_MODE_DPMS_ON)
+ return;
+
+ drm_panel_disable(dsi->panel);
+
+ if (clk_prepare_enable(dsi->pclk)) {
+ dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__);
+ return;
+ }
+
+ dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
+ drm_panel_unprepare(dsi->panel);
+ dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+
+ /*
+ * This is necessary to make sure the peripheral will be driven
+ * normally when the display is enabled again later.
+ */
+ msleep(120);
+
+ dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_CMD_MODE);
+ dw_mipi_dsi_disable(dsi);
+ pm_runtime_put(dsi->dev);
+ clk_disable_unprepare(dsi->pclk);
+ dsi->dpms_mode = DRM_MODE_DPMS_OFF;
+}
+
+static bool dw_mipi_dsi_encoder_mode_fixup(struct drm_encoder *encoder,
+ const struct drm_display_mode *mode,
+ struct drm_display_mode *adjusted_mode)
+{
+ return true;
+}
+
+static void dw_mipi_dsi_encoder_commit(struct drm_encoder *encoder)
+{
+ struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
+ const struct dw_mipi_dsi_plat_data *pdata = dsi->pdata;
+ int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder);
+ u32 val;
+
+ if (clk_prepare_enable(dsi->pclk)) {
+ dev_err(dsi->dev, "%s: Failed to enable pclk\n", __func__);
+ return;
+ }
+
+ if (pdata->grf_dsi0_mode_reg)
+ regmap_write(dsi->grf_regmap, pdata->grf_dsi0_mode_reg,
+ pdata->grf_dsi0_mode);
+
+ dw_mipi_dsi_phy_init(dsi);
+ dw_mipi_dsi_wait_for_two_frames(dsi);
+
+ drm_panel_enable(dsi->panel);
+
+ dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
+
+ clk_disable_unprepare(dsi->pclk);
+
+ if (mux)
+ val = pdata->dsi0_en_bit | (pdata->dsi0_en_bit << 16);
+ else
+ val = pdata->dsi0_en_bit << 16;
+
+ regmap_write(dsi->grf_regmap, pdata->grf_switch_reg, val);
+ dev_dbg(dsi->dev, "vop %s output to dsi0\n", (mux) ? "LIT" : "BIG");
+ dsi->dpms_mode = DRM_MODE_DPMS_ON;
+}
+
+static int
+dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder,
+ struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
+{
+ struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
+ struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
+
+ switch (dsi->format) {
+ case MIPI_DSI_FMT_RGB888:
+ s->output_mode = ROCKCHIP_OUT_MODE_P888;
+ break;
+ case MIPI_DSI_FMT_RGB666:
+ s->output_mode = ROCKCHIP_OUT_MODE_P666;
+ break;
+ case MIPI_DSI_FMT_RGB565:
+ s->output_mode = ROCKCHIP_OUT_MODE_P565;
+ break;
+ default:
+ WARN_ON(1);
+ return -EINVAL;
+ }
+
+ s->output_type = DRM_MODE_CONNECTOR_DSI;
+
+ return 0;
+}
+
+static struct drm_encoder_helper_funcs
+dw_mipi_dsi_encoder_helper_funcs = {
+ .mode_fixup = dw_mipi_dsi_encoder_mode_fixup,
+ .commit = dw_mipi_dsi_encoder_commit,
+ .mode_set = dw_mipi_dsi_encoder_mode_set,
+ .disable = dw_mipi_dsi_encoder_disable,
+ .atomic_check = dw_mipi_dsi_encoder_atomic_check,
+};
+
+static struct drm_encoder_funcs dw_mipi_dsi_encoder_funcs = {
+ .destroy = drm_encoder_cleanup,
+};
+
+static int dw_mipi_dsi_connector_get_modes(struct drm_connector *connector)
+{
+ struct dw_mipi_dsi *dsi = con_to_dsi(connector);
+
+ return drm_panel_get_modes(dsi->panel);
+}
+
+static enum drm_mode_status dw_mipi_dsi_mode_valid(
+ struct drm_connector *connector,
+ struct drm_display_mode *mode)
+{
+ struct dw_mipi_dsi *dsi = con_to_dsi(connector);
+
+ enum drm_mode_status mode_status = MODE_OK;
+
+ if (dsi->pdata->mode_valid)
+ mode_status = dsi->pdata->mode_valid(connector, mode);
+
+ return mode_status;
+}
+
+static struct drm_encoder *dw_mipi_dsi_connector_best_encoder(
+ struct drm_connector *connector)
+{
+ struct dw_mipi_dsi *dsi = con_to_dsi(connector);
+
+ return &dsi->encoder;
+}
+
+static struct drm_connector_helper_funcs dw_mipi_dsi_connector_helper_funcs = {
+ .get_modes = dw_mipi_dsi_connector_get_modes,
+ .mode_valid = dw_mipi_dsi_mode_valid,
+ .best_encoder = dw_mipi_dsi_connector_best_encoder,
+};
+
+static enum drm_connector_status
+dw_mipi_dsi_detect(struct drm_connector *connector, bool force)
+{
+ return connector_status_connected;
+}
+
+static void dw_mipi_dsi_drm_connector_destroy(struct drm_connector *connector)
+{
+ drm_connector_unregister(connector);
+ drm_connector_cleanup(connector);
+}
+
+static struct drm_connector_funcs dw_mipi_dsi_atomic_connector_funcs = {
+ .dpms = drm_atomic_helper_connector_dpms,
+ .fill_modes = drm_helper_probe_single_connector_modes,
+ .detect = dw_mipi_dsi_detect,
+ .destroy = dw_mipi_dsi_drm_connector_destroy,
+ .reset = drm_atomic_helper_connector_reset,
+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
+};
+
+static int dw_mipi_dsi_register(struct drm_device *drm,
+ struct dw_mipi_dsi *dsi)
+{
+ struct drm_encoder *encoder = &dsi->encoder;
+ struct drm_connector *connector = &dsi->connector;
+ struct device *dev = dsi->dev;
+ int ret;
+
+ encoder->possible_crtcs = drm_of_find_possible_crtcs(drm,
+ dev->of_node);
+ /*
+ * If we failed to find the CRTC(s) which this encoder is
+ * supposed to be connected to, it's because the CRTC has
+ * not been registered yet. Defer probing, and hope that
+ * the required CRTC is added later.
+ */
+ if (encoder->possible_crtcs == 0)
+ return -EPROBE_DEFER;
+
+ drm_encoder_helper_add(&dsi->encoder,
+ &dw_mipi_dsi_encoder_helper_funcs);
+ ret = drm_encoder_init(drm, &dsi->encoder, &dw_mipi_dsi_encoder_funcs,
+ DRM_MODE_ENCODER_DSI, NULL);
+ if (ret) {
+ dev_err(dev, "Failed to initialize encoder with drm\n");
+ return ret;
+ }
+
+ drm_connector_helper_add(connector,
+ &dw_mipi_dsi_connector_helper_funcs);
+
+ drm_connector_init(drm, &dsi->connector,
+ &dw_mipi_dsi_atomic_connector_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+
+ drm_panel_attach(dsi->panel, &dsi->connector);
+
+ dsi->connector.port = dev->of_node;
+
+ drm_mode_connector_attach_encoder(connector, encoder);
+
+ return 0;
+}
+
+static int rockchip_mipi_parse_dt(struct dw_mipi_dsi *dsi)
+{
+ struct device_node *np = dsi->dev->of_node;
+
+ dsi->grf_regmap = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+ if (IS_ERR(dsi->grf_regmap)) {
+ dev_err(dsi->dev, "Unable to get rockchip,grf\n");
+ return PTR_ERR(dsi->grf_regmap);
+ }
+
+ return 0;
+}
+
+static struct dw_mipi_dsi_plat_data rk3288_mipi_dsi_drv_data = {
+ .dsi0_en_bit = RK3288_DSI0_SEL_VOP_LIT,
+ .dsi1_en_bit = RK3288_DSI1_SEL_VOP_LIT,
+ .grf_switch_reg = RK3288_GRF_SOC_CON6,
+ .max_data_lanes = 4,
+};
+
+static struct dw_mipi_dsi_plat_data rk3399_mipi_dsi_drv_data = {
+ .dsi0_en_bit = RK3399_DSI0_SEL_VOP_LIT,
+ .dsi1_en_bit = RK3399_DSI1_SEL_VOP_LIT,
+ .grf_switch_reg = RK3399_GRF_SOC_CON19,
+ .grf_dsi0_mode = RK3399_GRF_DSI_MODE,
+ .grf_dsi0_mode_reg = RK3399_GRF_SOC_CON22,
+ .max_data_lanes = 4,
+};
+
+static const struct of_device_id dw_mipi_dsi_dt_ids[] = {
+ {
+ .compatible = "rockchip,rk3288-mipi-dsi",
+ .data = &rk3288_mipi_dsi_drv_data,
+ },{
+ .compatible = "rockchip,rk3399-mipi-dsi",
+ .data = &rk3399_mipi_dsi_drv_data,
+ },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, dw_mipi_dsi_dt_ids);
+
+extern int tinker_mcu_is_connected(void);
+static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct drm_device *drm = data;
+ struct dw_mipi_dsi *dsi = dev_get_drvdata(dev);
+ struct resource *res;
+ int ret;
+
+ dsi->dpms_mode = DRM_MODE_DPMS_OFF;
+
+ if (!dsi->panel)
+ return -EPROBE_DEFER;
+
+ ret = rockchip_mipi_parse_dt(dsi);
+ if (ret)
+ return ret;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res)
+ return -ENODEV;
+
+ dsi->base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(dsi->base))
+ return PTR_ERR(dsi->base);
+
+ dsi->pllref_clk = devm_clk_get(dev, "ref");
+ if (IS_ERR(dsi->pllref_clk)) {
+ ret = PTR_ERR(dsi->pllref_clk);
+ dev_err(dev, "Unable to get pll reference clock: %d\n", ret);
+ return ret;
+ }
+
+ dsi->pclk = devm_clk_get(dev, "pclk");
+ if (IS_ERR(dsi->pclk)) {
+ ret = PTR_ERR(dsi->pclk);
+ dev_err(dev, "Unable to get pclk: %d\n", ret);
+ return ret;
+ }
+
+ dsi->phy_cfg_clk = devm_clk_get(dev, "phy_cfg");
+ if (IS_ERR(dsi->phy_cfg_clk))
+ dev_dbg(dev, "have not phy_cfg_clk\n");
+
+ ret = clk_prepare_enable(dsi->pllref_clk);
+ if (ret) {
+ dev_err(dev, "%s: Failed to enable pllref_clk\n", __func__);
+ return ret;
+ }
+
+ if(!tinker_mcu_is_connected()) {
+ pr_info("panel doesn't be connected\n");
+ goto err_pllref;
+ }
+
+ ret = dw_mipi_dsi_register(drm, dsi);
+ if (ret) {
+ dev_err(dev, "Failed to register mipi_dsi: %d\n", ret);
+ goto err_pllref;
+ }
+
+ dev_set_drvdata(dev, dsi);
+
+ pm_runtime_enable(dev);
+
+ return 0;
+
+err_pllref:
+ clk_disable_unprepare(dsi->pllref_clk);
+ return ret;
+}
+
+static void dw_mipi_dsi_unbind(struct device *dev, struct device *master,
+ void *data)
+{
+ struct dw_mipi_dsi *dsi = dev_get_drvdata(dev);
+
+ pm_runtime_disable(dev);
+ clk_disable_unprepare(dsi->pllref_clk);
+}
+
+static const struct component_ops dw_mipi_dsi_ops = {
+ .bind = dw_mipi_dsi_bind,
+ .unbind = dw_mipi_dsi_unbind,
+};
+
+static int dw_mipi_dsi_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ const struct of_device_id *of_id =
+ of_match_device(dw_mipi_dsi_dt_ids, dev);
+ const struct dw_mipi_dsi_plat_data *pdata = of_id->data;
+ struct dw_mipi_dsi *dsi;
+ int ret;
+
+ dsi = devm_kzalloc(&pdev->dev, sizeof(*dsi), GFP_KERNEL);
+ if (!dsi)
+ return -ENOMEM;
+
+ dsi->dev = dev;
+ dsi->pdata = pdata;
+ dsi->dsi_host.ops = &dw_mipi_dsi_host_ops;
+ dsi->dsi_host.dev = &pdev->dev;
+ dsi->mode = devm_kzalloc(&pdev->dev, sizeof(struct drm_display_mode), GFP_KERNEL);
+ if (!dsi)
+ return -ENOMEM;
+
+ ret = mipi_dsi_host_register(&dsi->dsi_host);
+ if (ret)
+ return ret;
+
+ platform_set_drvdata(pdev, dsi);
+ ret = component_add(&pdev->dev, &dw_mipi_dsi_ops);
+ if (ret)
+ mipi_dsi_host_unregister(&dsi->dsi_host);
+
+ return ret;
+}
+
+static int dw_mipi_dsi_remove(struct platform_device *pdev)
+{
+ struct dw_mipi_dsi *dsi = dev_get_drvdata(&pdev->dev);
+
+ if (dsi)
+ mipi_dsi_host_unregister(&dsi->dsi_host);
+ component_del(&pdev->dev, &dw_mipi_dsi_ops);
+ return 0;
+}
+
+static struct platform_driver dw_mipi_dsi_driver = {
+ .probe = dw_mipi_dsi_probe,
+ .remove = dw_mipi_dsi_remove,
+ .driver = {
+ .of_match_table = dw_mipi_dsi_dt_ids,
+ .name = DRIVER_NAME,
+ },
+};
+module_platform_driver(dw_mipi_dsi_driver);
+
+MODULE_DESCRIPTION("ROCKCHIP MIPI DSI host controller driver");
+MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRIVER_NAME);
\ No newline at end of file
diff --git a/drivers/tinkerboard/dsi/panel-toshiba-tc358762.c b/drivers/tinkerboard/dsi/panel-toshiba-tc358762.c
new file mode 100644
index 0000000..458078c
--- /dev/null
+++ b/drivers/tinkerboard/dsi/panel-toshiba-tc358762.c
@@ -0,0 +1,620 @@
+/*
+ * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <linux/backlight.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drmP.h>
+#include <drm/drm_crtc.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+
+#include <video/display_timing.h>
+#include <video/of_display_timing.h>
+#include <video/videomode.h>
+
+int trigger_bridge = 1;
+
+struct panel_desc {
+ const struct drm_display_mode *modes;
+ unsigned int num_modes;
+ const struct display_timing *timings;
+ unsigned int num_timings;
+
+ unsigned int bpc;
+
+ struct {
+ unsigned int width;
+ unsigned int height;
+ } size;
+
+ /**
+ * @prepare: the time (in milliseconds) that it takes for the panel to
+ * become ready and start receiving video data
+ * @enable: the time (in milliseconds) that it takes for the panel to
+ * display the first valid frame after starting to receive
+ * video data
+ * @disable: the time (in milliseconds) that it takes for the panel to
+ * turn the display off (no content is visible)
+ * @unprepare: the time (in milliseconds) that it takes for the panel
+ * to power itself down completely
+ */
+ struct {
+ unsigned int prepare;
+ unsigned int enable;
+ unsigned int disable;
+ unsigned int unprepare;
+ } delay;
+
+ u32 bus_format;
+};
+
+struct tc358762 {
+ struct drm_panel base;
+ bool prepared;
+ bool enabled;
+
+ struct device *dev;
+ struct mipi_dsi_device *dsi;
+ const struct panel_desc *desc;
+
+ struct backlight_device *backlight;
+ struct regulator *supply;
+ struct i2c_adapter *ddc;
+
+ struct gpio_desc *enable_gpio;
+};
+
+static inline struct tc358762 *to_tc358762(struct drm_panel *panel)
+{
+ return container_of(panel, struct tc358762, base);
+}
+
+static int tc358762_get_fixed_modes(struct tc358762 *panel)
+{
+ struct drm_connector *connector = panel->base.connector;
+ struct drm_device *drm = panel->base.drm;
+ struct drm_display_mode *mode;
+ unsigned int i, num = 0;
+
+ if (!panel->desc)
+ return 0;
+
+ for (i = 0; i < panel->desc->num_timings; i++) {
+ const struct display_timing *dt = &panel->desc->timings[i];
+ struct videomode vm;
+
+ videomode_from_timing(dt, &vm);
+ mode = drm_mode_create(drm);
+ if (!mode) {
+ dev_err(drm->dev, "failed to add mode %ux%u\n",
+ dt->hactive.typ, dt->vactive.typ);
+ continue;
+ }
+
+ drm_display_mode_from_videomode(&vm, mode);
+ drm_mode_set_name(mode);
+
+ drm_mode_probed_add(connector, mode);
+ num++;
+ }
+
+ for (i = 0; i < panel->desc->num_modes; i++) {
+ const struct drm_display_mode *m = &panel->desc->modes[i];
+
+ mode = drm_mode_duplicate(drm, m);
+ if (!mode) {
+ dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
+ m->hdisplay, m->vdisplay, m->vrefresh);
+ continue;
+ }
+
+ drm_mode_set_name(mode);
+
+ drm_mode_probed_add(connector, mode);
+ num++;
+ }
+
+ connector->display_info.bpc = panel->desc->bpc;
+ connector->display_info.width_mm = panel->desc->size.width;
+ connector->display_info.height_mm = panel->desc->size.height;
+ if (panel->desc->bus_format)
+ drm_display_info_set_bus_formats(&connector->display_info,
+ &panel->desc->bus_format, 1);
+
+ return num;
+}
+
+static int tc358762_of_get_native_mode(struct tc358762 *panel)
+{
+ struct drm_connector *connector = panel->base.connector;
+ struct drm_device *drm = panel->base.drm;
+ struct drm_display_mode *mode;
+ struct device_node *timings_np;
+ int ret;
+
+ timings_np = of_get_child_by_name(panel->dev->of_node,
+ "display-timings");
+ if (!timings_np) {
+ dev_dbg(panel->dev, "failed to find display-timings node\n");
+ return 0;
+ }
+
+ of_node_put(timings_np);
+ mode = drm_mode_create(drm);
+ if (!mode)
+ return 0;
+
+ ret = of_get_drm_display_mode(panel->dev->of_node, mode,
+ OF_USE_NATIVE_MODE);
+ if (ret) {
+ dev_dbg(panel->dev, "failed to find dts display timings\n");
+ drm_mode_destroy(drm, mode);
+ return 0;
+ }
+
+ drm_mode_set_name(mode);
+ mode->type |= DRM_MODE_TYPE_PREFERRED;
+ drm_mode_probed_add(connector, mode);
+
+ return 1;
+}
+
+extern int tinker_mcu_set_bright(int bright);
+static int tc358762_disable(struct drm_panel *panel)
+{
+ struct tc358762 *p = to_tc358762(panel);
+
+ if (!p->enabled)
+ return 0;
+
+ printk("panel disable\n");
+
+ tinker_mcu_set_bright(0x00);
+
+ if (p->backlight) {
+ p->backlight->props.power = FB_BLANK_POWERDOWN;
+ backlight_update_status(p->backlight);
+ }
+
+ if (p->desc && p->desc->delay.disable)
+ msleep(p->desc->delay.disable);
+
+ p->enabled = false;
+
+ return 0;
+}
+
+static int tc358762_unprepare(struct drm_panel *panel)
+{
+ struct tc358762 *p = to_tc358762(panel);
+
+ if (!p->prepared)
+ return 0;
+
+ if (p->enable_gpio)
+ gpiod_direction_output(p->enable_gpio, 0);
+
+ regulator_disable(p->supply);
+
+ if (p->desc && p->desc->delay.unprepare)
+ msleep(p->desc->delay.unprepare);
+
+ p->prepared = false;
+
+ return 0;
+}
+
+static void tc358762_gen_write(struct mipi_dsi_device *dsi, const void *data, size_t len)
+{
+ int ret;
+
+ ret = mipi_dsi_generic_write(dsi, data, len);
+ if (ret < 0) {
+ dev_err(&dsi->dev, "failed to writing gen seq\n");
+ }
+}
+
+#define tc358762_gen_write_seq(dsi, seq...) \
+({\
+ static const u8 d[] = { seq };\
+ tc358762_gen_write(dsi, d, ARRAY_SIZE(d));\
+})
+
+static int tc358762_dsi_init(struct tc358762 *p)
+{
+ struct mipi_dsi_device *dsi = p->dsi;
+
+ tc358762_gen_write_seq(dsi, 0x10, 0x02, 0x03, 0x00, 0x00, 0x00);//LANE
+ tc358762_gen_write_seq(dsi, 0x64, 0x01, 0x0c, 0x00, 0x00, 0x00);//D0S_CLRSIPOCOUNT
+ tc358762_gen_write_seq(dsi, 0x68, 0x01, 0x0c, 0x00, 0x00, 0x00);//D1S_CLRSIPOCOUNT
+ tc358762_gen_write_seq(dsi, 0x44, 0x01, 0x00, 0x00, 0x00, 0x00);//D0S_ATMR
+ tc358762_gen_write_seq(dsi, 0x48, 0x01, 0x00, 0x00, 0x00, 0x00);//D1S_ATMR
+ tc358762_gen_write_seq(dsi, 0x14, 0x01, 0x15, 0x00, 0x00, 0x00);//LPTXTIMCNT
+ tc358762_gen_write_seq(dsi, 0x50, 0x04, 0x60, 0x00, 0x00, 0x00);//SPICMR/SPICTRL
+ tc358762_gen_write_seq(dsi, 0x20, 0x04, 0x52, 0x01, 0x10, 0x00);//PORT/LCDCTRL
+ tc358762_gen_write_seq(dsi, 0x24, 0x04, 0x14, 0x00, 0x1a, 0x00);//HBPR/HSR
+ tc358762_gen_write_seq(dsi, 0x28, 0x04, 0x20, 0x03, 0x69, 0x00);//HFPR/HDISP(*)
+ tc358762_gen_write_seq(dsi, 0x2c, 0x04, 0x02, 0x00, 0x15, 0x00);//VBFR/VSR
+ tc358762_gen_write_seq(dsi, 0x30, 0x04, 0xe0, 0x01, 0x07, 0x00);//VFPR/VDISP(*)
+ tc358762_gen_write_seq(dsi, 0x34, 0x04, 0x01, 0x00, 0x00, 0x00);//VFUEN
+ tc358762_gen_write_seq(dsi, 0x64, 0x04, 0x0f, 0x04, 0x00, 0x00);//SYSCTRL
+ tc358762_gen_write_seq(dsi, 0x04, 0x01, 0x01, 0x00, 0x00, 0x00);//STARTPPI
+ tc358762_gen_write_seq(dsi, 0x04, 0x02, 0x01, 0x00, 0x00, 0x00);//STARTDSI
+
+ usleep_range(10, 20);
+ return 0;
+}
+
+static int tc358762_prepare(struct drm_panel *panel)
+{
+ struct tc358762 *p = to_tc358762(panel);
+ int err;
+
+ if (p->prepared)
+ return 0;
+
+ err = regulator_enable(p->supply);
+ if (err < 0) {
+ dev_err(panel->dev, "failed to enable supply: %d\n", err);
+ return err;
+ }
+
+ if (p->enable_gpio)
+ gpiod_direction_output(p->enable_gpio, 1);
+
+ if (p->desc && p->desc->delay.prepare)
+ msleep(p->desc->delay.prepare);
+
+ p->prepared = true;
+
+ return 0;
+}
+
+extern void tinker_mcu_screen_power_up(void);
+static int tc358762_enable(struct drm_panel *panel)
+{
+ struct tc358762 *p = to_tc358762(panel);
+
+ if (p->enabled)
+ return 0;
+
+ printk("panel enable\n");
+
+ if(trigger_bridge) {
+ pr_info("tinker_mcu_screen_power_up");
+ tinker_mcu_screen_power_up();
+ trigger_bridge = 0;
+ }
+
+ tc358762_dsi_init(p);
+
+ if (p->desc && p->desc->delay.enable)
+ msleep(p->desc->delay.enable);
+
+ if (p->backlight) {
+ p->backlight->props.power = FB_BLANK_UNBLANK;
+ backlight_update_status(p->backlight);
+ }
+
+ tinker_mcu_set_bright(0xFF);
+
+ p->enabled = true;
+
+ return 0;
+}
+
+static int tc358762_get_modes(struct drm_panel *panel)
+{
+ struct tc358762 *p = to_tc358762(panel);
+ int num = 0;
+
+ /* probe EDID if a DDC bus is available */
+ if (p->ddc) {
+ struct edid *edid = drm_get_edid(panel->connector, p->ddc);
+ drm_mode_connector_update_edid_property(panel->connector, edid);
+ if (edid) {
+ num += drm_add_edid_modes(panel->connector, edid);
+ kfree(edid);
+ }
+ }
+
+ /* add hard-coded panel modes */
+ num += tc358762_get_fixed_modes(p);
+
+ /* add device node plane modes */
+ num += tc358762_of_get_native_mode(p);
+
+ return num;
+}
+
+static int tc358762_get_timings(struct drm_panel *panel,
+ unsigned int num_timings,
+ struct display_timing *timings)
+{
+ struct tc358762 *p = to_tc358762(panel);
+ unsigned int i;
+
+ if (!p->desc)
+ return 0;
+
+ if (p->desc->num_timings < num_timings)
+ num_timings = p->desc->num_timings;
+
+ if (timings)
+ for (i = 0; i < num_timings; i++)
+ timings[i] = p->desc->timings[i];
+
+ return p->desc->num_timings;
+}
+
+static const struct drm_panel_funcs tc358762_funcs = {
+ .disable = tc358762_disable,
+ .unprepare = tc358762_unprepare,
+ .prepare = tc358762_prepare,
+ .enable = tc358762_enable,
+ .get_modes = tc358762_get_modes,
+ .get_timings = tc358762_get_timings,
+};
+
+static int tc358762_mipi_probe(struct mipi_dsi_device *dsi, const struct panel_desc *desc)
+{
+ struct device_node *backlight, *ddc;
+ struct tc358762 *panel;
+ struct device *dev = &dsi->dev;
+ int err;
+
+ panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
+ if (!panel)
+ return -ENOMEM;
+
+ panel->enabled = false;
+ panel->prepared = false;
+ panel->desc = desc;
+ panel->dev = dev;
+ panel->dsi = dsi;
+
+ panel->supply = devm_regulator_get(dev, "power");
+ if (IS_ERR(panel->supply))
+ return PTR_ERR(panel->supply);
+
+ panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
+ GPIOD_OUT_LOW);
+ if (IS_ERR(panel->enable_gpio)) {
+ err = PTR_ERR(panel->enable_gpio);
+ dev_err(dev, "failed to request GPIO: %d\n", err);
+ return err;
+ }
+
+ backlight = of_parse_phandle(dev->of_node, "backlight", 0);
+ if (backlight) {
+ panel->backlight = of_find_backlight_by_node(backlight);
+ of_node_put(backlight);
+
+ if (!panel->backlight)
+ return -EPROBE_DEFER;
+ }
+
+ ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
+ if (ddc) {
+ panel->ddc = of_find_i2c_adapter_by_node(ddc);
+ of_node_put(ddc);
+
+ if (!panel->ddc) {
+ err = -EPROBE_DEFER;
+ goto free_backlight;
+ }
+ }
+
+ drm_panel_init(&panel->base);
+ panel->base.dev = dev;
+ panel->base.funcs = &tc358762_funcs;
+
+ err = drm_panel_add(&panel->base);
+ if (err < 0)
+ goto free_ddc;
+
+ dev_set_drvdata(dev, panel);
+
+ return 0;
+
+free_ddc:
+ if (panel->ddc)
+ put_device(&panel->ddc->dev);
+free_backlight:
+ if (panel->backlight)
+ put_device(&panel->backlight->dev);
+
+ return err;
+}
+
+static int tc358762_remove(struct device *dev)
+{
+ struct tc358762 *panel = dev_get_drvdata(dev);
+
+ drm_panel_detach(&panel->base);
+ drm_panel_remove(&panel->base);
+
+ tc358762_disable(&panel->base);
+
+ if (panel->ddc)
+ put_device(&panel->ddc->dev);
+
+ if (panel->backlight)
+ put_device(&panel->backlight->dev);
+
+ return 0;
+}
+
+static void tc358762_shutdown(struct device *dev)
+{
+ struct tc358762 *panel = dev_get_drvdata(dev);
+
+ tc358762_disable(&panel->base);
+}
+
+struct bridge_desc {
+ struct panel_desc desc;
+
+ unsigned long flags;
+ enum mipi_dsi_pixel_format format;
+ unsigned int lanes;
+};
+
+static const struct drm_display_mode tc358762_mode = {
+ .clock = 27448,
+ .hdisplay = 800,
+ .hsync_start = 800 + 65,
+ .hsync_end = 800 + 65 + 20,
+ .htotal = 800 + 65 + 20 + 26,
+ .vdisplay = 480,
+ .vsync_start = 480 + 7,
+ .vsync_end = 480 + 7 + 2,
+ .vtotal = 480 + 7 + 2 + 21,
+ .vrefresh = 60,
+ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
+};
+
+static const struct bridge_desc tc358762_bridge = {
+ .desc = {
+ .modes = &tc358762_mode,
+ .num_modes = 1,
+ .bpc = 8,
+ .size = {
+ .width = 217,
+ .height = 136,
+ },
+ },
+ .flags = MIPI_DSI_MODE_VIDEO |
+ MIPI_DSI_MODE_VIDEO_BURST |
+ MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
+ .format = MIPI_DSI_FMT_RGB888,
+ .lanes = 1,
+};
+
+static const struct of_device_id dsi_of_match[] = {
+ {
+ .compatible = "asus,tc358762",
+ .data = &tc358762_bridge
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(of, dsi_of_match);
+
+static int tc358762_dsi_probe(struct mipi_dsi_device *dsi)
+{
+ const struct bridge_desc *desc;
+ const struct of_device_id *id;
+ const struct panel_desc *pdesc;
+ u32 val;
+ int err;
+
+ id = of_match_node(dsi_of_match, dsi->dev.of_node);
+ if (!id)
+ return -ENODEV;
+
+ desc = id->data;
+
+ printk("find panel: %s\n", id->compatible);
+
+ if (desc) {
+ dsi->mode_flags = desc->flags;
+ dsi->format = desc->format;
+ dsi->lanes = desc->lanes;
+ pdesc = &desc->desc;
+ } else {
+ pdesc = NULL;
+ }
+
+ err = tc358762_mipi_probe(dsi, pdesc);
+
+ if (err < 0)
+ return err;
+
+ if (!of_property_read_u32(dsi->dev.of_node, "dsi,flags", &val))
+ dsi->mode_flags = val;
+
+ if (!of_property_read_u32(dsi->dev.of_node, "dsi,format", &val))
+ dsi->format = val;
+
+ if (!of_property_read_u32(dsi->dev.of_node, "dsi,lanes", &val))
+ dsi->lanes = val;
+
+ return mipi_dsi_attach(dsi);
+}
+
+static int tc358762_dsi_remove(struct mipi_dsi_device *dsi)
+{
+ int err;
+
+ err = mipi_dsi_detach(dsi);
+ if (err < 0)
+ dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
+
+ return tc358762_remove(&dsi->dev);
+}
+
+static void tc358762_dsi_shutdown(struct mipi_dsi_device *dsi)
+{
+ tc358762_shutdown(&dsi->dev);
+}
+
+static struct mipi_dsi_driver tc358762_dsi_driver = {
+ .driver = {
+ .name = "bridge-tc358762-dsi",
+ .of_match_table = dsi_of_match,
+ },
+ .probe = tc358762_dsi_probe,
+ .remove = tc358762_dsi_remove,
+ .shutdown = tc358762_dsi_shutdown,
+};
+
+static int __init tc358762_init(void)
+{
+ int err;
+
+ if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
+ err = mipi_dsi_driver_register(&tc358762_dsi_driver);
+ if (err < 0)
+ return err;
+ }
+
+ return 0;
+}
+module_init(tc358762_init);
+
+static void __exit tc358762_exit(void)
+{
+ if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
+ mipi_dsi_driver_unregister(&tc358762_dsi_driver);
+}
+module_exit(tc358762_exit);
+
+MODULE_AUTHOR("Jerry <xbl@rock-chips.com>");
+MODULE_DESCRIPTION("DRM Driver for toshiba tc358762 Bridge");
+MODULE_LICENSE("GPL and additional rights");
\ No newline at end of file
diff --git a/drivers/tinkerboard/dsi/tinker_ft5406.c b/drivers/tinkerboard/dsi/tinker_ft5406.c
new file mode 100644
index 0000000..e148c74
--- /dev/null
+++ b/drivers/tinkerboard/dsi/tinker_ft5406.c
@@ -0,0 +1,322 @@
+/*
+ *
+ * TINKER BOARD FT5406 touch driver.
+ *
+ * Copyright (c) 2016 ASUSTek Computer Inc.
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/input.h>
+#include <linux/input/mt.h>
+#include <linux/module.h>
+#include <linux/workqueue.h>
+#include "tinker_ft5406.h"
+
+static int fts_i2c_read(struct i2c_client *client, char *writebuf,
+ int writelen, char *readbuf, int readlen)
+{
+ int ret;
+
+ if (writelen > 0) {
+ struct i2c_msg msgs[] = {
+ {
+ .addr = client->addr,
+ .flags = 0,
+ .len = writelen,
+ .buf = writebuf,
+ },
+ {
+ .addr = client->addr,
+ .flags = I2C_M_RD,
+ .len = readlen,
+ .buf = readbuf,
+ },
+ };
+ ret = i2c_transfer(client->adapter, msgs, 2);
+ if (ret < 0)
+ LOG_ERR("i2c read error, %d\n", ret);
+ } else {
+ struct i2c_msg msgs[] = {
+ {
+ .addr = client->addr,
+ .flags = I2C_M_RD,
+ .len = readlen,
+ .buf = readbuf,
+ },
+ };
+ ret = i2c_transfer(client->adapter, msgs, 1);
+ if (ret < 0)
+ LOG_ERR("i2c read error, %d\n", ret);
+ }
+
+ return ret;
+}
+
+static int fts_read_reg(struct i2c_client *client, u8 addr, u8 *val)
+{
+ return fts_i2c_read(client, &addr, 1, val, 1);
+}
+
+static int fts_check_fw_ver(struct i2c_client *client)
+{
+ u8 reg_addr, fw_ver[3];
+ int ret;
+
+ reg_addr = FT_REG_FW_VER;
+ ret = fts_i2c_read(client, &reg_addr, 1, &fw_ver[0], 1);
+ if (ret < 0)
+ goto error;
+
+ reg_addr = FT_REG_FW_MIN_VER;
+ ret = fts_i2c_read(client, &reg_addr, 1, &fw_ver[1], 1);
+ if (ret < 0)
+ goto error;
+
+ reg_addr = FT_REG_FW_SUB_MIN_VER;
+ ret = fts_i2c_read(client, &reg_addr, 1, &fw_ver[2], 1);
+ if (ret < 0)
+ goto error;
+
+ LOG_INFO("Firmware version = %d.%d.%d\n", fw_ver[0], fw_ver[1], fw_ver[2]);
+ return 0;
+
+error:
+ return ret;
+}
+
+static int fts_read_td_status(struct tinker_ft5406_data *ts_data)
+{
+ u8 td_status;
+ int ret = -1;
+ ret = fts_read_reg(ts_data->client, FT_TD_STATUS_REG, &td_status);
+ if (ret < 0) {
+ LOG_ERR("get reg td_status failed, %d\n", ret);
+ return ret;
+ }
+ return (int)td_status;
+}
+
+static int fts_read_touchdata(struct tinker_ft5406_data *ts_data)
+{
+ struct ts_event *event = &ts_data->event;
+ int ret = -1, i;
+ u8 buf[FT_ONE_TCH_LEN-2] = { 0 };
+ u8 reg_addr, pointid = FT_MAX_ID;
+
+ for (i = 0; i < event->touch_point && i < MAX_TOUCH_POINTS; i++) {
+ reg_addr = FT_TOUCH_X_H_REG + (i * FT_ONE_TCH_LEN);
+ ret = fts_i2c_read(ts_data->client, &reg_addr, 1, buf, FT_ONE_TCH_LEN-2);
+ if (ret < 0) {
+ LOG_ERR("read touchdata failed.\n");
+ return ret;
+ }
+
+ pointid = (buf[FT_TOUCH_ID]) >> 4;
+ if (pointid >= MAX_TOUCH_POINTS)
+ break;
+ event->au8_finger_id[i] = pointid;
+ event->au16_x[i] = (s16) (buf[FT_TOUCH_X_H] & 0x0F) << 8 | (s16) buf[FT_TOUCH_X_L];
+ event->au16_y[i] = (s16) (buf[FT_TOUCH_Y_H] & 0x0F) << 8 | (s16) buf[FT_TOUCH_Y_L];
+ event->au8_touch_event[i] = buf[FT_TOUCH_EVENT] >> 6;
+
+#if XY_REVERSE
+ event->au16_x[i] = SCREEN_WIDTH - event->au16_x[i] - 1;
+ event->au16_y[i] = SCREEN_HEIGHT - event->au16_y[i] - 1;
+#endif
+ }
+ event->pressure = FT_PRESS;
+
+ return 0;
+}
+
+static void fts_report_value(struct tinker_ft5406_data *ts_data)
+{
+ struct ts_event *event = &ts_data->event;
+ int i, modified_ids = 0, released_ids;
+
+ for (i = 0; i < event->touch_point && i < MAX_TOUCH_POINTS; i++) {
+ if (event->au8_touch_event[i]== FT_TOUCH_DOWN
+ || event->au8_touch_event[i] == FT_TOUCH_CONTACT)
+ {
+ modified_ids |= 1 << event->au8_finger_id[i];
+ input_mt_slot(ts_data->input_dev, event->au8_finger_id[i]);
+ input_mt_report_slot_state(ts_data->input_dev, MT_TOOL_FINGER,
+ true);
+ input_report_abs(ts_data->input_dev, ABS_MT_TOUCH_MAJOR,
+ event->pressure);
+ input_report_abs(ts_data->input_dev, ABS_MT_POSITION_X,
+ event->au16_x[i]);
+ input_report_abs(ts_data->input_dev, ABS_MT_POSITION_Y,
+ event->au16_y[i]);
+
+ if(!((1 << event->au8_finger_id[i]) & ts_data->known_ids))
+ LOG_DBG("Touch id-%d: x = %d, y = %d\n",
+ event->au8_finger_id[i], event->au16_x[i], event->au16_y[i]);
+ }
+ }
+
+ released_ids = ts_data->known_ids & ~modified_ids;
+ for(i = 0; released_ids && i < MAX_TOUCH_POINTS; i++) {
+ if(released_ids & (1<<i)) {
+ LOG_DBG("Release id-%d, known = %x modified = %x\n", i, ts_data->known_ids, modified_ids);
+ input_mt_slot(ts_data->input_dev, i);
+ input_mt_report_slot_state(ts_data->input_dev, MT_TOOL_FINGER, false);
+ modified_ids &= ~(1 << i);
+ }
+ }
+ ts_data->known_ids = modified_ids;
+ input_mt_report_pointer_emulation(ts_data->input_dev, true);
+ input_sync(ts_data->input_dev);
+}
+
+extern int tinker_mcu_is_connected(void);
+
+static void tinker_ft5406_work(struct work_struct *work)
+{
+ struct tinker_ft5406_data *ts_data
+ = container_of(work, struct tinker_ft5406_data, ft5406_work);
+ struct ts_event *event = &ts_data->event;
+ int ret = 0, count = 8, td_status;
+
+ while(count > 0) {
+ ret = fts_check_fw_ver(ts_data->client);
+ if (ret == 0)
+ break;
+ LOG_INFO("checking touch ic, countdown: %d\n", count);
+ msleep(1000);
+ count--;
+ }
+ if (!count) {
+ LOG_ERR("checking touch ic timeout, %d\n", ret);
+ return;
+ }
+
+ //polling 60fps
+ while(1) {
+ td_status = fts_read_td_status(ts_data);
+ if (td_status < VALID_TD_STATUS_VAL+1 && (td_status > 0 || ts_data->known_ids != 0)) {
+ memset(event, -1, sizeof(struct ts_event));
+ event->touch_point = td_status;
+ ret = fts_read_touchdata(ts_data);
+ if (ret == 0)
+ fts_report_value(ts_data);
+ }
+ msleep_interruptible(17);
+ }
+}
+
+static int tinker_ft5406_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct tinker_ft5406_data *ts_data;
+ struct input_dev *input_dev;
+ int ret = 0, timeout = 10;
+
+ LOG_INFO("address = 0x%x\n", client->addr);
+
+ ts_data = kzalloc(sizeof(struct tinker_ft5406_data), GFP_KERNEL);
+ if (ts_data == NULL) {
+ LOG_ERR("no memory for device\n");
+ return -ENOMEM;
+ }
+
+ ts_data->client = client;
+ i2c_set_clientdata(client, ts_data);
+
+ while(!tinker_mcu_is_connected() && timeout > 0) {
+ msleep(50);
+ timeout--;
+ }
+
+ if (timeout == 0) {
+ LOG_ERR("wait connected timeout\n");
+ ret = -ENODEV;
+ goto timeout_failed;
+ }
+
+ input_dev = input_allocate_device();
+ if (!input_dev) {
+ LOG_ERR("failed to allocate input device\n");
+ goto input_allocate_failed;
+ }
+ input_dev->name = "fts_ts";
+ input_dev->id.bustype = BUS_I2C;
+ input_dev->dev.parent = &ts_data->client->dev;
+
+ ts_data->input_dev = input_dev;
+ input_set_drvdata(input_dev, ts_data);
+
+ __set_bit(EV_SYN, input_dev->evbit);
+ __set_bit(EV_KEY, input_dev->evbit);
+ __set_bit(EV_ABS, input_dev->evbit);
+ __set_bit(BTN_TOUCH, input_dev->keybit);
+
+ input_mt_init_slots(input_dev, MAX_TOUCH_POINTS, 0);
+ input_set_abs_params(input_dev, ABS_MT_POSITION_X, 0,
+ SCREEN_WIDTH, 0, 0);
+ input_set_abs_params(input_dev, ABS_MT_POSITION_Y, 0,
+ SCREEN_HEIGHT, 0, 0);
+
+ ret = input_register_device(input_dev);
+ if (ret) {
+ LOG_ERR("Input device registration failed\n");
+ goto input_register_failed;
+ }
+
+ INIT_WORK(&ts_data->ft5406_work, tinker_ft5406_work);
+ schedule_work(&ts_data->ft5406_work);
+
+ return 0;
+
+input_register_failed:
+ input_free_device(input_dev);
+input_allocate_failed:
+timeout_failed:
+ kfree(ts_data);
+ return ret;
+}
+
+static int tinker_ft5406_remove(struct i2c_client *client)
+{
+ struct tinker_ft5406_data *ts_data = i2c_get_clientdata(client);
+
+ cancel_work_sync(&ts_data->ft5406_work);
+ if (ts_data->input_dev) {
+ input_unregister_device(ts_data->input_dev);
+ input_free_device(ts_data->input_dev);
+ }
+ kfree(ts_data);
+ return 0;
+}
+
+static const struct i2c_device_id tinker_ft5406_id[] = {
+ {"tinker_ft5406", 0},
+ {},
+};
+
+static struct i2c_driver tinker_ft5406_driver = {
+ .driver = {
+ .name = "tinker_ft5406",
+ },
+ .probe = tinker_ft5406_probe,
+ .remove = tinker_ft5406_remove,
+ .id_table = tinker_ft5406_id,
+};
+module_i2c_driver(tinker_ft5406_driver);
+
+MODULE_DESCRIPTION("TINKER BOARD FT5406 Touch driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/tinkerboard/dsi/tinker_ft5406.h b/drivers/tinkerboard/dsi/tinker_ft5406.h
new file mode 100644
index 0000000..29684c8
--- /dev/null
+++ b/drivers/tinkerboard/dsi/tinker_ft5406.h
@@ -0,0 +1,63 @@
+#ifndef _TINKER_FT5406_H_
+#define _TINKER_FT5406_H_
+
+#define LOG_DBG(fmt,arg...) pr_debug("tinker-ft5406: %s: "fmt, __func__, ##arg);
+#define LOG_INFO(fmt,arg...) pr_info("tinker-ft5406: %s: "fmt, __func__, ##arg);
+#define LOG_ERR(fmt,arg...) pr_err("tinker-ft5406: %s: "fmt, __func__, ##arg);
+
+#define XY_REVERSE 1
+
+#define SCREEN_WIDTH 800
+#define SCREEN_HEIGHT 480
+
+#define FT_ONE_TCH_LEN 6
+
+#define FT_REG_FW_VER 0xA6
+#define FT_REG_FW_MIN_VER 0xB2
+#define FT_REG_FW_SUB_MIN_VER 0xB3
+
+#define VALID_TD_STATUS_VAL 10
+#define MAX_TOUCH_POINTS 1
+
+#define FT_PRESS 0x7F
+#define FT_MAX_ID 0x0F
+
+#define FT_TOUCH_X_H 0
+#define FT_TOUCH_X_L 1
+#define FT_TOUCH_Y_H 2
+#define FT_TOUCH_Y_L 3
+#define FT_TOUCH_EVENT 0
+#define FT_TOUCH_ID 2
+
+#define FT_TOUCH_X_H_REG 3
+#define FT_TOUCH_X_L_REG 4
+#define FT_TOUCH_Y_H_REG 5
+#define FT_TOUCH_Y_L_REG 6
+#define FT_TD_STATUS_REG 2
+#define FT_TOUCH_EVENT_REG 3
+#define FT_TOUCH_ID_REG 5
+
+#define FT_TOUCH_DOWN 0
+#define FT_TOUCH_CONTACT 2
+
+struct ts_event {
+ u16 au16_x[MAX_TOUCH_POINTS]; /*x coordinate */
+ u16 au16_y[MAX_TOUCH_POINTS]; /*y coordinate */
+ u8 au8_touch_event[MAX_TOUCH_POINTS]; /*touch event: 0:down; 1:up; 2:contact */
+ u8 au8_finger_id[MAX_TOUCH_POINTS]; /*touch ID */
+ u16 pressure;
+ u8 touch_point;
+ u8 point_num;
+};
+
+struct tinker_ft5406_data {
+ struct device *dev;
+ struct i2c_client *client;
+ struct input_dev *input_dev;
+ struct ts_event event;
+ struct work_struct ft5406_work;
+
+ int known_ids;
+};
+
+#endif
\ No newline at end of file
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