build/patch/kernel/archive/rockchip64-4.4/check/0014-media-i2c-add-ov5645-driver.patch

1493 lines
36 KiB
Diff

From da30194f53a867df71c15ad6842c875bc0334f45 Mon Sep 17 00:00:00 2001
From: brian <brian@vamrs.com>
Date: Fri, 16 Nov 2018 15:29:12 +0800
Subject: [PATCH 14/97] media: i2c: add ov5645 driver
---
drivers/media/i2c/Kconfig | 13 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/ov5645.c | 1435 ++++++++++++++++++++++++++++++++++++
3 files changed, 1449 insertions(+)
create mode 100644 drivers/media/i2c/ov5645.c
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 2a0d9512f44a..5d082f2e88fc 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -537,6 +537,19 @@ config VIDEO_OV4689
To compile this driver as a module, choose M here: the
module will be called ov4689.
+config VIDEO_OV5645
+ tristate "OmniVision OV5645 sensor support"
+ depends on OF
+ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
+ depends on MEDIA_CAMERA_SUPPORT
+ select V4L2_FWNODE
+ ---help---
+ This is a Video4Linux2 sensor driver for the OmniVision
+ OV5645 camera.
+
+ To compile this driver as a module, choose M here: the
+ module will be called ov5645.
+
config VIDEO_OV5647
tristate "OmniVision OV5647 sensor support"
depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 377e7ab0e5d7..a46acdd7205b 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -85,6 +85,7 @@ obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o
obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o
obj-$(CONFIG_VIDEO_OV2659) += ov2659.o
obj-$(CONFIG_VIDEO_TC35874X) += tc35874x.o
+obj-$(CONFIG_VIDEO_OV5645) += ov5645.o
obj-$(CONFIG_VIDEO_OV5647) += ov5647.o
obj-$(CONFIG_VIDEO_IMX219) += imx219.o
obj-$(CONFIG_VIDEO_GC2155) += gc2155.o
diff --git a/drivers/media/i2c/ov5645.c b/drivers/media/i2c/ov5645.c
new file mode 100644
index 000000000000..27dd98a6faba
--- /dev/null
+++ b/drivers/media/i2c/ov5645.c
@@ -0,0 +1,1435 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ov5645 driver
+ *
+ * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <linux/sysfs.h>
+#include <media/media-entity.h>
+#include <media/v4l2-async.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-subdev.h>
+#include <linux/pinctrl/consumer.h>
+
+#ifndef V4L2_CID_DIGITAL_GAIN
+#define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
+#endif
+
+#define OV5645_XVCLK_FREQ 24000000
+
+#define OV5645_SYSTEM_CTRL0 0x3008
+#define OV5645_SYSTEM_CTRL0_START 0x02
+#define OV5645_SYSTEM_CTRL0_STOP 0x42
+
+#define CHIP_ID 0x005645
+#define OV5645_REG_CHIP_ID 0x300a
+
+#define REG_NULL 0xFFFF
+
+#define OV5645_REG_VALUE_08BIT 1
+#define OV5645_REG_VALUE_16BIT 2
+#define OV5645_REG_VALUE_24BIT 3
+
+
+#define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
+#define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
+
+#define OV5645_AWB_MANUAL_CONTROL 0x3406
+#define OV5645_AWB_MANUAL_ENABLE BIT(0)
+#define OV5645_AEC_PK_MANUAL 0x3503
+#define OV5645_AEC_MANUAL_ENABLE BIT(0)
+#define OV5645_AGC_MANUAL_ENABLE BIT(1)
+#define OV5645_TIMING_TC_REG20 0x3820
+#define OV5645_SENSOR_VFLIP BIT(1)
+#define OV5645_ISP_VFLIP BIT(2)
+#define OV5645_TIMING_TC_REG21 0x3821
+#define OV5645_SENSOR_MIRROR BIT(1)
+#define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
+#define OV5645_TEST_PATTERN_MASK 0x3
+#define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
+#define OV5645_TEST_PATTERN_ENABLE BIT(7)
+#define OV5645_SDE_SAT_U 0x5583
+#define OV5645_SDE_SAT_V 0x5584
+
+static const struct regval *ov5645_global_regs;
+
+static const char * const ov5645_supply_names[] = {
+ "avdd", /* Analog power */
+ "dovdd", /* Digital I/O power */
+ "dvdd", /* Digital core power */
+};
+
+#define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_names)
+
+struct regval {
+ u16 addr;
+ u8 val;
+};
+
+struct ov5645_mode {
+ u32 width;
+ u32 height;
+ const struct regval *reg_list;
+ u32 data_size;
+ u32 pixel_clock;
+ u32 link_freq;
+};
+
+struct ov5645 {
+ struct i2c_client *client;
+ struct clk *xvclk;
+ struct gpio_desc *reset_gpio;
+ struct gpio_desc *pwdn_gpio;
+ struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES];
+
+ struct device *dev;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default;
+ struct pinctrl_state *pins_sleep;
+ struct v4l2_mbus_framefmt fmt;
+ struct v4l2_subdev subdev;
+ struct v4l2_rect crop;
+ struct media_pad pad;
+ struct v4l2_ctrl_handler ctrl_handler;
+ struct v4l2_ctrl *exposure;
+ struct v4l2_ctrl *anal_gain;
+ struct v4l2_ctrl *digi_gain;
+ struct v4l2_ctrl *hblank;
+ struct v4l2_ctrl *vblank;
+ struct v4l2_ctrl *test_pattern;
+ struct mutex mutex;
+ bool streaming;
+ const struct ov5645_mode *cur_mode;
+ struct v4l2_ctrl *pixel_clock;
+ struct v4l2_ctrl *link_freq;
+
+/* Cached register values */
+ u32 aec_pk_manual;
+ u32 timing_tc_reg20;
+ u32 timing_tc_reg21;
+};
+
+#define to_ov5645(sd) container_of(sd, struct ov5645, subdev)
+
+/*
+ * Xclk 24Mhz
+ */
+static const struct regval ov5645_global_regs_r1a[] = {
+ { 0x3103, 0x11 },
+ { 0x3008, 0x82 },
+ { 0x3008, 0x42 },
+ { 0x3103, 0x03 },
+ { 0x3503, 0x07 },
+ { 0x3002, 0x1c },
+ { 0x3006, 0xc3 },
+ { 0x300e, 0x45 },
+ { 0x3017, 0x00 },
+ { 0x3018, 0x00 },
+ { 0x302e, 0x0b },
+ { 0x3037, 0x13 },
+ { 0x3108, 0x01 },
+ { 0x3611, 0x06 },
+ { 0x3500, 0x00 },
+ { 0x3501, 0x01 },
+ { 0x3502, 0x00 },
+ { 0x350a, 0x00 },
+ { 0x350b, 0x3f },
+ { 0x3620, 0x33 },
+ { 0x3621, 0xe0 },
+ { 0x3622, 0x01 },
+ { 0x3630, 0x2e },
+ { 0x3631, 0x00 },
+ { 0x3632, 0x32 },
+ { 0x3633, 0x52 },
+ { 0x3634, 0x70 },
+ { 0x3635, 0x13 },
+ { 0x3636, 0x03 },
+ { 0x3703, 0x5a },
+ { 0x3704, 0xa0 },
+ { 0x3705, 0x1a },
+ { 0x3709, 0x12 },
+ { 0x370b, 0x61 },
+ { 0x370f, 0x10 },
+ { 0x3715, 0x78 },
+ { 0x3717, 0x01 },
+ { 0x371b, 0x20 },
+ { 0x3731, 0x12 },
+ { 0x3901, 0x0a },
+ { 0x3905, 0x02 },
+ { 0x3906, 0x10 },
+ { 0x3719, 0x86 },
+ { 0x3810, 0x00 },
+ { 0x3811, 0x10 },
+ { 0x3812, 0x00 },
+ { 0x3821, 0x01 },
+ { 0x3824, 0x01 },
+ { 0x3826, 0x03 },
+ { 0x3828, 0x08 },
+ { 0x3a19, 0xf8 },
+ { 0x3c01, 0x34 },
+ { 0x3c04, 0x28 },
+ { 0x3c05, 0x98 },
+ { 0x3c07, 0x07 },
+ { 0x3c09, 0xc2 },
+ { 0x3c0a, 0x9c },
+ { 0x3c0b, 0x40 },
+ { 0x3c01, 0x34 },
+ { 0x4001, 0x02 },
+ { 0x4514, 0x00 },
+ { 0x4520, 0xb0 },
+ { 0x460b, 0x37 },
+ { 0x460c, 0x20 },
+ { 0x4818, 0x01 },
+ { 0x481d, 0xf0 },
+ { 0x481f, 0x50 },
+ { 0x4823, 0x70 },
+ { 0x4831, 0x14 },
+ { 0x5000, 0xa7 },
+ { 0x5001, 0x83 },
+ { 0x501d, 0x00 },
+ { 0x501f, 0x00 },
+ { 0x503d, 0x00 },
+ { 0x505c, 0x30 },
+ { 0x5181, 0x59 },
+ { 0x5183, 0x00 },
+ { 0x5191, 0xf0 },
+ { 0x5192, 0x03 },
+ { 0x5684, 0x10 },
+ { 0x5685, 0xa0 },
+ { 0x5686, 0x0c },
+ { 0x5687, 0x78 },
+ { 0x5a00, 0x08 },
+ { 0x5a21, 0x00 },
+ { 0x5a24, 0x00 },
+ { 0x3008, 0x02 },
+ { 0x3503, 0x00 },
+ { 0x5180, 0xff },
+ { 0x5181, 0xf2 },
+ { 0x5182, 0x00 },
+ { 0x5183, 0x14 },
+ { 0x5184, 0x25 },
+ { 0x5185, 0x24 },
+ { 0x5186, 0x09 },
+ { 0x5187, 0x09 },
+ { 0x5188, 0x0a },
+ { 0x5189, 0x75 },
+ { 0x518a, 0x52 },
+ { 0x518b, 0xea },
+ { 0x518c, 0xa8 },
+ { 0x518d, 0x42 },
+ { 0x518e, 0x38 },
+ { 0x518f, 0x56 },
+ { 0x5190, 0x42 },
+ { 0x5191, 0xf8 },
+ { 0x5192, 0x04 },
+ { 0x5193, 0x70 },
+ { 0x5194, 0xf0 },
+ { 0x5195, 0xf0 },
+ { 0x5196, 0x03 },
+ { 0x5197, 0x01 },
+ { 0x5198, 0x04 },
+ { 0x5199, 0x12 },
+ { 0x519a, 0x04 },
+ { 0x519b, 0x00 },
+ { 0x519c, 0x06 },
+ { 0x519d, 0x82 },
+ { 0x519e, 0x38 },
+ { 0x5381, 0x1e },
+ { 0x5382, 0x5b },
+ { 0x5383, 0x08 },
+ { 0x5384, 0x0a },
+ { 0x5385, 0x7e },
+ { 0x5386, 0x88 },
+ { 0x5387, 0x7c },
+ { 0x5388, 0x6c },
+ { 0x5389, 0x10 },
+ { 0x538a, 0x01 },
+ { 0x538b, 0x98 },
+ { 0x5300, 0x08 },
+ { 0x5301, 0x30 },
+ { 0x5302, 0x10 },
+ { 0x5303, 0x00 },
+ { 0x5304, 0x08 },
+ { 0x5305, 0x30 },
+ { 0x5306, 0x08 },
+ { 0x5307, 0x16 },
+ { 0x5309, 0x08 },
+ { 0x530a, 0x30 },
+ { 0x530b, 0x04 },
+ { 0x530c, 0x06 },
+ { 0x5480, 0x01 },
+ { 0x5481, 0x08 },
+ { 0x5482, 0x14 },
+ { 0x5483, 0x28 },
+ { 0x5484, 0x51 },
+ { 0x5485, 0x65 },
+ { 0x5486, 0x71 },
+ { 0x5487, 0x7d },
+ { 0x5488, 0x87 },
+ { 0x5489, 0x91 },
+ { 0x548a, 0x9a },
+ { 0x548b, 0xaa },
+ { 0x548c, 0xb8 },
+ { 0x548d, 0xcd },
+ { 0x548e, 0xdd },
+ { 0x548f, 0xea },
+ { 0x5490, 0x1d },
+ { 0x5580, 0x02 },
+ { 0x5583, 0x40 },
+ { 0x5584, 0x10 },
+ { 0x5589, 0x10 },
+ { 0x558a, 0x00 },
+ { 0x558b, 0xf8 },
+ { 0x5800, 0x3f },
+ { 0x5801, 0x16 },
+ { 0x5802, 0x0e },
+ { 0x5803, 0x0d },
+ { 0x5804, 0x17 },
+ { 0x5805, 0x3f },
+ { 0x5806, 0x0b },
+ { 0x5807, 0x06 },
+ { 0x5808, 0x04 },
+ { 0x5809, 0x04 },
+ { 0x580a, 0x06 },
+ { 0x580b, 0x0b },
+ { 0x580c, 0x09 },
+ { 0x580d, 0x03 },
+ { 0x580e, 0x00 },
+ { 0x580f, 0x00 },
+ { 0x5810, 0x03 },
+ { 0x5811, 0x08 },
+ { 0x5812, 0x0a },
+ { 0x5813, 0x03 },
+ { 0x5814, 0x00 },
+ { 0x5815, 0x00 },
+ { 0x5816, 0x04 },
+ { 0x5817, 0x09 },
+ { 0x5818, 0x0f },
+ { 0x5819, 0x08 },
+ { 0x581a, 0x06 },
+ { 0x581b, 0x06 },
+ { 0x581c, 0x08 },
+ { 0x581d, 0x0c },
+ { 0x581e, 0x3f },
+ { 0x581f, 0x1e },
+ { 0x5820, 0x12 },
+ { 0x5821, 0x13 },
+ { 0x5822, 0x21 },
+ { 0x5823, 0x3f },
+ { 0x5824, 0x68 },
+ { 0x5825, 0x28 },
+ { 0x5826, 0x2c },
+ { 0x5827, 0x28 },
+ { 0x5828, 0x08 },
+ { 0x5829, 0x48 },
+ { 0x582a, 0x64 },
+ { 0x582b, 0x62 },
+ { 0x582c, 0x64 },
+ { 0x582d, 0x28 },
+ { 0x582e, 0x46 },
+ { 0x582f, 0x62 },
+ { 0x5830, 0x60 },
+ { 0x5831, 0x62 },
+ { 0x5832, 0x26 },
+ { 0x5833, 0x48 },
+ { 0x5834, 0x66 },
+ { 0x5835, 0x44 },
+ { 0x5836, 0x64 },
+ { 0x5837, 0x28 },
+ { 0x5838, 0x66 },
+ { 0x5839, 0x48 },
+ { 0x583a, 0x2c },
+ { 0x583b, 0x28 },
+ { 0x583c, 0x26 },
+ { 0x583d, 0xae },
+ { 0x5025, 0x00 },
+ { 0x3a0f, 0x30 },
+ { 0x3a10, 0x28 },
+ { 0x3a1b, 0x30 },
+ { 0x3a1e, 0x26 },
+ { 0x3a11, 0x60 },
+ { 0x3a1f, 0x14 },
+ { 0x0601, 0x02 },
+ { 0x3008, 0x42 },
+ { 0x3008, 0x02 },
+ {REG_NULL, 0x00},
+};
+
+
+static const struct regval ov5645_setting_sxga[] = {
+ { 0x3612, 0xa9 },
+ { 0x3614, 0x50 },
+ { 0x3618, 0x00 },
+ { 0x3034, 0x18 },
+ { 0x3035, 0x21 },
+ { 0x3036, 0x70 },
+ { 0x3600, 0x09 },
+ { 0x3601, 0x43 },
+ { 0x3708, 0x66 },
+ { 0x370c, 0xc3 },
+ { 0x3800, 0x00 },
+ { 0x3801, 0x00 },
+ { 0x3802, 0x00 },
+ { 0x3803, 0x06 },
+ { 0x3804, 0x0a },
+ { 0x3805, 0x3f },
+ { 0x3806, 0x07 },
+ { 0x3807, 0x9d },
+ { 0x3808, 0x05 },
+ { 0x3809, 0x00 },
+ { 0x380a, 0x03 },
+ { 0x380b, 0xc0 },
+ { 0x380c, 0x07 },
+ { 0x380d, 0x68 },
+ { 0x380e, 0x03 },
+ { 0x380f, 0xd8 },
+ { 0x3813, 0x06 },
+ { 0x3814, 0x31 },
+ { 0x3815, 0x31 },
+ { 0x3820, 0x47 },
+ { 0x3a02, 0x03 },
+ { 0x3a03, 0xd8 },
+ { 0x3a08, 0x01 },
+ { 0x3a09, 0xf8 },
+ { 0x3a0a, 0x01 },
+ { 0x3a0b, 0xa4 },
+ { 0x3a0e, 0x02 },
+ { 0x3a0d, 0x02 },
+ { 0x3a14, 0x03 },
+ { 0x3a15, 0xd8 },
+ { 0x3a18, 0x00 },
+ { 0x4004, 0x02 },
+ { 0x4005, 0x18 },
+ { 0x4300, 0x32 },
+ { 0x4202, 0x00 },
+ {REG_NULL, 0x00},
+};
+
+static const struct regval ov5645_setting_1080p[] = {
+ { 0x3612, 0xab },
+ { 0x3614, 0x50 },
+ { 0x3618, 0x04 },
+ { 0x3034, 0x18 },
+ { 0x3035, 0x11 },
+ { 0x3036, 0x54 },
+ { 0x3600, 0x08 },
+ { 0x3601, 0x33 },
+ { 0x3708, 0x63 },
+ { 0x370c, 0xc0 },
+ { 0x3800, 0x01 },
+ { 0x3801, 0x50 },
+ { 0x3802, 0x01 },
+ { 0x3803, 0xb2 },
+ { 0x3804, 0x08 },
+ { 0x3805, 0xef },
+ { 0x3806, 0x05 },
+ { 0x3807, 0xf1 },
+ { 0x3808, 0x07 },
+ { 0x3809, 0x80 },
+ { 0x380a, 0x04 },
+ { 0x380b, 0x38 },
+ { 0x380c, 0x09 },
+ { 0x380d, 0xc4 },
+ { 0x380e, 0x04 },
+ { 0x380f, 0x60 },
+ { 0x3813, 0x04 },
+ { 0x3814, 0x11 },
+ { 0x3815, 0x11 },
+ { 0x3820, 0x47 },
+ { 0x4514, 0x88 },
+ { 0x3a02, 0x04 },
+ { 0x3a03, 0x60 },
+ { 0x3a08, 0x01 },
+ { 0x3a09, 0x50 },
+ { 0x3a0a, 0x01 },
+ { 0x3a0b, 0x18 },
+ { 0x3a0e, 0x03 },
+ { 0x3a0d, 0x04 },
+ { 0x3a14, 0x04 },
+ { 0x3a15, 0x60 },
+ { 0x3a18, 0x00 },
+ { 0x4004, 0x06 },
+ { 0x4005, 0x18 },
+ { 0x4300, 0x32 },
+ { 0x4202, 0x00 },
+ { 0x4837, 0x0b },
+ {REG_NULL, 0x00},
+};
+
+static const struct regval ov5645_setting_full[] = {
+ { 0x3612, 0xab },
+ { 0x3614, 0x50 },
+ { 0x3618, 0x04 },
+ { 0x3034, 0x18 },
+ { 0x3035, 0x11 },
+ { 0x3036, 0x54 },
+ { 0x3600, 0x08 },
+ { 0x3601, 0x33 },
+ { 0x3708, 0x63 },
+ { 0x370c, 0xc0 },
+ { 0x3800, 0x00 },
+ { 0x3801, 0x00 },
+ { 0x3802, 0x00 },
+ { 0x3803, 0x00 },
+ { 0x3804, 0x0a },
+ { 0x3805, 0x3f },
+ { 0x3806, 0x07 },
+ { 0x3807, 0x9f },
+ { 0x3808, 0x0a },
+ { 0x3809, 0x20 },
+ { 0x380a, 0x07 },
+ { 0x380b, 0x98 },
+ { 0x380c, 0x0b },
+ { 0x380d, 0x1c },
+ { 0x380e, 0x07 },
+ { 0x380f, 0xb0 },
+ { 0x3813, 0x06 },
+ { 0x3814, 0x11 },
+ { 0x3815, 0x11 },
+ { 0x3820, 0x47 },
+ { 0x4514, 0x88 },
+ { 0x3a02, 0x07 },
+ { 0x3a03, 0xb0 },
+ { 0x3a08, 0x01 },
+ { 0x3a09, 0x27 },
+ { 0x3a0a, 0x00 },
+ { 0x3a0b, 0xf6 },
+ { 0x3a0e, 0x06 },
+ { 0x3a0d, 0x08 },
+ { 0x3a14, 0x07 },
+ { 0x3a15, 0xb0 },
+ { 0x3a18, 0x01 },
+ { 0x4004, 0x06 },
+ { 0x4005, 0x18 },
+ { 0x4300, 0x32 },
+ { 0x4837, 0x0b },
+ { 0x4202, 0x00 },
+ {REG_NULL, 0x00},
+};
+
+static const struct ov5645_mode supported_modes[] = {
+ {
+ .width = 1280,
+ .height = 960,
+ .reg_list = ov5645_setting_sxga,
+ .data_size = ARRAY_SIZE(ov5645_setting_sxga),
+ .pixel_clock = 112000000,
+ .link_freq = 0 /* an index in link_freq[] */
+ },
+ {
+ .width = 1920,
+ .height = 1080,
+ .reg_list = ov5645_setting_1080p,
+ .data_size = ARRAY_SIZE(ov5645_setting_1080p),
+ .pixel_clock = 168000000,
+ .link_freq = 1 /* an index in link_freq[] */
+ },
+ {
+ .width = 2592,
+ .height = 1944,
+ .reg_list = ov5645_setting_full,
+ .data_size = ARRAY_SIZE(ov5645_setting_full),
+ .pixel_clock = 168000000,
+ .link_freq = 1 /* an index in link_freq[] */
+ },
+};
+
+static const s64 link_freq_menu_items[] = {
+ 224000000,
+ 336000000
+};
+
+/* Write registers up to 4 at a time */
+static int ov5645_write_reg(struct i2c_client *client, u16 reg,
+ u32 len, u32 val)
+{
+ u32 buf_i, val_i;
+ u8 buf[6];
+ u8 *val_p;
+ __be32 val_be;
+
+ if (len > 4)
+ return -EINVAL;
+
+ buf[0] = reg >> 8;
+ buf[1] = reg & 0xff;
+
+ val_be = cpu_to_be32(val);
+ val_p = (u8 *)&val_be;
+ buf_i = 2;
+ val_i = 4 - len;
+
+ while (val_i < 4)
+ buf[buf_i++] = val_p[val_i++];
+
+ if (i2c_master_send(client, buf, len + 2) != len + 2)
+ return -EIO;
+
+ return 0;
+}
+
+static int ov5645_write_array(struct i2c_client *client,
+ const struct regval *regs)
+{
+ u32 i;
+ int ret = 0;
+
+ for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
+ ret = ov5645_write_reg(client, regs[i].addr,
+ OV5645_REG_VALUE_08BIT,
+ regs[i].val);
+
+ return ret;
+}
+
+/* Read registers up to 4 at a time */
+static int ov5645_read_reg(struct i2c_client *client, u16 reg,
+ unsigned int len, u32 *val)
+{
+ struct i2c_msg msgs[2];
+ u8 *data_be_p;
+ __be32 data_be = 0;
+ __be16 reg_addr_be = cpu_to_be16(reg);
+ int ret;
+
+ if (len > 4 || !len)
+ return -EINVAL;
+
+ data_be_p = (u8 *)&data_be;
+ /* Write register address */
+ msgs[0].addr = client->addr;
+ msgs[0].flags = 0;
+ msgs[0].len = 2;
+ msgs[0].buf = (u8 *)&reg_addr_be;
+
+ /* Read data from register */
+ msgs[1].addr = client->addr;
+ msgs[1].flags = I2C_M_RD;
+ msgs[1].len = len;
+ msgs[1].buf = &data_be_p[4 - len];
+
+ ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
+ if (ret != ARRAY_SIZE(msgs))
+ return -EIO;
+
+ *val = be32_to_cpu(data_be);
+
+ return 0;
+}
+
+static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
+{
+ u8 val = ov5645->aec_pk_manual;
+ int ret;
+
+ if (mode == V4L2_EXPOSURE_AUTO)
+ val &= ~OV5645_AEC_MANUAL_ENABLE;
+ else /* V4L2_EXPOSURE_MANUAL */
+ val |= OV5645_AEC_MANUAL_ENABLE;
+
+ ret = ov5645_write_reg(ov5645->client, OV5645_AEC_PK_MANUAL,OV5645_REG_VALUE_08BIT,(u32)val);
+ if (!ret)
+ ov5645->aec_pk_manual = val;
+
+ return ret;
+}
+
+static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
+{
+ u8 val = ov5645->aec_pk_manual;
+ int ret;
+
+ if (enable)
+ val &= ~OV5645_AGC_MANUAL_ENABLE;
+ else
+ val |= OV5645_AGC_MANUAL_ENABLE;
+
+ ret = ov5645_write_reg(ov5645->client, OV5645_AEC_PK_MANUAL, OV5645_REG_VALUE_08BIT,(u32)val);
+ if (!ret)
+ ov5645->aec_pk_manual = val;
+
+ return ret;
+}
+
+static struct v4l2_rect *
+__ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg,
+ unsigned int pad, enum v4l2_subdev_format_whence which)
+{
+ switch (which) {
+ case V4L2_SUBDEV_FORMAT_TRY:
+ return v4l2_subdev_get_try_crop(&ov5645->subdev, cfg, pad);
+ case V4L2_SUBDEV_FORMAT_ACTIVE:
+ return &ov5645->crop;
+ default:
+ return NULL;
+ }
+
+}
+
+static struct v4l2_mbus_framefmt *
+__ov5645_get_pad_format(struct ov5645 *ov5645,
+ struct v4l2_subdev_pad_config *cfg,
+ unsigned int pad,
+ enum v4l2_subdev_format_whence which)
+{
+ switch (which) {
+ case V4L2_SUBDEV_FORMAT_TRY:
+ return v4l2_subdev_get_try_format(&ov5645->subdev, cfg, pad);
+ case V4L2_SUBDEV_FORMAT_ACTIVE:
+ return &ov5645->fmt;
+ default:
+ return NULL;
+ }
+}
+
+static int ov5645_get_reso_dist(const struct ov5645_mode *mode,
+ struct v4l2_mbus_framefmt *framefmt)
+{
+ return abs(mode->width - framefmt->width) +
+ abs(mode->height - framefmt->height);
+}
+
+static const struct ov5645_mode *
+ov5645_find_best_fit(struct v4l2_subdev_format *fmt)
+{
+ struct v4l2_mbus_framefmt *framefmt = &fmt->format;
+ int dist;
+ int cur_best_fit = 0;
+ int cur_best_fit_dist = -1;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
+ dist = ov5645_get_reso_dist(&supported_modes[i], framefmt);
+ if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
+ cur_best_fit_dist = dist;
+ cur_best_fit = i;
+ }
+ }
+
+ return &supported_modes[cur_best_fit];
+}
+
+static int ov5645_set_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+ struct ov5645 *ov5645 = to_ov5645(sd);
+ struct v4l2_mbus_framefmt *__format;
+ struct v4l2_rect *__crop;
+ const struct ov5645_mode *new_mode;
+ int ret;
+
+ __crop = __ov5645_get_pad_crop(ov5645, cfg, fmt->pad,
+ fmt->which);
+
+ new_mode = ov5645_find_best_fit(fmt);
+
+ __crop->width = new_mode->width;
+ __crop->height = new_mode->height;
+
+ if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
+ ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
+ new_mode->pixel_clock);
+ if (ret < 0)
+ return ret;
+
+ ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
+ new_mode->link_freq);
+ if (ret < 0)
+ return ret;
+
+ ov5645->cur_mode = new_mode;
+ }
+
+ __format = __ov5645_get_pad_format(ov5645, cfg, fmt->pad,
+ fmt->which);
+ __format->width = __crop->width;
+ __format->height = __crop->height;
+ __format->code = MEDIA_BUS_FMT_UYVY8_2X8;
+ __format->field = V4L2_FIELD_NONE;
+ __format->colorspace = V4L2_COLORSPACE_SRGB;
+
+ fmt->format = *__format;
+
+ return 0;
+}
+
+static int ov5645_get_fmt(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_format *fmt)
+{
+
+ struct ov5645 *ov5645 = to_ov5645(sd);
+ const struct ov5645_mode *mode = ov5645->cur_mode;
+
+ mutex_lock(&ov5645->mutex);
+ if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+ fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
+#else
+ mutex_unlock(&ov5645->mutex);
+ return -ENOTTY;
+#endif
+ } else {
+ fmt->format.width = mode->width;
+ fmt->format.height = mode->height;
+ fmt->format.code = MEDIA_BUS_FMT_UYVY8_2X8;//MEDIA_BUS_FMT_SBGGR10_1X10;
+ fmt->format.field = V4L2_FIELD_NONE;
+ }
+ mutex_unlock(&ov5645->mutex);
+
+ return 0;
+}
+
+static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->index > 0)
+ return -EINVAL;
+
+ code->code = MEDIA_BUS_FMT_UYVY8_2X8;
+
+ return 0;
+}
+
+static int ov5645_enum_frame_sizes(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_frame_size_enum *fse)
+{
+ if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
+ return -EINVAL;
+
+ if (fse->index >= ARRAY_SIZE(supported_modes))
+ return -EINVAL;
+
+ fse->min_width = supported_modes[fse->index].width;
+ fse->max_width = supported_modes[fse->index].width;
+ fse->min_height = supported_modes[fse->index].height;
+ fse->max_height = supported_modes[fse->index].height;
+
+ return 0;
+}
+static int ov5645_s_stream(struct v4l2_subdev *sd, int on)
+{
+ struct ov5645 *ov5645 = to_ov5645(sd);
+ int ret = 0;
+ struct i2c_client *client = ov5645->client;
+
+ mutex_lock(&ov5645->mutex);
+ on = !!on;
+
+ if(on == ov5645->streaming)
+ goto unlock_and_return;
+
+ if (on) {
+ ret = pm_runtime_get_sync(&client->dev);
+
+ if(ret < 0) {
+ pm_runtime_put_noidle(&client->dev);
+ goto unlock_and_return;
+ }
+
+ ret = ov5645_write_array(ov5645->client, ov5645_global_regs_r1a);
+ if (ret){
+
+ pm_runtime_put(&client->dev);
+ goto unlock_and_return;
+ }
+ ret = ov5645_write_array(ov5645->client,
+ ov5645->cur_mode->reg_list);
+ if (ret < 0) {
+ dev_err(ov5645->dev, "could not set mode %dx%d\n",
+ ov5645->cur_mode->width,
+ ov5645->cur_mode->height);
+ pm_runtime_put(&client->dev);
+ goto unlock_and_return;
+ }
+ mutex_unlock(&ov5645->mutex);
+ ret = v4l2_ctrl_handler_setup(&ov5645->ctrl_handler);
+ mutex_lock(&ov5645->mutex);
+ if (ret < 0) {
+ dev_err(ov5645->dev, "could not sync v4l2 controls\n");
+ pm_runtime_put(&client->dev);
+ goto unlock_and_return;
+ }
+ ret = ov5645_write_reg(ov5645->client, OV5645_SYSTEM_CTRL0,
+ OV5645_REG_VALUE_08BIT,
+ OV5645_SYSTEM_CTRL0_START);
+ if (ret < 0){
+ pm_runtime_put(&client->dev);
+ goto unlock_and_return;
+ }
+ } else {
+ ov5645_write_reg(ov5645->client, OV5645_SYSTEM_CTRL0,
+ OV5645_REG_VALUE_08BIT,
+ OV5645_SYSTEM_CTRL0_STOP);
+ pm_runtime_put(&client->dev);
+ }
+
+ ov5645->streaming = on;
+
+unlock_and_return:
+ mutex_unlock(&ov5645->mutex);
+
+ return ret;
+
+}
+
+static int __ov5645_power_on(struct ov5645 *ov5645)
+{
+ int ret;
+ struct device *dev = &ov5645->client->dev;
+
+ if (!IS_ERR_OR_NULL(ov5645->pins_default)) {
+ ret = pinctrl_select_state(ov5645->pinctrl,
+ ov5645->pins_default);
+ if (ret < 0)
+ dev_err(dev, "could not set pins\n");
+ }
+
+ ret = clk_prepare_enable(ov5645->xvclk);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enable xvclk\n");
+ return ret;
+ }
+
+ if (!IS_ERR(ov5645->reset_gpio))
+ gpiod_set_value_cansleep(ov5645->reset_gpio, 0);
+
+ ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, ov5645->supplies);
+ if (ret < 0) {
+ dev_err(dev, "Failed to enable regulators\n");
+ goto disable_clk;
+ }
+
+ usleep_range(5000, 15000);
+ if (!IS_ERR(ov5645->reset_gpio))
+ gpiod_set_value_cansleep(ov5645->reset_gpio, 1);
+
+ usleep_range(1000, 2000);
+ if (!IS_ERR(ov5645->pwdn_gpio))
+ gpiod_set_value_cansleep(ov5645->pwdn_gpio, 1);
+
+ msleep(20);
+
+ return 0;
+
+disable_clk:
+ clk_disable_unprepare(ov5645->xvclk);
+
+ return ret;
+}
+
+static void __ov5645_power_off(struct ov5645 *ov5645)
+{
+ int ret;
+ struct device *dev = &ov5645->client->dev;
+
+ if (!IS_ERR(ov5645->pwdn_gpio))
+ gpiod_set_value_cansleep(ov5645->pwdn_gpio, 0);
+ clk_disable_unprepare(ov5645->xvclk);
+ if (!IS_ERR(ov5645->reset_gpio))
+ gpiod_set_value_cansleep(ov5645->reset_gpio, 0);
+ if (!IS_ERR_OR_NULL(ov5645->pins_sleep)) {
+ ret = pinctrl_select_state(ov5645->pinctrl,
+ ov5645->pins_sleep);
+ if (ret < 0)
+ dev_dbg(dev, "could not set pins\n");
+ }
+ regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
+}
+
+static int ov5645_runtime_resume(struct device *dev)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov5645 *ov5645 = to_ov5645(sd);
+
+ return __ov5645_power_on(ov5645);
+}
+
+static int ov5645_runtime_suspend(struct device *dev)
+{
+ struct i2c_client *client = to_i2c_client(dev);
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov5645 *ov5645 = to_ov5645(sd);
+
+ __ov5645_power_off(ov5645);
+
+ return 0;
+}
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static int ov5645_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+ struct ov5645 *ov5645 = to_ov5645(sd);
+ struct v4l2_mbus_framefmt *try_fmt =
+ v4l2_subdev_get_try_format(sd, fh->pad, 0);
+ const struct ov5645_mode *def_mode = &supported_modes[0];
+
+ mutex_lock(&ov5645->mutex);
+ /* Initialize try_fmt */
+ try_fmt->width = def_mode->width;
+ try_fmt->height = def_mode->height;
+ try_fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;//MEDIA_BUS_FMT_SBGGR10_1X10;
+ try_fmt->field = V4L2_FIELD_NONE;
+
+ mutex_unlock(&ov5645->mutex);
+ /* No crop or compose */
+
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops ov5645_pm_ops = {
+ SET_RUNTIME_PM_OPS(ov5645_runtime_suspend,
+ ov5645_runtime_resume, NULL)
+};
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+static const struct v4l2_subdev_internal_ops ov5645_internal_ops = {
+ .open = ov5645_open,
+};
+#endif
+
+static const struct v4l2_subdev_video_ops ov5645_video_ops = {
+ .s_stream = ov5645_s_stream,
+};
+#if 0
+static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
+ struct v4l2_subdev_pad_config *cfg)
+{
+ struct v4l2_subdev_format fmt = { 0 };
+
+ fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
+ fmt.format.width = 1920;
+ fmt.format.height = 1080;
+
+ ov5645_set_fmt(subdev, cfg, &fmt);
+
+ return 0;
+}
+#endif
+static int ov5645_get_selection(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_selection *sel)
+{
+ struct ov5645 *ov5645 = to_ov5645(sd);
+
+ if (sel->target != V4L2_SEL_TGT_CROP)
+ return -EINVAL;
+
+ sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad,
+ sel->which);
+ return 0;
+}
+
+static const struct v4l2_subdev_pad_ops ov5645_pad_ops = {
+// .init_cfg = ov5645_entity_init_cfg,
+ .enum_mbus_code = ov5645_enum_mbus_code,
+ .enum_frame_size = ov5645_enum_frame_sizes,
+ .get_fmt = ov5645_get_fmt,
+ .set_fmt = ov5645_set_fmt,
+ .get_selection = ov5645_get_selection,
+};
+
+static const struct v4l2_subdev_ops ov5645_subdev_ops = {
+ .video = &ov5645_video_ops,
+ .pad = &ov5645_pad_ops,
+};
+
+static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
+{
+ u32 reg_value = (value * 0x10) + 0x40;
+ int ret;
+ ret = ov5645_write_reg(ov5645->client, OV5645_SDE_SAT_U, OV5645_REG_VALUE_08BIT,reg_value);
+ if (ret < 0)
+ {
+ return ret;
+ }
+ return ov5645_write_reg(ov5645->client, OV5645_SDE_SAT_V,OV5645_REG_VALUE_08BIT, reg_value);
+}
+
+static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
+{
+ u8 val = ov5645->timing_tc_reg21;
+ int ret;
+
+ if (value == 0)
+ val &= ~(OV5645_SENSOR_MIRROR);
+ else
+ val |= (OV5645_SENSOR_MIRROR);
+
+ ret = ov5645_write_reg(ov5645->client, OV5645_TIMING_TC_REG21,OV5645_REG_VALUE_08BIT, val);
+ if (!ret)
+ ov5645->timing_tc_reg21 = val;
+
+ return ret;
+}
+
+static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
+{
+ u8 val = ov5645->timing_tc_reg20;
+ int ret;
+
+ if (value == 0)
+ val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
+ else
+ val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
+
+ ret = ov5645_write_reg(ov5645->client, OV5645_TIMING_TC_REG20,OV5645_REG_VALUE_08BIT, val);
+ if (!ret)
+ ov5645->timing_tc_reg20 = val;
+
+ return ret;
+}
+
+static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
+{
+ u8 val = 0;
+
+ if (value) {
+ val = OV5645_SET_TEST_PATTERN(value - 1);
+ val |= OV5645_TEST_PATTERN_ENABLE;
+ }
+
+ return ov5645_write_reg(ov5645->client, OV5645_PRE_ISP_TEST_SETTING_1,OV5645_REG_VALUE_08BIT, val);
+}
+
+static const char * const ov5645_test_pattern_menu[] = {
+ "Disabled",
+ "Vertical Color Bars",
+ "Pseudo-Random Data",
+ "Color Square",
+ "Black Image",
+};
+
+static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
+{
+ u8 val = 0;
+
+ if (!enable_auto)
+ val = OV5645_AWB_MANUAL_ENABLE;
+
+ return ov5645_write_reg(ov5645->client, OV5645_AWB_MANUAL_CONTROL,OV5645_REG_VALUE_08BIT, val);
+}
+
+static int ov5645_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct ov5645 *ov5645 = container_of(ctrl->handler,
+ struct ov5645, ctrl_handler);
+ struct i2c_client *client = ov5645->client;
+ int ret = 0;
+
+ if (pm_runtime_get(&client->dev) <= 0)
+ return 0;
+
+ switch (ctrl->id) {
+ case V4L2_CID_SATURATION:
+ ret = ov5645_set_saturation(ov5645, ctrl->val);
+ break;
+ case V4L2_CID_AUTO_WHITE_BALANCE:
+ ret = ov5645_set_awb(ov5645, ctrl->val);
+ break;
+ case V4L2_CID_AUTOGAIN:
+ ret = ov5645_set_agc_mode(ov5645, ctrl->val);
+ break;
+ case V4L2_CID_EXPOSURE_AUTO:
+ ret = ov5645_set_aec_mode(ov5645, ctrl->val);
+ break;
+ case V4L2_CID_TEST_PATTERN:
+ ret = ov5645_set_test_pattern(ov5645, ctrl->val);
+ break;
+ case V4L2_CID_HFLIP:
+ ret = ov5645_set_hflip(ov5645, ctrl->val);
+ break;
+ case V4L2_CID_VFLIP:
+ ret = ov5645_set_vflip(ov5645, ctrl->val);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ pm_runtime_put(&client->dev);
+
+ return ret;
+}
+
+static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
+ .s_ctrl = ov5645_set_ctrl,
+};
+
+static int ov5645_check_sensor_id(struct ov5645 *ov5645,
+ struct i2c_client *client)
+{
+ struct device *dev = &ov5645->client->dev;
+ u32 id = 0;
+ int ret;
+
+ ret = ov5645_read_reg(client, OV5645_REG_CHIP_ID,
+ OV5645_REG_VALUE_16BIT, &id);
+ if (id != CHIP_ID) {
+ dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
+ return ret;
+ }
+
+ ov5645_global_regs = ov5645_global_regs_r1a;
+
+ dev_info(dev, "Detected OV%06x sensor, REVISION 0x%x\n", CHIP_ID, id);
+
+ return 0;
+}
+
+static int ov5645_configure_regulators(struct ov5645 *ov5645)
+{
+ unsigned int i;
+
+ for (i = 0; i < OV5645_NUM_SUPPLIES; i++)
+ ov5645->supplies[i].supply = ov5645_supply_names[i];
+
+ return devm_regulator_bulk_get(&ov5645->client->dev,
+ OV5645_NUM_SUPPLIES,
+ ov5645->supplies);
+}
+
+static int ov5645_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ struct ov5645 *ov5645;
+ struct v4l2_subdev *sd;
+ int ret;
+
+ ov5645 = devm_kzalloc(dev, sizeof(*ov5645), GFP_KERNEL);
+ if (!ov5645)
+ return -ENOMEM;
+
+ ov5645->client = client;
+ ov5645->cur_mode = &supported_modes[0];
+
+ ov5645->xvclk = devm_clk_get(dev, "xvclk");
+ if (IS_ERR(ov5645->xvclk)) {
+ dev_err(dev, "Failed to get xvclk\n");
+ return -EINVAL;
+ }
+ ret = clk_set_rate(ov5645->xvclk, OV5645_XVCLK_FREQ);
+ if (ret < 0) {
+ dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
+ return ret;
+ }
+ if (clk_get_rate(ov5645->xvclk) != OV5645_XVCLK_FREQ)
+ dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
+
+ ov5645->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+ if (IS_ERR(ov5645->reset_gpio))
+ dev_warn(dev, "Failed to get reset-gpios\n");
+
+ ov5645->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
+ if (IS_ERR(ov5645->pwdn_gpio))
+ dev_warn(dev, "Failed to get pwdn-gpios\n");
+
+ ret = ov5645_configure_regulators(ov5645);
+ if (ret) {
+ dev_err(dev, "Failed to get power regulators\n");
+ return ret;
+ }
+
+ ov5645->pinctrl = devm_pinctrl_get(dev);
+ if (!IS_ERR(ov5645->pinctrl)) {
+ ov5645->pins_default =
+ pinctrl_lookup_state(ov5645->pinctrl,
+ OF_CAMERA_PINCTRL_STATE_DEFAULT);
+ if (IS_ERR(ov5645->pins_default))
+ dev_err(dev, "could not get default pinstate\n");
+
+ ov5645->pins_sleep =
+ pinctrl_lookup_state(ov5645->pinctrl,
+ OF_CAMERA_PINCTRL_STATE_SLEEP);
+ if (IS_ERR(ov5645->pins_sleep))
+ dev_err(dev, "could not get sleep pinstate\n");
+ }
+
+ mutex_init(&ov5645->mutex);
+
+ v4l2_ctrl_handler_init(&ov5645->ctrl_handler, 9);
+ v4l2_ctrl_new_std(&ov5645->ctrl_handler, &ov5645_ctrl_ops,
+ V4L2_CID_SATURATION, -4, 4, 1, 0);
+ v4l2_ctrl_new_std(&ov5645->ctrl_handler, &ov5645_ctrl_ops,
+ V4L2_CID_HFLIP, 0, 1, 1, 0);
+ v4l2_ctrl_new_std(&ov5645->ctrl_handler, &ov5645_ctrl_ops,
+ V4L2_CID_VFLIP, 0, 1, 1, 0);
+ v4l2_ctrl_new_std(&ov5645->ctrl_handler, &ov5645_ctrl_ops,
+ V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
+ v4l2_ctrl_new_std(&ov5645->ctrl_handler, &ov5645_ctrl_ops,
+ V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
+ v4l2_ctrl_new_std_menu(&ov5645->ctrl_handler, &ov5645_ctrl_ops,
+ V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
+ 0, V4L2_EXPOSURE_AUTO);
+ v4l2_ctrl_new_std_menu_items(&ov5645->ctrl_handler, &ov5645_ctrl_ops,
+ V4L2_CID_TEST_PATTERN,
+ ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
+ 0, 0, ov5645_test_pattern_menu);
+ ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrl_handler,
+ &ov5645_ctrl_ops,
+ V4L2_CID_PIXEL_RATE,
+ 1, INT_MAX, 1, 1);
+ ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrl_handler,
+ &ov5645_ctrl_ops,
+ V4L2_CID_LINK_FREQ,
+ ARRAY_SIZE(link_freq_menu_items) - 1,
+ 0, link_freq_menu_items);
+ if (ov5645->link_freq)
+ ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+
+ ov5645->subdev.ctrl_handler = &ov5645->ctrl_handler;
+
+ if (ov5645->ctrl_handler.error) {
+ dev_err(dev, "%s: control initialization error %d\n",
+ __func__, ov5645->ctrl_handler.error);
+ ret = ov5645->ctrl_handler.error;
+ goto err_free_handler;
+ }
+
+ sd = &ov5645->subdev;
+ v4l2_i2c_subdev_init(sd, client, &ov5645_subdev_ops);
+
+ ret = __ov5645_power_on(ov5645);
+ if (ret)
+ goto err_free_handler;
+
+ ret = ov5645_check_sensor_id(ov5645, client);
+ if (ret)
+ goto err_power_off;
+
+ ret = ov5645_read_reg(client, OV5645_AEC_PK_MANUAL,
+ OV5645_REG_VALUE_08BIT,&ov5645->aec_pk_manual);
+ if (ret < 0) {
+ dev_err(dev, "could not read AEC/AGC mode\n");
+ ret = -ENODEV;
+ goto err_power_off;
+ }
+
+ ret = ov5645_read_reg(client, OV5645_TIMING_TC_REG20,
+ OV5645_REG_VALUE_08BIT,&ov5645->timing_tc_reg20);
+ if (ret < 0) {
+ dev_err(dev, "could not read vflip value\n");
+ ret = -ENODEV;
+ goto err_power_off;
+ }
+
+ ret = ov5645_read_reg(client, OV5645_TIMING_TC_REG21,
+ OV5645_REG_VALUE_08BIT,&ov5645->timing_tc_reg21);
+ if (ret < 0) {
+ dev_err(dev, "could not read hflip value\n");
+ ret = -ENODEV;
+ goto err_power_off;
+ }
+
+#ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
+ sd->internal_ops = &ov5645_internal_ops;
+ sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+#endif
+#if defined(CONFIG_MEDIA_CONTROLLER)
+ ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
+ sd->entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
+ ret = media_entity_init(&sd->entity, 1, &ov5645->pad, 0);
+ if (ret < 0)
+ goto err_power_off;
+#endif
+
+ ret = v4l2_async_register_subdev(sd);
+ if (ret) {
+ dev_err(dev, "v4l2 async register subdev failed\n");
+ goto err_clean_entity;
+ }
+
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+ pm_runtime_idle(dev);
+
+ return 0;
+
+err_clean_entity:
+#if defined(CONFIG_MEDIA_CONTROLLER)
+ media_entity_cleanup(&sd->entity);
+#endif
+err_power_off:
+ __ov5645_power_off(ov5645);
+err_free_handler:
+ v4l2_ctrl_handler_free(&ov5645->ctrl_handler);
+
+ mutex_destroy(&ov5645->mutex);
+
+ return ret;
+}
+
+static int ov5645_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct ov5645 *ov5645 = to_ov5645(sd);
+
+ v4l2_async_unregister_subdev(sd);
+#if defined(CONFIG_MEDIA_CONTROLLER)
+ media_entity_cleanup(&sd->entity);
+#endif
+ v4l2_ctrl_handler_free(&ov5645->ctrl_handler);
+ mutex_destroy(&ov5645->mutex);
+
+ pm_runtime_disable(&client->dev);
+ if (!pm_runtime_status_suspended(&client->dev))
+ __ov5645_power_off(ov5645);
+ pm_runtime_set_suspended(&client->dev);
+
+ return 0;
+}
+
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id ov5645_of_match[] = {
+ { .compatible = "ovti,ov5645" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ov5645_of_match);
+#endif
+
+static const struct i2c_device_id ov5645_match_id[] = {
+ { "ovti,ov5645", 0 },
+ { },
+};
+
+static struct i2c_driver ov5645_i2c_driver = {
+ .driver = {
+ .name = "ov5645",
+ .pm = &ov5645_pm_ops,
+ .of_match_table = of_match_ptr(ov5645_of_match),
+ },
+ .probe = &ov5645_probe,
+ .remove = &ov5645_remove,
+ .id_table = ov5645_match_id,
+};
+
+static int __init sensor_mod_init(void)
+{
+ return i2c_add_driver(&ov5645_i2c_driver);
+}
+
+static void __exit sensor_mod_exit(void)
+{
+ i2c_del_driver(&ov5645_i2c_driver);
+}
+
+device_initcall_sync(sensor_mod_init);
+module_exit(sensor_mod_exit);
+
+MODULE_DESCRIPTION("OmniVision ov5645 sensor driver");
+MODULE_LICENSE("GPL v2");
--
2.25.1