1485 lines
34 KiB
Diff
1485 lines
34 KiB
Diff
From e14b7341757fe1bc6fddedff4c4dc83a65fee783 Mon Sep 17 00:00:00 2001
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From: Stephen <stephen@vamrs.com>
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Date: Wed, 4 Mar 2020 11:51:03 +0800
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Subject: [PATCH 91/97] arm64: dts: add ROCK Pi 4 new device tree
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Signed-off-by: Stephen <stephen@vamrs.com>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 3 +
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.../boot/dts/rockchip/rk3399-rock-pi-4.dtsi | 1166 +++++++++++++++++
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.../boot/dts/rockchip/rk3399-rock-pi-4a.dts | 51 +
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.../boot/dts/rockchip/rk3399-rock-pi-4b.dts | 59 +
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.../boot/dts/rockchip/rk3399-rock-pi-4c.dts | 149 +++
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5 files changed, 1428 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
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diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
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index 6fd6e57709b7..d151599eebde 100644
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -68,6 +68,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-mid-818-android-6.0.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-mid-818-android.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960-ab.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rv1-android.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator-box-android-6.0.dtb
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
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new file mode 100644
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index 000000000000..11c6805ab110
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
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@@ -0,0 +1,1166 @@
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+/*
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+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This file is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This file is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/pwm/pwm.h>
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+#include <dt-bindings/input/input.h>
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+#include "rk3399.dtsi"
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+#include "rk3399-linux.dtsi"
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+#include "rk3399-opp.dtsi"
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+
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+
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+/ {
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+
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+ fiq_debugger: fiq-debugger {
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+ status = "disabled";
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+ compatible = "rockchip,fiq-debugger";
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+ rockchip,serial-id = <2>;
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+ rockchip,signal-irq = <182>;
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+ rockchip,wake-irq = <0>;
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+ rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
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+ rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart2c_xfer>;
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+ };
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+
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+ vcc1v8_s0: vcc1v8-s0 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc1v8_s0";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-always-on;
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+ };
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+
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+ vcc_sys: vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ };
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+
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+ vcc_phy: vcc-phy-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_phy";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc3v3_sys: vcc3v3-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ vcc3v3_pcie: vcc3v3-pcie-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_drv>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ regulator-name = "vcc3v3_pcie";
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&host_vbus_drv>;
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+ regulator-name = "vcc5v0_host";
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+ regulator-always-on;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ vcc5v0_otg: vcc5v0-otg-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&otg_vbus_drv>;
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+ regulator-name = "vcc5v0_otg";
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+ regulator-always-on;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ vdd_log: vdd-log {
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+ compatible = "pwm-regulator";
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+ pwms = <&pwm2 0 25000 1>;
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+ regulator-name = "vdd_log";
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1400000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+
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+ /* for rockchip boot on */
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+ rockchip,pwm_id= <2>;
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+ rockchip,pwm_voltage = <900000>;
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+
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ clkin_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ clock-frequency = <125000000>;
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+ clock-output-names = "clkin_gmac";
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+ #clock-cells = <0>;
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+ };
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+
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+ es8316-sound {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "rockchip,es8316-codec";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,widgets =
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+ "Microphone", "Mic Jack",
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+ "Headphone", "Headphone Jack";
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+ simple-audio-card,routing =
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+ "Mic Jack", "MICBIAS1",
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+ "IN1P", "Mic Jack",
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+ "Headphone Jack", "HPOL",
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+ "Headphone Jack", "HPOR";
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s0>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&es8316>;
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+ };
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+ };
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+
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+ hdmi_codec: hdmi-codec {
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+ status = "okay";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,mclk-fs = <256>;
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+ simple-audio-card,name = "HDMI-CODEC";
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s2>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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+ };
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+ };
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+
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+ sound_ext_card: sound-ext-card {
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+ status = "disabled";
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+ };
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+
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+ spdif-sound {
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+ status = "disabled";
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+ compatible = "simple-audio-card";
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+ simple-audio-card,name = "ROCKCHIP,SPDIF";
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+ simple-audio-card,cpu {
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+ sound-dai = <&spdif>;
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+ };
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+ simple-audio-card,codec {
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+ sound-dai = <&spdif_out>;
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+ };
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+ };
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+
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+ spdif_out: spdif-out {
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+ status = "disabled";
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+ compatible = "linux,spdif-dit";
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+ #sound-dai-cells = <0>;
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk808 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_enable_h>;
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+
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+ /*
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+ * On the module itself this is one of these (depending
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+ * on the actual card populated):
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+ * - SDIO_RESET_L_WL_REG_ON
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+ * - PDN (power down when low)
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+ */
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+ reset-gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wireless_wlan: wireless-wlan {
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+ compatible = "wlan-platdata";
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+ rockchip,grf = <&grf>;
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+ wifi_chip_type = "ap6256";
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+ sdio_vref = <1800>;
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+ WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ bt_uart0: wireless_bluetooth: wireless-bluetooth {
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+ compatible = "bluetooth-platdata";
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+ clocks = <&rk808 1>;
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+ clock-names = "ext_clock";
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+ /* wifi-bt-power-toggle; */
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+ uart_rts_gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default", "rts_gpio";
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+ pinctrl-0 = <&uart0_rts>;
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+ pinctrl-1 = <&uart0_gpios>;
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+ /* BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; */
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+ BT,reset_gpio = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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+ BT,wake_gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>;
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+ BT,wake_host_irq = <&gpio0 4 GPIO_ACTIVE_HIGH>;
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+ status = "disabled";
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+ };
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+
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+ gpio-leds {
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+ compatible = "gpio-leds";
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+ status = "okay";
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+
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+ user-led1 {
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+ gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ default-state = "on";
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+ };
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+
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+ user-led2 {
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+ gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ default-state = "on";
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+ };
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+ };
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+
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+ rk_headset {
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+ compatible = "rockchip_headset";
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+ headset_gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hp_det>;
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+ io-channels = <&saradc 2>;
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+ };
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+
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+ test-power {
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+ status = "okay";
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+ };
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+};
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+
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+&hdmi {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ #sound-dai-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>;
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+ status = "okay";
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+};
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+
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+&sdmmc {
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+ supports-sd;
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+ bus-width = <4>;
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+ cap-mmc-highspeed;
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+ cap-sd-highspeed;
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+ disable-wp;
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+ num-slots = <1>;
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+// sd-uhs-sdr104;
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+ vqmmc-supply = <&vcc_sd>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
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+ card-detect-delay = <800>;
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+ status = "okay";
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+};
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+
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+&sdio0 {
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+ max-frequency = <200000000>;
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+ supports-sdio;
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+ bus-width = <4>;
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+ disable-wp;
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+ cap-sd-highspeed;
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+ cap-sdio-irq;
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+ keep-power-in-suspend;
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+ mmc-pwrseq = <&sdio_pwrseq>;
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+ non-removable;
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+ num-slots = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
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+ sd-uhs-sdr104;
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+ status = "okay";
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+};
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+
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+&emmc_phy {
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+ status = "okay";
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+};
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+
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+&sdhci {
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+ bus-width = <8>;
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+ mmc-hs400-1_8v;
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+ supports-emmc;
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+ non-removable;
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+ mmc-hs400-enhanced-strobe;
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+ status = "okay";
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+};
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+
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+&i2s0 {
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+ status = "okay";
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+ rockchip,i2s-broken-burst-len;
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+ rockchip,playback-channels = <8>;
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+ rockchip,capture-channels = <8>;
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+ #sound-dai-cells = <0>;
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+};
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+
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+&i2s1 {
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+ status = "disabled";
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+ #sound-dai-cells = <0>;
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+};
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+
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+&i2s2 {
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+ status = "okay";
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+ #sound-dai-cells = <0>;
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+ i2c-scl-rising-time-ns = <168>;
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+ i2c-scl-falling-time-ns = <4>;
|
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+ clock-frequency = <400000>;
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+
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+ vdd_cpu_b: syr827@40 {
|
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+ compatible = "silergy,syr827";
|
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+ reg = <0x40>;
|
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+ regulator-compatible = "fan53555-reg";
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+ pinctrl-0 = <&vsel1_gpio>;
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+ vsel-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
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+ regulator-name = "vdd_cpu_b";
|
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+ regulator-min-microvolt = <712500>;
|
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+ regulator-max-microvolt = <1500000>;
|
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+ regulator-ramp-delay = <1000>;
|
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+ fcs,suspend-voltage-selector = <1>;
|
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+ regulator-always-on;
|
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+ regulator-boot-on;
|
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+ vin-supply = <&vcc_sys>;
|
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+ regulator-state-mem {
|
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+ regulator-off-in-suspend;
|
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+ };
|
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+ };
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+
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+ vdd_gpu: syr828@41 {
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+ compatible = "silergy,syr828";
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+ reg = <0x41>;
|
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+ regulator-compatible = "fan53555-reg";
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+ pinctrl-0 = <&vsel2_gpio>;
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+ vsel-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
|
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+ regulator-name = "vdd_gpu";
|
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+ regulator-min-microvolt = <712500>;
|
|
+ regulator-max-microvolt = <1500000>;
|
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+ regulator-ramp-delay = <1000>;
|
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+ fcs,suspend-voltage-selector = <1>;
|
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+ regulator-always-on;
|
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+ regulator-boot-on;
|
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+ vin-supply = <&vcc_sys>;
|
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+ regulator-initial-mode = <1>; /* 1:force PWM 2:auto */
|
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+ regulator-state-mem {
|
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+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
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+
|
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+ rk808: pmic@1b {
|
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+ compatible = "rockchip,rk808";
|
|
+ reg = <0x1b>;
|
|
+ interrupt-parent = <&gpio1>;
|
|
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pmic_int_l>;
|
|
+ rockchip,system-power-controller;
|
|
+ wakeup-source;
|
|
+ #clock-cells = <1>;
|
|
+ clock-output-names = "xin32k", "rk808-clkout2";
|
|
+
|
|
+ vcc1-supply = <&vcc_sys>;
|
|
+ vcc2-supply = <&vcc_sys>;
|
|
+ vcc3-supply = <&vcc_sys>;
|
|
+ vcc4-supply = <&vcc_sys>;
|
|
+ vcc6-supply = <&vcc_sys>;
|
|
+ vcc7-supply = <&vcc_sys>;
|
|
+ vcc8-supply = <&vcc3v3_sys>;
|
|
+ vcc9-supply = <&vcc_sys>;
|
|
+ vcc10-supply = <&vcc_sys>;
|
|
+ vcc11-supply = <&vcc_sys>;
|
|
+ vcc12-supply = <&vcc3v3_sys>;
|
|
+ vddio-supply = <&vcc_1v8>;
|
|
+
|
|
+ regulators {
|
|
+ vdd_center: DCDC_REG1 {
|
|
+ regulator-name = "vdd_center";
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vdd_cpu_l: DCDC_REG2 {
|
|
+ regulator-name = "vdd_cpu_l";
|
|
+ regulator-min-microvolt = <750000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <6001>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_ddr: DCDC_REG3 {
|
|
+ regulator-name = "vcc_ddr";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v8: DCDC_REG4 {
|
|
+ regulator-name = "vcc_1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc1v8_dvp: LDO_REG1 {
|
|
+ regulator-name = "vcc1v8_codec";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_hdmi: LDO_REG2 {
|
|
+ regulator-name = "vcca1v8_hdmi";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8: LDO_REG3 {
|
|
+ regulator-name = "vcca_1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_sd: LDO_REG4 {
|
|
+ regulator-name = "vcc_sd";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v0_sd: LDO_REG5 {
|
|
+ regulator-name = "vcc3v0_sd";
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_1v5: LDO_REG6 {
|
|
+ regulator-name = "vcc_1v5";
|
|
+ regulator-min-microvolt = <1500000>;
|
|
+ regulator-max-microvolt = <1500000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1500000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca0v9_hdmi: LDO_REG7 {
|
|
+ regulator-name = "vcca0v9_hdmi";
|
|
+ regulator-min-microvolt = <900000>;
|
|
+ regulator-max-microvolt = <900000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <900000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v0: LDO_REG8 {
|
|
+ regulator-name = "vcc_3v0";
|
|
+ regulator-min-microvolt = <3000000>;
|
|
+ regulator-max-microvolt = <3000000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_s3: SWITCH_REG1 {
|
|
+ regulator-name = "vcc3v3_s3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_s0: SWITCH_REG2 {
|
|
+ regulator-name = "vcc3v3_s0";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ status = "okay";
|
|
+ i2c-scl-rising-time-ns = <300>;
|
|
+ i2c-scl-falling-time-ns = <15>;
|
|
+
|
|
+ es8316: es8316@11 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "everest,es8316";
|
|
+ reg = <0x11>;
|
|
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
|
|
+ clock-names = "mclk";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_8ch_mclk>;
|
|
+ };
|
|
+
|
|
+ rockpi_mcu: rockpi_mcu@45 {
|
|
+ compatible = "rockpi_mcu";
|
|
+ reg = <0x45>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ rockpi_ft5406: rockpi_ft5406@38 {
|
|
+ compatible = "rockpi_ft5406";
|
|
+ reg = <0x38>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c4 {
|
|
+ camera1: camera-module@10 {
|
|
+ status = "disabled";
|
|
+ compatible = "sony,imx219";
|
|
+ reg = <0x10>;
|
|
+
|
|
+ clocks = <&cru SCLK_CIF_OUT>;
|
|
+ clock-names = "clk_cif_out";
|
|
+ pinctrl-names = "rockchip,camera_default";
|
|
+ pwdn-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ port {
|
|
+ ucam_out0: endpoint {
|
|
+ remote-endpoint = <&mipi_in_ucam0>;
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ camera2: camera-module@36 {
|
|
+ status = "disabled";
|
|
+ compatible = "ovti,ov5647";
|
|
+ reg = <0x36>;
|
|
+
|
|
+ clocks = <&cru SCLK_CIF_OUT>;
|
|
+ clock-names = "clk_cif_out";
|
|
+ pinctrl-names = "rockchip,camera_default";
|
|
+
|
|
+ port {
|
|
+ ucam_out1: endpoint {
|
|
+ remote-endpoint = <&mipi_in_ucam0>;
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c7 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&cpu_l0 {
|
|
+ cpu-supply = <&vdd_cpu_l>;
|
|
+};
|
|
+
|
|
+&cpu_l1 {
|
|
+ cpu-supply = <&vdd_cpu_l>;
|
|
+};
|
|
+
|
|
+&cpu_l2 {
|
|
+ cpu-supply = <&vdd_cpu_l>;
|
|
+};
|
|
+
|
|
+&cpu_l3 {
|
|
+ cpu-supply = <&vdd_cpu_l>;
|
|
+};
|
|
+
|
|
+&cpu_b0 {
|
|
+ cpu-supply = <&vdd_cpu_b>;
|
|
+};
|
|
+
|
|
+&cpu_b1 {
|
|
+ cpu-supply = <&vdd_cpu_b>;
|
|
+};
|
|
+
|
|
+&gpu {
|
|
+ status = "okay";
|
|
+ mali-supply = <&vdd_gpu>;
|
|
+};
|
|
+
|
|
+&threshold {
|
|
+ temperature = <85000>;
|
|
+};
|
|
+
|
|
+&target {
|
|
+ temperature = <100000>;
|
|
+};
|
|
+
|
|
+&soc_crit {
|
|
+ temperature = <105000>;
|
|
+};
|
|
+
|
|
+&tcphy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ /* tshut mode 0:CRU 1:GPIO */
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ /* tshut polarity 0:LOW 1:HIGH */
|
|
+ rockchip,hw-tshut-polarity = <1>;
|
|
+ rockchip,hw-tshut-temp = <110000>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&u2phy0 {
|
|
+ status = "okay";
|
|
+ enable-active-high;
|
|
+ /* otg-vbus-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;*/
|
|
+ gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ u2phy0_otg: otg-port {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ u2phy0_host: host-port {
|
|
+ phy-supply = <&vcc5v0_host>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&u2phy1 {
|
|
+ status = "okay";
|
|
+
|
|
+ u2phy1_otg: otg-port {
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ u2phy1_host: host-port {
|
|
+ phy-supply = <&vcc5v0_host>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart4 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd3_0 {
|
|
+ extcon = <&u2phy0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_0 {
|
|
+ dr_mode = "otg";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd3_1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbdrd_dwc3_1 {
|
|
+ dr_mode = "host";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gmac {
|
|
+ phy-supply = <&vcc_phy>;
|
|
+ phy-mode = "rgmii";
|
|
+ clock_in_out = "input";
|
|
+ snps,reset-gpio = <&gpio3 15 GPIO_ACTIVE_LOW>;
|
|
+ snps,reset-active-low;
|
|
+ snps,reset-delays-us = <0 10000 50000>;
|
|
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
|
|
+ assigned-clock-parents = <&clkin_gmac>;
|
|
+ pinctrl-names = "default", "sleep";
|
|
+ pinctrl-0 = <&rgmii_pins>;
|
|
+ pinctrl-1 = <&rgmii_sleep_pins>;
|
|
+ tx_delay = <0x28>;
|
|
+ rx_delay = <0x11>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&dsi {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb_out_dsi {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&vopl_out_dsi {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+/*
|
|
+&dsi1 {
|
|
+ rockchip,dual-channel = <&dsi>;
|
|
+ status = "okay";
|
|
+
|
|
+ panel: panel@0 {
|
|
+ compatible ="rockpi,tc358762";
|
|
+ reg = <0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+*/
|
|
+
|
|
+&saradc {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&io_domains {
|
|
+ status = "okay";
|
|
+
|
|
+ bt656-supply = <&vcc_3v0>; /* bt656_gpio2ab_ms */
|
|
+ audio-supply = <&vcc_3v0>; /* audio_gpio3d4a_ms */
|
|
+ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
|
|
+ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
|
|
+};
|
|
+
|
|
+&pcie_phy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ ep-gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
|
|
+ num-lanes = <4>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie_clkreqnb_cpm>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ headphone {
|
|
+ hp_det: hp-det {
|
|
+ rockchip,pins =
|
|
+ <1 0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio0 {
|
|
+ sdio0_bus1: sdio0-bus1 {
|
|
+ rockchip,pins =
|
|
+ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
|
+ };
|
|
+
|
|
+ sdio0_bus4: sdio0-bus4 {
|
|
+ rockchip,pins =
|
|
+ <2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
|
+ <2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
|
+ <2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
|
|
+ <2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
|
+ };
|
|
+
|
|
+ sdio0_cmd: sdio0-cmd {
|
|
+ rockchip,pins =
|
|
+ <2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
|
|
+ };
|
|
+
|
|
+ sdio0_clk: sdio0-clk {
|
|
+ rockchip,pins =
|
|
+ <2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdmmc {
|
|
+ sdmmc_bus1: sdmmc-bus1 {
|
|
+ rockchip,pins =
|
|
+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc_bus4: sdmmc-bus4 {
|
|
+ rockchip,pins =
|
|
+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
+ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
+ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
+ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc_clk: sdmmc-clk {
|
|
+ rockchip,pins =
|
|
+ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc_cmd: sdmmc-cmd {
|
|
+ rockchip,pins =
|
|
+ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio-pwrseq {
|
|
+ wifi_enable_h: wifi-enable-h {
|
|
+ rockchip,pins =
|
|
+ <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wireless-bluetooth {
|
|
+ uart0_gpios: uart0-gpios {
|
|
+ rockchip,pins =
|
|
+ <2 19 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb2 {
|
|
+ host_vbus_drv: host-vbus-drv {
|
|
+ rockchip,pins =
|
|
+ <4 25 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ otg_vbus_drv: otg-vbus-drv {
|
|
+ rockchip,pins =
|
|
+ <1 3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie {
|
|
+ pcie_drv: pcie-drv {
|
|
+ rockchip,pins =
|
|
+ <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins =
|
|
+ <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ vsel1_gpio: vsel1-gpio {
|
|
+ rockchip,pins =
|
|
+ <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+
|
|
+ vsel2_gpio: vsel2-gpio {
|
|
+ rockchip,pins =
|
|
+ <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac {
|
|
+ rgmii_sleep_pins: rgmii-sleep-pins {
|
|
+ rockchip,pins =
|
|
+ <3 15 RK_FUNC_GPIO &pcfg_output_low>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c4 {
|
|
+ i2c4_xfer: i2c4-xfer {
|
|
+ rockchip,pins =
|
|
+ <1 12 RK_FUNC_1 &pcfg_pull_up>,
|
|
+ <1 11 RK_FUNC_1 &pcfg_pull_up>,
|
|
+ <1 13 RK_FUNC_GPIO &pcfg_pull_up>; //camera module enable pin
|
|
+ };
|
|
+ };
|
|
+ i2s0 {
|
|
+ i2s0_8ch_bus: i2s0-8ch-bus {
|
|
+ rockchip,pins =
|
|
+ <3 24 RK_FUNC_1 &pcfg_pull_none>,
|
|
+ <3 25 RK_FUNC_1 &pcfg_pull_none>,
|
|
+ <3 26 RK_FUNC_1 &pcfg_pull_none>,
|
|
+ <3 27 RK_FUNC_1 &pcfg_pull_none>,
|
|
+ <3 31 RK_FUNC_1 &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ i2s_8ch_mclk: i2s-8ch-mclk {
|
|
+ rockchip,pins = <4 0 RK_FUNC_1 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pvtm {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pmu_pvtm {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ status = "okay";
|
|
+ pmu1830-supply = <&vcc_3v0>;
|
|
+};
|
|
+
|
|
+&rockchip_suspend {
|
|
+ status = "okay";
|
|
+ rockchip,sleep-debug-en = <0>;
|
|
+ rockchip,sleep-mode-config = <
|
|
+ (0
|
|
+ | RKPM_SLP_ARMPD
|
|
+ | RKPM_SLP_PERILPPD
|
|
+ | RKPM_SLP_DDR_RET
|
|
+ | RKPM_SLP_PLLPD
|
|
+ | RKPM_SLP_CENTER_PD
|
|
+ | RKPM_SLP_AP_PWROFF
|
|
+ )
|
|
+ >;
|
|
+ rockchip,wakeup-config = <
|
|
+ (0
|
|
+ | RKPM_GPIO_WKUP_EN
|
|
+ | RKPM_PWM_WKUP_EN
|
|
+ )
|
|
+ >;
|
|
+ rockchip,pwm-regulator-config = <
|
|
+ (0
|
|
+ | PWM2_REGULATOR_EN
|
|
+ )
|
|
+ >;
|
|
+ rockchip,power-ctrl =
|
|
+ <&gpio1 17 GPIO_ACTIVE_HIGH>,
|
|
+ <&gpio1 14 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+&vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopl_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rkisp1_0 {
|
|
+ status = "okay";
|
|
+ port {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ isp0_mipi_in: endpoint@0 {
|
|
+ reg = <0>;
|
|
+ remote-endpoint = <&dphy_rx0_out>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&mipi_dphy_rx0 {
|
|
+ status = "okay";
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mipi_in_ucam0: endpoint@1 {
|
|
+ reg = <1>;
|
|
+ remote-endpoint = <&ucam_out0>;
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ dphy_rx0_out: endpoint@0 {
|
|
+ reg = <0>;
|
|
+ remote-endpoint = <&isp0_mipi_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+
|
|
+&isp0_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+
|
|
+&isp1_mmu {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&vpu {
|
|
+ status = "okay";
|
|
+ /* 0 means ion, 1 means drm */
|
|
+ //allocator = <0>;
|
|
+};
|
|
+
|
|
+&rkvdec {
|
|
+ status = "okay";
|
|
+ /* 0 means ion, 1 means drm */
|
|
+ //allocator = <0>;
|
|
+};
|
|
+
|
|
+&display_subsystem {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&dsi1_in_vopl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&dsi1_in_vopb {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&route_dsi {
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+&route_dsi1{
|
|
+ status = "okay";
|
|
+ connect = <&vopl_out_dsi1>;
|
|
+};
|
|
+
|
|
+&hdmi_in_vopl {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi_in_vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&route_hdmi {
|
|
+ status = "okay";
|
|
+ connect = <&vopb_out_hdmi>;
|
|
+};
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
|
|
new file mode 100644
|
|
index 000000000000..ee4d27dcad02
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts
|
|
@@ -0,0 +1,51 @@
|
|
+/*
|
|
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
|
|
+ *
|
|
+ * This file is dual-licensed: you can use it either under the terms
|
|
+ * of the GPL or the X11 license, at your option. Note that this dual
|
|
+ * licensing only applies to this file, and not this project as a
|
|
+ * whole.
|
|
+ *
|
|
+ * a) This file is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU General Public License as
|
|
+ * published by the Free Software Foundation; either version 2 of the
|
|
+ * License, or (at your option) any later version.
|
|
+ *
|
|
+ * This file is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ *
|
|
+ * Or, alternatively,
|
|
+ *
|
|
+ * b) Permission is hereby granted, free of charge, to any person
|
|
+ * obtaining a copy of this software and associated documentation
|
|
+ * files (the "Software"), to deal in the Software without
|
|
+ * restriction, including without limitation the rights to use,
|
|
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
|
+ * sell copies of the Software, and to permit persons to whom the
|
|
+ * Software is furnished to do so, subject to the following
|
|
+ * conditions:
|
|
+ *
|
|
+ * The above copyright notice and this permission notice shall be
|
|
+ * included in all copies or substantial portions of the Software.
|
|
+ *
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
+ * OTHER DEALINGS IN THE SOFTWARE.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "rk3399-rock-pi-4.dtsi"
|
|
+
|
|
+/ {
|
|
+
|
|
+ model = "ROCK PI 4A";
|
|
+ compatible = "rockchip,rockpi","rockchip,rk3399";
|
|
+};
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
|
|
new file mode 100644
|
|
index 000000000000..0669ba4ed3dc
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
|
|
@@ -0,0 +1,59 @@
|
|
+/*
|
|
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
|
|
+ *
|
|
+ * This file is dual-licensed: you can use it either under the terms
|
|
+ * of the GPL or the X11 license, at your option. Note that this dual
|
|
+ * licensing only applies to this file, and not this project as a
|
|
+ * whole.
|
|
+ *
|
|
+ * a) This file is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU General Public License as
|
|
+ * published by the Free Software Foundation; either version 2 of the
|
|
+ * License, or (at your option) any later version.
|
|
+ *
|
|
+ * This file is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ *
|
|
+ * Or, alternatively,
|
|
+ *
|
|
+ * b) Permission is hereby granted, free of charge, to any person
|
|
+ * obtaining a copy of this software and associated documentation
|
|
+ * files (the "Software"), to deal in the Software without
|
|
+ * restriction, including without limitation the rights to use,
|
|
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
|
+ * sell copies of the Software, and to permit persons to whom the
|
|
+ * Software is furnished to do so, subject to the following
|
|
+ * conditions:
|
|
+ *
|
|
+ * The above copyright notice and this permission notice shall be
|
|
+ * included in all copies or substantial portions of the Software.
|
|
+ *
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
+ * OTHER DEALINGS IN THE SOFTWARE.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "rk3399-rock-pi-4.dtsi"
|
|
+
|
|
+/ {
|
|
+
|
|
+ model = "ROCK PI 4B";
|
|
+ compatible = "rockchip,rockpi","rockchip,rk3399";
|
|
+};
|
|
+
|
|
+&wireless_wlan {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&wireless_bluetooth {
|
|
+ status = "okay";
|
|
+};
|
|
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
|
|
new file mode 100644
|
|
index 000000000000..a0ce05701d2f
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts
|
|
@@ -0,0 +1,149 @@
|
|
+/*
|
|
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
|
|
+ *
|
|
+ * This file is dual-licensed: you can use it either under the terms
|
|
+ * of the GPL or the X11 license, at your option. Note that this dual
|
|
+ * licensing only applies to this file, and not this project as a
|
|
+ * whole.
|
|
+ *
|
|
+ * a) This file is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU General Public License as
|
|
+ * published by the Free Software Foundation; either version 2 of the
|
|
+ * License, or (at your option) any later version.
|
|
+ *
|
|
+ * This file is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ *
|
|
+ * Or, alternatively,
|
|
+ *
|
|
+ * b) Permission is hereby granted, free of charge, to any person
|
|
+ * obtaining a copy of this software and associated documentation
|
|
+ * files (the "Software"), to deal in the Software without
|
|
+ * restriction, including without limitation the rights to use,
|
|
+ * copy, modify, merge, publish, distribute, sublicense, and/or
|
|
+ * sell copies of the Software, and to permit persons to whom the
|
|
+ * Software is furnished to do so, subject to the following
|
|
+ * conditions:
|
|
+ *
|
|
+ * The above copyright notice and this permission notice shall be
|
|
+ * included in all copies or substantial portions of the Software.
|
|
+ *
|
|
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
+ * OTHER DEALINGS IN THE SOFTWARE.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "rk3399-rock-pi-4.dtsi"
|
|
+
|
|
+/ {
|
|
+
|
|
+ model = "ROCK PI 4C";
|
|
+ compatible = "rockchip,rockpi","rockchip,rk3399";
|
|
+
|
|
+ vpd0: virtual-pd0 {
|
|
+ compatible = "linux,extcon-pd-virtual";
|
|
+ dp-det-gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
|
|
+ /* 0: positive, 1: negative*/
|
|
+ vpd,init-flip = <0>;
|
|
+ /* 0: u2, 1: u3*/
|
|
+ vpd,init-ss = <1>;
|
|
+ /* 0: dfp, 1: ufp, 2: dp 3: dp/ufp */
|
|
+ vpd,init-mode = <2>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dp_pwr>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&cdn_dp {
|
|
+ status = "okay";
|
|
+ extcon = <&vpd0>;
|
|
+// dp_vop_sel = <0>;
|
|
+// phys = <&tcphy0_dp>;
|
|
+};
|
|
+
|
|
+&wireless_wlan {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&wireless_bluetooth {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vcc5v0_host {
|
|
+ gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+&host_vbus_drv {
|
|
+ rockchip,pins =
|
|
+ <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+};
|
|
+
|
|
+&tcphy0 {
|
|
+ extcon = <&vpd0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+
|
|
+ dp {
|
|
+ dp_pwr: dp-pwr {
|
|
+ rockchip,pins =
|
|
+ <1 24 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&dsi1_in_vopl {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dsi1_in_vopb {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&route_dsi {
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+&route_dsi1{
|
|
+ status = "disabled";
|
|
+ connect = <&vopl_out_dsi1>;
|
|
+};
|
|
+
|
|
+&hdmi_in_vopl {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi_in_vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&route_hdmi {
|
|
+ status = "okay";
|
|
+ connect = <&vopb_out_hdmi>;
|
|
+};
|
|
+
|
|
+&dp_in_vopb {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dp_in_vopl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy0_dp {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tcphy0_usb3 {
|
|
+ status = "okay";
|
|
+};
|
|
--
|
|
2.25.1
|
|
|