96 lines
3.3 KiB
Diff
96 lines
3.3 KiB
Diff
This patch adds usb2-phy support for RK3308 SoCs and amend phy Documentation.
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Signed-off-by: Akash Gajjar <akash@xxxxxxxxxxxx>
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---
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.../bindings/phy/phy-rockchip-inno-usb2.txt | 1 +
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 44 +++++++++++++++++++
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2 files changed, 45 insertions(+)
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--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml 2020-12-01 17:38:51.952047047 +0200
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+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml 2020-12-01 17:39:09.880064488 +0200
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@@ -14,6 +14,7 @@
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enum:
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- rockchip,px30-usb2phy
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- rockchip,rk3228-usb2phy
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+ - rockchip,rk3308-usb2phy
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- rockchip,rk3328-usb2phy
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- rockchip,rk3366-usb2phy
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- rockchip,rk3399-usb2phy
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -1425,6 +1468,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
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static const struct of_device_id rockchip_usb2phy_dt_match[] = {
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{ .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs },
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{ .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
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+ { .compatible = "rockchip,rk3308-usb2phy", .data = &rk3328_phy_cfgs },
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{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
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{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
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{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
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--
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2.17.1
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Add the ehci/ochi usb node support for the RK3308 soc.
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Signed-off-by: Akash Gajjar <akash@xxxxxxxxxxxx>
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---
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arch/arm64/boot/dts/rockchip/rk3308.dtsi | 49 ++++++++++++++++++++++++
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1 file changed, 49 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi 2020-12-01 17:42:28.328250544 +0200
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+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi 2020-12-01 17:45:19.464400997 +0200
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@@ -586,6 +586,55 @@
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status = "disabled";
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};
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+ usb2phy_grf: syscon@ff008000 {
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+ compatible = "rockchip,rk3308-usb2phy-grf", "syscon",
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+ "simple-mfd";
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+ reg = <0x0 0xff008000 0x0 0x4000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ u2phy: usb2-phy@100 {
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+ compatible = "rockchip,rk3308-usb2phy";
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+ reg = <0x100 0x10>;
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+ clocks = <&cru SCLK_USBPHY_REF>;
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+ clock-names = "phyclk";
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+ #clock-cells = <0>;
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+ assigned-clocks = <&cru USB480M>;
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+ assigned-clock-parents = <&u2phy>;
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+ clock-output-names = "usb480m_phy";
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+ status = "disabled";
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+
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+ u2phy_host: host-port {
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+ #phy-cells = <0>;
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+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "linestate";
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+ status = "disabled";
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+ };
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+ };
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+ };
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+
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+ usb_host_ehci: usb@ff440000 {
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+ compatible = "generic-ehci";
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+ reg = <0x0 0xff440000 0x0 0x10000>;
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+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;
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+ clock-names = "usbhost", "arbiter", "utmi";
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+ phys = <&u2phy_host>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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+ usb_host_ohci: usb@ff450000 {
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+ compatible = "generic-ohci";
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+ reg = <0x0 0xff450000 0x0 0x10000>;
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+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru HCLK_HOST>, <&cru HCLK_HOST_ARB>, <&u2phy>;
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+ clock-names = "usbhost", "arbiter", "utmi";
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+ phys = <&u2phy_host>;
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+ phy-names = "usb";
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+ status = "disabled";
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+ };
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+
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sdmmc: mmc@ff480000 {
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compatible = "rockchip,rk3308-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff480000 0x0 0x4000>;
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