339 lines
10 KiB
Diff
339 lines
10 KiB
Diff
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
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index af1402d83d51..d3d2f0e32ace 100644
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--- a/drivers/gpu/drm/panel/Kconfig
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+++ b/drivers/gpu/drm/panel/Kconfig
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@@ -619,4 +619,17 @@ config DRM_PANEL_XINPENG_XPP055C272
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Say Y here if you want to enable support for the Xinpeng
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XPP055C272 controller for 720x1280 LCD panels with MIPI/RGB/SPI
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system interfaces.
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+
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+config DRM_PANEL_CWD686
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+ tristate "CWD686 panel"
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+ depends on OF
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+ depends on DRM_MIPI_DSI
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+ depends on BACKLIGHT_CLASS_DEVICE
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+ help
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+ Say Y here if you want to enable support for CWD686 panel.
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+ The panel has a 480x1280 resolution and uses 24 bit RGB per pixel.
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+
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+ To compile this driver as a module, choose M here: the module
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+ will be called panel-cwd686.
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+
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endmenu
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diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
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index c8132050bcec..fe1cfdb68186 100644
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--- a/drivers/gpu/drm/panel/Makefile
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+++ b/drivers/gpu/drm/panel/Makefile
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@@ -64,3 +64,4 @@ obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o
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obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o
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obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o
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obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o
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+obj-$(CONFIG_DRM_PANEL_CWD686) += panel-cwd686.o
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diff --git a/drivers/gpu/drm/panel/panel-cwd686.c b/drivers/gpu/drm/panel/panel-cwd686.c
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new file mode 100644
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index 000000000000..6a0eabf929b9
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--- /dev/null
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+++ b/drivers/gpu/drm/panel/panel-cwd686.c
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@@ -0,0 +1,301 @@
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+/*
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+ * SPDX-License-Identifier: GPL-2.0+
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+ * Copyright (c) 2021 Clockwork Tech LLC
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+ * Copyright (c) 2021 Max Fierke <max@maxfierke.com>
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+ *
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+ */
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+
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+#include <drm/drm_modes.h>
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+#include <drm/drm_mipi_dsi.h>
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+#include <drm/drm_panel.h>
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+#include <linux/backlight.h>
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+#include <linux/gpio/consumer.h>
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+#include <linux/regulator/consumer.h>
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+#include <linux/delay.h>
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+#include <linux/of_device.h>
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+#include <linux/module.h>
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+
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+struct cwd686 {
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+ struct device *dev;
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+ struct drm_panel panel;
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+ struct regulator *supply;
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+ struct gpio_desc *enable_gpio;
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+ struct gpio_desc *reset_gpio;
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+ struct backlight_device *backlight;
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+ bool prepared;
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+ bool enabled;
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+ enum drm_panel_orientation orientation;
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+};
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+
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+static const struct drm_display_mode default_mode = {
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+ .clock = 54465,
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+ .hdisplay = 480,
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+ .hsync_start = 480 + 150,
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+ .hsync_end = 480 + 150 + 24,
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+ .htotal = 480 + 150 + 24 + 40,
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+ .vdisplay = 1280,
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+ .vsync_start = 1280 + 12,
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+ .vsync_end = 1280 + 12 + 6,
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+ .vtotal = 1280 + 12 + 6 + 10,
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+};
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+
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+static inline struct cwd686 *panel_to_cwd686(struct drm_panel *panel)
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+{
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+ return container_of(panel, struct cwd686, panel);
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+}
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+
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+#define dcs_write_seq(seq...) \
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+({ \
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+ static const u8 d[] = { seq }; \
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+ mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
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+})
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+
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+static void cwd686_init_sequence(struct cwd686 *ctx)
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+{
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+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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+
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+ dcs_write_seq(0xF0,0x5A,0x5A); // Password1 (Enable Level 2 registers)
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+ dcs_write_seq(0xF1,0xA5,0xA5); // Password2 (Enable Level 2 registers)
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+ dcs_write_seq(0xB6,0x0D,0x0D); // PWRCON_VCOM (-0.495V ?, -0.495V ?)
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+ dcs_write_seq(0xB4,0x0A,0x08,0x12,0x10,0x0E,0x0C,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x04,0x06); // CGOUTR (set ASG Output signals)
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+ dcs_write_seq(0xB3,0x0B,0x09,0x13,0x11,0x0F,0x0D,0x00,0x00,0x00,0x03,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x05,0x07); // CGOUTL (set ASG Output signals)
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+ dcs_write_seq(0xB0,0x54,0x32,0x23,0x45,0x44,0x44,0x44,0x44,0x90,0x01,0x90,0x01); // ???
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+ dcs_write_seq(0xB1,0x32,0x84,0x02,0x83,0x30,0x01,0x6B,0x01); // ???
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+ dcs_write_seq(0xB2,0x73); // ???
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+ dcs_write_seq(0xBD,0x4E,0x0E,0x50,0x50,0x26,0x1D,0x00,0x14,0x42,0x03); // PWRCON_REG
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+ dcs_write_seq(0xB7,0x01,0x01,0x09,0x11,0x0D,0x55,0x19,0x19,0x21,0x1D,0x00,0x00,0x00,0x00,0x02,0xFF,0x3C); // PWRCON_SEQ
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+ dcs_write_seq(0xB8,0x23,0x01,0x30,0x34,0x63); // PWRCON_CLK
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+ dcs_write_seq(0xB9,0xA0,0x22,0x00,0x44); // PWRCON_BAT (Disable abnormal power-off?)
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+ dcs_write_seq(0xBA,0x12,0x63); // PWRCON_MODE
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+ dcs_write_seq(0xC1,0x0C,0x16,0x04,0x0C,0x10,0x04); // TCON (Set VBP, VFP, VSW, HBP, HFP, HSW)
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+ dcs_write_seq(0xC2,0x11,0x41); // TCON2 (Set resolution)
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+ dcs_write_seq(0xC3,0x22,0x31,0x04); // TCON3 (Set frame blanking)
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+ dcs_write_seq(0xC7,0x05,0x23,0x6B,0x49,0x00); // SRCCON
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+ dcs_write_seq(0xC5,0x00); // ???
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+ dcs_write_seq(0xD0,0x37,0xFF,0xFF); // ABNO_CTR (Set MIPI abnormal state)
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+ dcs_write_seq(0xD2,0x63,0x0B,0x08,0x88); // ???
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+ dcs_write_seq(0xD3,0x01,0x00,0x00,0x01,0x01,0x37,0x25,0x38,0x31,0x06,0x07); // ???
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+ dcs_write_seq(0xC8,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06,0x7C,0x6A,0x5D,0x53,0x53,0x45,0x4B,0x35,0x4D,0x4A,0x49,0x66,0x53,0x57,0x4A,0x48,0x3B,0x2A,0x06); // GAMMA2.2
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+ dcs_write_seq(0xC6,0x00,0x00,0xFF,0x00,0x00,0xFF,0x00,0x00); // SRC_TIM (Set source timing)
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+ dcs_write_seq(0xF4,0x08,0x77); // ???
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+ dcs_write_seq(0x36,0x14); // MADCTL (Set display direction)
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+ dcs_write_seq(0x35,0x00); // TEON (Disable tearing effect ?)
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+ dcs_write_seq(0xF1,0x5A,0x5A); // Password1 (Enable Level 2 registers), again for some reason ??
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+ dcs_write_seq(0xF0,0xA5,0xA5); // Password2 (Enable Level 2 registers), again for some reason ??
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+}
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+
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+static int cwd686_disable(struct drm_panel *panel)
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+{
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+ struct cwd686 *ctx = panel_to_cwd686(panel);
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+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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+ int ret;
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+
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+ if (!ctx->enabled)
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+ return 0;
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+
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+ backlight_disable(ctx->backlight);
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+
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+ ctx->enabled = false;
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+
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+ return 0;
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+}
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+
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+static int cwd686_unprepare(struct drm_panel *panel)
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+{
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+ struct cwd686 *ctx = panel_to_cwd686(panel);
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+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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+ int ret;
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+
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+ if (!ctx->prepared)
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+ return 0;
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+
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+ ret = mipi_dsi_dcs_set_display_off(dsi);
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+ if (ret) {
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+ dev_err(ctx->dev, "failed to turn display off (%d)\n", ret);
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+ return ret;
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+ }
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+
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+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
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+ if (ret) {
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+ dev_err(ctx->dev, "failed to enter sleep mode (%d)\n", ret);
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+ return ret;
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+ }
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+ msleep(120);
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+
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+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
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+ msleep(5);
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+
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+ ctx->prepared = false;
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+
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+ return 0;
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+}
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+
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+static int cwd686_prepare(struct drm_panel *panel)
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+{
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+ struct cwd686 *ctx = panel_to_cwd686(panel);
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+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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+ int ret;
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+
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+ if (ctx->prepared)
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+ return 0;
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+
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+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
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+ msleep(10);
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+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
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+ msleep(120);
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+
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+ /* Enabe tearing mode: send TE (tearing effect) at VBLANK */
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+ ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
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+ if (ret) {
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+ dev_err(ctx->dev, "failed to enable vblank TE (%d)\n", ret);
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+ return ret;
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+ }
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+ /* Exit sleep mode and power on */
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+
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+ cwd686_init_sequence(ctx);
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+
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+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
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+ if (ret) {
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+ dev_err(ctx->dev, "failed to exit sleep mode (%d)\n", ret);
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+ return ret;
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+ }
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+ msleep(120);
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+
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+ ret = mipi_dsi_dcs_set_display_on(dsi);
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+ if (ret) {
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+ dev_err(ctx->dev, "failed to turn display on (%d)\n", ret);
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+ return ret;
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+ }
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+ msleep(20);
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+
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+ ctx->prepared = true;
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+
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+ return 0;
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+}
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+
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+static int cwd686_enable(struct drm_panel *panel)
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+{
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+ struct cwd686 *ctx = panel_to_cwd686(panel);
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+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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+ int ret;
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+
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+ if (ctx->enabled)
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+ return 0;
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+
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+ backlight_enable(ctx->backlight);
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+
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+ ctx->enabled = true;
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+
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+ return 0;
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+}
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+
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+static int cwd686_get_modes(struct drm_panel *panel, struct drm_connector *connector)
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+{
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+ struct cwd686 *ctx = panel_to_cwd686(panel);
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+ struct drm_display_mode *mode;
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+
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+ mode = drm_mode_duplicate(connector->dev, &default_mode);
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+ if (!mode) {
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+ dev_err(panel->dev, "bad mode or failed to add mode\n");
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+ return -EINVAL;
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+ }
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+ drm_mode_set_name(mode);
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+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
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+
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+ connector->display_info.width_mm = mode->width_mm;
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+ connector->display_info.height_mm = mode->height_mm;
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+
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+ /* set up connector's "panel orientation" property */
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+ drm_connector_set_panel_orientation(connector, ctx->orientation);
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+
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+ drm_mode_probed_add(connector, mode);
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+
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+ return 1; /* Number of modes */
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+}
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+
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+static const struct drm_panel_funcs cwd686_drm_funcs = {
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+ .disable = cwd686_disable,
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+ .unprepare = cwd686_unprepare,
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+ .prepare = cwd686_prepare,
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+ .enable = cwd686_enable,
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+ .get_modes = cwd686_get_modes,
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+};
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+
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+static int cwd686_probe(struct mipi_dsi_device *dsi)
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+{
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+ struct device *dev = &dsi->dev;
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+ struct cwd686 *ctx;
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+ int ret;
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+
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+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
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+ if (!ctx)
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+ return -ENOMEM;
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+
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+ mipi_dsi_set_drvdata(dsi, ctx);
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+ ctx->dev = dev;
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+
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+ dsi->lanes = 4;
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+ dsi->format = MIPI_DSI_FMT_RGB888;
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+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO |MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
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+
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+ ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
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+ if (IS_ERR(ctx->reset_gpio)) {
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+ ret = PTR_ERR(ctx->reset_gpio);
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+ if (ret != -EPROBE_DEFER)
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+ dev_err(dev, "failed to request GPIO (%d)\n", ret);
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+ return ret;
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+ }
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+
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+ ctx->backlight = devm_of_find_backlight(dev);
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+ if (IS_ERR(ctx->backlight)) {
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+ return PTR_ERR(ctx->backlight);
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+ }
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+
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+ ret = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
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+ if (ret) {
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+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
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+ return ret;
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+ }
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+
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+ drm_panel_init(&ctx->panel, dev, &cwd686_drm_funcs, DRM_MODE_CONNECTOR_DSI);
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+
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+ drm_panel_add(&ctx->panel);
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+
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+ ret = mipi_dsi_attach(dsi);
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+ if (ret < 0) {
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+ dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
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+ drm_panel_remove(&ctx->panel);
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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+static int cwd686_remove(struct mipi_dsi_device *dsi)
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+{
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+ struct cwd686 *ctx = mipi_dsi_get_drvdata(dsi);
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+
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+ mipi_dsi_detach(dsi);
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+ drm_panel_remove(&ctx->panel);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id cwd686_of_match[] = {
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+ { .compatible = "cw,cwd686" },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(of, cwd686_of_match);
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+
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+static struct mipi_dsi_driver cwd686_driver = {
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+ .probe = cwd686_probe,
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+ .remove = cwd686_remove,
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+ .driver = {
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+ .name = "panel-cwd686",
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+ .of_match_table = cwd686_of_match,
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+ },
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+};
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+module_mipi_dsi_driver(cwd686_driver);
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+
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+MODULE_DESCRIPTION("DRM Driver for cwd686 MIPI DSI panel");
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+MODULE_LICENSE("GPL v2");
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