81 lines
3.3 KiB
Diff
81 lines
3.3 KiB
Diff
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
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index 6a51f39dde56..ac7d58069eb8 100644
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--- a/drivers/staging/media/hantro/hantro_drv.c
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+++ b/drivers/staging/media/hantro/hantro_drv.c
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@@ -613,6 +613,7 @@ static const struct of_device_id of_hantro_match[] = {
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{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
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{ .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
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{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
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+ { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, },
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#endif
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#ifdef CONFIG_VIDEO_HANTRO_IMX8M
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{ .compatible = "nxp,imx8mq-vpu-g1", .data = &imx8mq_vpu_g1_variant, },
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diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
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index 4a19ae8940b9..89ec6d500938 100644
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--- a/drivers/staging/media/hantro/hantro_hw.h
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+++ b/drivers/staging/media/hantro/hantro_hw.h
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@@ -307,6 +307,7 @@ extern const struct hantro_variant rk3066_vpu_variant;
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extern const struct hantro_variant rk3288_vpu_variant;
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extern const struct hantro_variant rk3328_vpu_variant;
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extern const struct hantro_variant rk3399_vpu_variant;
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+extern const struct hantro_variant rk3568_vpu_variant;
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extern const struct hantro_variant sama5d4_vdec_variant;
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extern const struct hantro_variant sunxi_vpu_variant;
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diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
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index c203b606e6e7..5e64cf068ff9 100644
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--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
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+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
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@@ -551,6 +551,20 @@ const struct hantro_variant rk3399_vpu_variant = {
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.num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
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};
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+const struct hantro_variant rk3568_vpu_variant = {
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+ .dec_offset = 0x400,
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+ .dec_fmts = rk3399_vpu_dec_fmts,
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+ .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
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+ .codec = HANTRO_MPEG2_DECODER |
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+ HANTRO_VP8_DECODER | HANTRO_H264_DECODER,
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+ .codec_ops = rk3399_vpu_codec_ops,
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+ .irqs = rockchip_vdpu2_irqs,
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+ .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs),
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+ .init = rockchip_vpu_hw_init,
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+ .clk_names = rockchip_vpu_clk_names,
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+ .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names)
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+};
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+
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const struct hantro_variant px30_vpu_variant = {
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.enc_offset = 0x0,
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.enc_fmts = rockchip_vpu_enc_fmts,
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diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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index a68033a23975..33ecaafa8cb7 100644
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -390,6 +390,26 @@ power-domain@RK3568_PD_RKVENC {
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};
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};
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+ vpu: video-codec@fdea0400 {
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+ compatible = "rockchip,rk3568-vpu";
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+ reg = <0x0 0xfdea0000 0x0 0x800>;
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+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
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+ clock-names = "aclk", "hclk";
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+ iommus = <&vdpu_mmu>;
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+ power-domains = <&power RK3568_PD_VPU>;
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+ };
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+
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+ vdpu_mmu: iommu@fdea0800 {
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+ compatible = "rockchip,rk3568-iommu";
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+ reg = <0x0 0xfdea0800 0x0 0x40>;
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+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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+ clock-names = "aclk", "iface";
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+ clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
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+ power-domains = <&power RK3568_PD_VPU>;
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+ #iommu-cells = <0>;
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+ };
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+
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sdmmc2: mmc@fe000000 {
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compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xfe000000 0x0 0x4000>;
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