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build/patch/kernel/archive/rockchip64-6.4/rk3308-0001-pinctrl-slew-mux.patch

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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: brentr <brent@mbari.org>
Date: Thu, 13 Oct 2022 18:34:43 +0200
Subject: [ARCHEOLOGY] Rockpis wifi fixes (#4008)
> X-Git-Archeology: > recovered message: > * RockPI-S board has no video I/O
> X-Git-Archeology: > recovered message: > * udev rule to fix MAC address of iface based on UUID
> X-Git-Archeology: > recovered message: > Deals with WiFi chip lacking any EEPROM to store its unique Ethernet MAC address
> X-Git-Archeology: > recovered message: > Generic mechanism -- could be utilized for other boards having similar issues
> X-Git-Archeology: > recovered message: > * Handy Device Tree overlays for the RockPI S
> X-Git-Archeology: > recovered message: > Use armbian-add-overlay to install these
> X-Git-Archeology: > recovered message: > Reduce CPU voltage for the RK3308 B-S
> X-Git-Archeology: > recovered message: > Option to overclock RK3308 B-S to 1.3Ghz
> X-Git-Archeology: > recovered message: > Increase SDIO clock rate from 1Mhz to 10Mhz
> X-Git-Archeology: > recovered message: > This increases WiFi throughput from 300K bytes/s to 2.4M bytes/s
> X-Git-Archeology: > recovered message: > * corrected comment
> X-Git-Archeology: > recovered message: > * No longer repeat standard opp's in this dts
> X-Git-Archeology: > recovered message: > Require that the standard bs dts already be installed
> X-Git-Archeology: > recovered message: > * User README for adding RockPI-S board variant specific dts overlays
> X-Git-Archeology: > recovered message: > * "enabled" --> "okay"
> X-Git-Archeology: > recovered message: > * added mention of sdnand.dts, fixed typo
> X-Git-Archeology: > recovered message: > * added p2p0 to interfaces whose MAC address should be "fixed"
> X-Git-Archeology: > recovered message: > * RK3308 CPU serial number in nvmem replaces UUID for derivation of fixed MAC addr
> X-Git-Archeology: > recovered message: > Restored use of install utility
> X-Git-Archeology: > recovered message: > * Use RK3308 specific CPU serial number
> X-Git-Archeology: > recovered message: > rather than rootfs UUID
> X-Git-Archeology: > recovered message: > * remove generic fixMACaddress
> X-Git-Archeology: > recovered message: > * Install fixMACaddr file-by-file via install utility
> X-Git-Archeology: > recovered message: > * Drive SDIO bus signals faster
> X-Git-Archeology: > recovered message: > setting RK3308_SOC_CON0_VCCIO3 reduces signal rise/fall times to WiFi SDIO chip
> X-Git-Archeology: > recovered message: > from 30ns to 5ns.
> X-Git-Archeology: > recovered message: > This odd fix forward ported from legacy kernel.
> X-Git-Archeology: > recovered message: > Allows Rock Pi-S WiFi to operate at full speed.
> X-Git-Archeology: > recovered message: > * Set RK3308 I/O voltage domains before SDIO initializes
> X-Git-Archeology: > recovered message: > This patch moves responibility form the io-domain to the pinctrl driver because
> X-Git-Archeology: > recovered message: > the io-domain driver is probed after the SDIO devices are discovered.
> X-Git-Archeology: > recovered message: > This was causing multiple SDIO I/O failures during boot.
> X-Git-Archeology: > recovered message: > A new pinctrl property is added:
> X-Git-Archeology: > recovered message: > io-1v8-domains
> X-Git-Archeology: > recovered message: > is a u32 interpreted as a bit mask where each set bit corresponds to
> X-Git-Archeology: > recovered message: > a 1.8V I/O domain (as opposed to the default of 3.3V for I/O)
> X-Git-Archeology: > recovered message: > The mask is writted to the RK3308_SOC_CON0 GRF register
> X-Git-Archeology: > recovered message: > (once) when the pinctrl driver starts
> X-Git-Archeology: > recovered message: > The default mask is 0x10 where only I/O domain 4 runs at 1.8V
> X-Git-Archeology: > recovered message: > This is necessary for the RockPI-S to run the SDIO clock at high (50Mhz) speed
> X-Git-Archeology: > recovered message: > * align whitespace
> X-Git-Archeology: > recovered message: > * factored rk3308bs overlays out up sdio speedup patch
> X-Git-Archeology: > recovered message: > * factored dts for RK3308 iodomains and pinctrl patches out of speedup patch
> X-Git-Archeology: > recovered message: > * remains of sdio speedup patch merely add iodomains support for rk3308
> X-Git-Archeology: > recovered message: > * factored rockpis dts modification out from rk3308 io voltage domains
> X-Git-Archeology: > recovered message: > replaced rk3308 support from iodomains with
> X-Git-Archeology: > recovered message: > new io-voltage-domains property added to pinctrl
> X-Git-Archeology: > recovered message: > io-voltage-domains specific to rk3308 for now, others SOCs may be added later.
> X-Git-Archeology: > recovered message: > * add sequence numbering to names of rk3308 patches
> X-Git-Archeology: > recovered message: > * corrected tab alignment
> X-Git-Archeology: - Revision d3a3afe3850861ceaeb44f3631251c764a28cd43: https://github.com/armbian/build/commit/d3a3afe3850861ceaeb44f3631251c764a28cd43
> X-Git-Archeology: Date: Thu, 13 Oct 2022 18:34:43 +0200
> X-Git-Archeology: From: brentr <brent@mbari.org>
> X-Git-Archeology: Subject: Rockpis wifi fixes (#4008)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 6765f734cc4a22aeaa9f99a3ad28c8c322de26f6: https://github.com/armbian/build/commit/6765f734cc4a22aeaa9f99a3ad28c8c322de26f6
> X-Git-Archeology: Date: Tue, 25 Oct 2022 11:26:51 +0200
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology: Subject: Bump rockchip64 edge to 6.0.y (#4337)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 92f1a22d76b987afa7ba555d5b509adc51d689e7: https://github.com/armbian/build/commit/92f1a22d76b987afa7ba555d5b509adc51d689e7
> X-Git-Archeology: Date: Fri, 16 Dec 2022 13:38:13 +0100
> X-Git-Archeology: From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology: Subject: Re-add rockchip64 6.0 patches (#4575)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 34ae84fac5d0b66a1ab2d1e51534b7beb13ef245: https://github.com/armbian/build/commit/34ae84fac5d0b66a1ab2d1e51534b7beb13ef245
> X-Git-Archeology: Date: Fri, 05 May 2023 14:22:00 +0200
> X-Git-Archeology: From: amazingfate <liujianfeng1994@gmail.com>
> X-Git-Archeology: Subject: bump rockchip64 edge to v6.3
> X-Git-Archeology:
---
drivers/pinctrl/pinconf-generic.c | 1 +
drivers/pinctrl/pinctrl-rockchip.c | 95 ++++++++++
drivers/pinctrl/pinctrl-rockchip.h | 3 +
include/linux/pinctrl/pinconf-generic.h | 1 +
4 files changed, 100 insertions(+)
diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
index 365c4b0ca465..bacc2987c55b 100644
--- a/drivers/pinctrl/pinconf-generic.c
+++ b/drivers/pinctrl/pinconf-generic.c
@@ -51,6 +51,7 @@ static const struct pin_config_item conf_items[] = {
PCONFDUMP(PIN_CONFIG_SLEEP_HARDWARE_STATE, "sleep hardware state", NULL, false),
PCONFDUMP(PIN_CONFIG_SLEW_RATE, "slew rate", NULL, true),
PCONFDUMP(PIN_CONFIG_SKEW_DELAY, "skew delay", NULL, true),
+ PCONFDUMP(PIN_CONFIG_MUX, "mux", NULL, true),
};
static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev,
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 0276b52f3716..dde241eaf07a 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2534,6 +2534,26 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
return ret;
}
+#define RK3308_SLEW_PINS_PER_REG 8
+#define RK3308_SLEW_BANK_STRIDE 16
+#define RK3308_SLEW_GRF_OFFSET 0x150
+
+static int rk3308_calc_slew_reg_and_bit(struct rockchip_pin_bank *bank,
+ int pin_num, struct regmap **regmap,
+ int *reg, u8 *bit)
+{
+ struct rockchip_pinctrl *info = bank->drvdata;
+
+ *regmap = info->regmap_base;
+ *reg = RK3308_SLEW_GRF_OFFSET;
+
+ *reg += bank->bank_num * RK3308_SLEW_BANK_STRIDE;
+ *reg += ((pin_num / RK3308_SLEW_PINS_PER_REG) * 4);
+ *bit = pin_num % RK3308_SLEW_PINS_PER_REG;
+
+ return 0;
+}
+
#define RK3328_SCHMITT_BITS_PER_PIN 1
#define RK3328_SCHMITT_PINS_PER_REG 16
#define RK3328_SCHMITT_BANK_STRIDE 8
@@ -2647,6 +2667,51 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
return regmap_update_bits(regmap, reg, rmask, data);
}
+static int rockchip_get_slew_rate(struct rockchip_pin_bank *bank, int pin_num)
+{
+ struct rockchip_pinctrl *info = bank->drvdata;
+ struct rockchip_pin_ctrl *ctrl = info->ctrl;
+ struct regmap *regmap;
+ int reg, ret;
+ u8 bit;
+ u32 data;
+
+ ret = ctrl->slew_rate_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+ if (ret)
+ return ret;
+
+ ret = regmap_read(regmap, reg, &data);
+ if (ret)
+ return ret;
+
+ data >>= bit;
+ return data & 0x1;
+}
+
+static int rockchip_set_slew_rate(struct rockchip_pin_bank *bank,
+ int pin_num, int speed)
+{
+ struct rockchip_pinctrl *info = bank->drvdata;
+ struct rockchip_pin_ctrl *ctrl = info->ctrl;
+ struct regmap *regmap;
+ int reg, ret;
+ u8 bit;
+ u32 data, rmask;
+
+ dev_dbg(info->dev, "setting slew rate of GPIO%d-%d to %d\n",
+ bank->bank_num, pin_num, speed);
+
+ ret = ctrl->slew_rate_calc_reg(bank, pin_num, &regmap, &reg, &bit);
+ if (ret)
+ return ret;
+
+ /* enable the write to the equivalent lower bits */
+ data = BIT(bit + 16) | (speed << bit);
+ rmask = BIT(bit + 16) | BIT(bit);
+
+ return regmap_update_bits(regmap, reg, rmask, data);
+}
+
/*
* Pinmux_ops handling
*/
@@ -2879,6 +2944,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
if (rc < 0)
return rc;
break;
+ case PIN_CONFIG_SLEW_RATE:
+ if (!info->ctrl->slew_rate_calc_reg)
+ return -ENOTSUPP;
+
+ rc = rockchip_set_slew_rate(bank,
+ pin - bank->pin_base, arg);
+ if (rc < 0)
+ return rc;
+ break;
default:
return -ENOTSUPP;
break;
@@ -2953,6 +3027,26 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
if (rc < 0)
return rc;
+ arg = rc;
+ break;
+ case PIN_CONFIG_SLEW_RATE:
+ if (!info->ctrl->slew_rate_calc_reg)
+ return -ENOTSUPP;
+
+ rc = rockchip_get_slew_rate(bank, pin - bank->pin_base);
+ if (rc < 0)
+ return rc;
+
+ arg = rc;
+ break;
+ case PIN_CONFIG_MUX:
+ if (!info->ctrl->schmitt_calc_reg)
+ return -ENOTSUPP;
+
+ rc = rockchip_get_mux(bank, pin - bank->pin_base);
+ if (rc < 0)
+ return rc;
+
arg = rc;
break;
default:
@@ -3760,6 +3854,7 @@ static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
.pull_calc_reg = rk3308_calc_pull_reg_and_bit,
.drv_calc_reg = rk3308_calc_drv_reg_and_bit,
.schmitt_calc_reg = rk3308_calc_schmitt_reg_and_bit,
+ .slew_rate_calc_reg = rk3308_calc_slew_reg_and_bit,
};
static struct rockchip_pin_bank rk3328_pin_banks[] = {
diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockchip.h
index 4759f336941e..785f48791631 100644
--- a/drivers/pinctrl/pinctrl-rockchip.h
+++ b/drivers/pinctrl/pinctrl-rockchip.h
@@ -406,6 +406,9 @@ struct rockchip_pin_ctrl {
int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
int pin_num, struct regmap **regmap,
int *reg, u8 *bit);
+ int (*slew_rate_calc_reg)(struct rockchip_pin_bank *bank,
+ int pin_num, struct regmap **regmap,
+ int *reg, u8 *bit);
};
struct rockchip_pin_config {
diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
index d74b7a4ea154..87bd22137988 100644
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -142,6 +142,7 @@ enum pin_config_param {
PIN_CONFIG_SKEW_DELAY,
PIN_CONFIG_SLEEP_HARDWARE_STATE,
PIN_CONFIG_SLEW_RATE,
+ PIN_CONFIG_MUX,
PIN_CONFIG_END = 0x7F,
PIN_CONFIG_MAX = 0xFF,
};
--
Armbian
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